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[2/2] arm: make sure that number of irqs can be represented in GICD_TYPER.

Message ID 877gzg7w5d.fsf@rustcorp.com.au
State Accepted
Commit 41c1e2f54e6fc76dbc7047f1a95693f4d37b4623
Headers show

Commit Message

Rusty Russell Feb. 21, 2012, 2:33 a.m. UTC
We currently assume that the number of interrupts (ITLinesNumber in
the architecture reference manual) is divisible by 32, since we
present it to the guest when it reads GICD_TYPER (in gic_dist_readb())
as (N / 32) - 1.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
---
 hw/arm_gic.c |    9 +++++++++
 1 files changed, 9 insertions(+), 0 deletions(-)

Comments

Peter Maydell Feb. 21, 2012, 12:42 p.m. UTC | #1
On 21 February 2012 02:33, Rusty Russell <rusty@rustcorp.com.au> wrote:
> We currently assume that the number of interrupts (ITLinesNumber in
> the architecture reference manual) is divisible by 32, since we
> present it to the guest when it reads GICD_TYPER (in gic_dist_readb())
> as (N / 32) - 1.
>
> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
and put into arm-devs.next.

-- PMM
diff mbox

Patch

diff --git a/hw/arm_gic.c b/hw/arm_gic.c
index 4b1b486..a19212e 100644
--- a/hw/arm_gic.c
+++ b/hw/arm_gic.c
@@ -819,6 +819,15 @@  static void gic_init(gic_state *s, int num_irq)
         hw_error("requested %u interrupt lines exceeds GIC maximum %d\n",
                  num_irq, GIC_MAXIRQ);
     }
+    /* ITLinesNumber is represented as (N / 32) - 1 (see
+     * gic_dist_readb) so this is an implementation imposed
+     * restriction, not an architectural one:
+     */
+    if (s->num_irq < 32 || (s->num_irq % 32)) {
+        hw_error("%d interrupt lines unsupported: not divisible by 32\n",
+                 num_irq);
+    }
+
     qdev_init_gpio_in(&s->busdev.qdev, gic_set_irq, s->num_irq - GIC_INTERNAL);
     for (i = 0; i < NUM_CPU(s); i++) {
         sysbus_init_irq(&s->busdev, &s->parent_irq[i]);