| Message ID | 540ED116.9030907@linaro.org |
|---|---|
| State | New |
| Headers | show |
On Tue, Sep 9, 2014 at 12:06 PM, Kugan <kugan.vivekanandarajah@linaro.org> wrote: > > > On 08/09/14 19:48, Richard Biener wrote: >> On Sun, Sep 7, 2014 at 11:50 AM, Kugan >> <kugan.vivekanandarajah@linaro.org> wrote: >>> On 05/09/14 19:50, Richard Biener wrote: >>> >>>> Well - the best way would be to expose the target specifics to GIMPLE >>>> at some point in the optimization pipeline. My guess would be that it's >>>> appropriate after loop optimizations (but maybe before induction variable >>>> optimization). >>>> >>>> That is, have a pass that applies register promotion to all SSA names >>>> in the function, inserting appropriate truncations and extensions. That >>>> way you'd never see (set (subreg...) on RTL. The VRP and DOM >>>> passes running after that pass would then be able to aggressively >>>> optimize redundant truncations and extensions. >>>> >>>> Effects on debug information are to be considered. You can change >>>> the type of SSA names in-place but you don't want to do that for >>>> user DECLs (and we can't have the SSA name type and its DECL >>>> type differ - and not sure if we might want to lift that restriction). >>> >>> Thanks. I will try to implement this. >>> >>> I still would like to keep the VRP based approach as there are some >>> cases that I think can only be done with range info. For example: >>> >>> short foo(unsigned char c) >>> { >>> c = c & (unsigned char)0x0F; >>> if( c > 7 ) >>> return((short)(c - 5)); >>> else >>> return(( short )c); >>> } >>> >>> >>> So, how about adding and setting the overflow/wrap around flag to >>> range_info. We now set static_flag for VR_RANG/VR_ANTI_RANGE. If we go >>> back to the max + 1, min - 1 for VR_ANTI_RANGE, we can use this >>> static_flag to encode overflow/wrap around. Will that be something >>> acceptable? >> >> You mean tracking in the VRP lattice whether a value wrapped around >> (or was assumed not to due to undefined behavior)? I'm not sure this >> is easy to do correctly (VRP is large). >> >> Note that I don't think we'll lose the testcase you quoted if the promotion >> pass runs before VRP2. We'd have as input to VRP2 sth like (assuming >> promote mode would promote to SImode) >> >> SImode tem_2 = (unsigned int)c_1(D); >> tem_3 = tem_3 & 0xF; >> if (tem_3 > 7) >> { >> tem_4 = tem_3 - 5; >> short _5 = (short)_4; >> tem_5 = (unsigned int)_5; >> return tem_5; >> } >> else >> { >> short _6 = (short)_3; >> return _6; >> } >> >> VRP should be able to remove the (unsigned int)(short) sign-extension >> of tem_4. >> >> note that both incoming registers and return registers are "interesting". >> For simplicity I suggest to not promote them on GIMPLE. >> >> What you'd lose in VRP2 is the smaller value-ranges you'd get from >> (undefined) wrapping. You could recover the undefinedness by >> looking at SSA names recorded value-range and transfering that >> in the promotion pass (but I'm not sure if you want to open the >> can of latent signed overflow bugs in programs even more for >> PROMOTE_MODE targets...) >> > > Thanks. In the meantime I would like to revert the patch which is > enabling zero/sign extension. I have bootstrapped it in x86_64 and > regression testing is ongoing. Is this OK ? Ok. Thanks, Richard. > Thanks, > Kugan > > gcc/ChangeLog: > > 2014-09-09 Kugan Vivekanandarajah <kuganv@linaro.org> > > Revert r213751: > * calls.c (precompute_arguments): Check > promoted_for_signed_and_unsigned_p and set the promoted mode. > (promoted_for_signed_and_unsigned_p): New function. > (expand_expr_real_1): Check promoted_for_signed_and_unsigned_p > and set the promoted mode. > * expr.h (promoted_for_signed_and_unsigned_p): New function definition. > * cfgexpand.c (expand_gimple_stmt_1): Call emit_move_insn if > SUBREG is promoted with SRP_SIGNED_AND_UNSIGNED.
diff --git a/gcc/calls.c b/gcc/calls.c index 03ed9c8..345331f 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -1486,10 +1486,7 @@ precompute_arguments (int num_actuals, struct arg_data *args) args[i].initial_value = gen_lowpart_SUBREG (mode, args[i].value); SUBREG_PROMOTED_VAR_P (args[i].initial_value) = 1; - if (promoted_for_signed_and_unsigned_p (args[i].tree_value, mode)) - SUBREG_PROMOTED_SET (args[i].initial_value, SRP_SIGNED_AND_UNSIGNED); - else - SUBREG_PROMOTED_SET (args[i].initial_value, args[i].unsignedp); + SUBREG_PROMOTED_SET (args[i].initial_value, args[i].unsignedp); } } } diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c index db76897..8916305 100644 --- a/gcc/cfgexpand.c +++ b/gcc/cfgexpand.c @@ -3325,13 +3325,7 @@ expand_gimple_stmt_1 (gimple stmt) GET_MODE (target), temp, unsignedp); } - if ((SUBREG_PROMOTED_GET (target) == SRP_SIGNED_AND_UNSIGNED) - && (GET_CODE (temp) == SUBREG) - && (GET_MODE (target) == GET_MODE (temp)) - && (GET_MODE (SUBREG_REG (target)) == GET_MODE (SUBREG_REG (temp)))) - emit_move_insn (SUBREG_REG (target), SUBREG_REG (temp)); - else - convert_move (SUBREG_REG (target), temp, unsignedp); + convert_move (SUBREG_REG (target), temp, unsignedp); } else if (nontemporal && emit_storent_insn (target, temp)) ; diff --git a/gcc/expr.c b/gcc/expr.c index 7e69955..5039734 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -68,7 +68,6 @@ along with GCC; see the file COPYING3. If not see #include "tree-ssa-address.h" #include "cfgexpand.h" #include "builtins.h" -#include "tree-ssa.h" #ifndef STACK_PUSH_CODE #ifdef STACK_GROWS_DOWNWARD @@ -9250,35 +9249,6 @@ expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode, } #undef REDUCE_BIT_FIELD -/* Return TRUE if value in SSA is zero and sign extended for wider mode MODE - using value range information stored. Return FALSE otherwise. - - This is used to check if SUBREG is zero and sign extended and to set - promoted mode SRP_SIGNED_AND_UNSIGNED to SUBREG. */ - -bool -promoted_for_signed_and_unsigned_p (tree ssa, enum machine_mode mode) -{ - wide_int min, max; - - if (ssa == NULL_TREE - || TREE_CODE (ssa) != SSA_NAME - || !INTEGRAL_TYPE_P (TREE_TYPE (ssa)) - || (TYPE_PRECISION (TREE_TYPE (ssa)) != GET_MODE_PRECISION (mode))) - return false; - - /* Return FALSE if value_range is not recorded for SSA. */ - if (get_range_info (ssa, &min, &max) != VR_RANGE) - return false; - - /* Return true (to set SRP_SIGNED_AND_UNSIGNED to SUBREG) if MSB of the - smaller mode is not set (i.e. MSB of ssa is not set). */ - if (!wi::neg_p (min, SIGNED) && !wi::neg_p(max, SIGNED)) - return true; - else - return false; - -} /* Return TRUE if expression STMT is suitable for replacement. Never consider memory loads as replaceable, because those don't ever lead @@ -9582,10 +9552,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, temp = gen_lowpart_SUBREG (mode, decl_rtl); SUBREG_PROMOTED_VAR_P (temp) = 1; - if (promoted_for_signed_and_unsigned_p (ssa_name, mode)) - SUBREG_PROMOTED_SET (temp, SRP_SIGNED_AND_UNSIGNED); - else - SUBREG_PROMOTED_SET (temp, unsignedp); + SUBREG_PROMOTED_SET (temp, unsignedp); return temp; } diff --git a/gcc/expr.h b/gcc/expr.h index 756c894..2e66329 100644 --- a/gcc/expr.h +++ b/gcc/expr.h @@ -440,7 +440,6 @@ extern rtx expand_expr_real_1 (tree, rtx, enum machine_mode, enum expand_modifier, rtx *, bool); extern rtx expand_expr_real_2 (sepops, rtx, enum machine_mode, enum expand_modifier); -extern bool promoted_for_signed_and_unsigned_p (tree, enum machine_mode); /* Generate code for computing expression EXP. An rtx for the computed value is returned. The value is never null.