diff mbox

[v7,3/5] Documentation: synopsys-dw-mshc: add binding for fifo quirks

Message ID 1480904976-7081-4-git-send-email-jun.nie@linaro.org
State Superseded
Headers show

Commit Message

Jun Nie Dec. 5, 2016, 2:29 a.m. UTC 
Add fifo-addr property and fifo-watermark-quirk property to
synopsys-dw-mshc bindings. It is intended to provide more
dt interface to support SoCs specific configuration.

Signed-off-by: Jun Nie <jun.nie@linaro.org>

---
 Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 13 +++++++++++++
 1 file changed, 13 insertions(+)

-- 
1.9.1

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Comments

Rob Herring (Arm) Dec. 9, 2016, 9:51 p.m. UTC | #1 
On Mon, Dec 05, 2016 at 10:29:34AM +0800, Jun Nie wrote:
> Add fifo-addr property and fifo-watermark-quirk property to

> synopsys-dw-mshc bindings. It is intended to provide more

> dt interface to support SoCs specific configuration.

> 

> Signed-off-by: Jun Nie <jun.nie@linaro.org>

> ---

>  Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 13 +++++++++++++

>  1 file changed, 13 insertions(+)


This patch should come before patch 1 since you use these there.

Acked-by: Rob Herring <robh@kernel.org>

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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 7fd17c3..bca30b6 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -75,6 +75,17 @@  Optional properties:
 * card-detect-delay: Delay in milli-seconds before detecting card after card
   insert event. The default value is 0.
 
+* data-addr: Override fifo address with value provided by DT. The default FIFO reg
+  offset is assumed as 0x100 (version < 0x240A) and 0x200(version >= 0x240A) by
+  driver. If the controller does not follow this rule, please use this property
+  to set fifo address in device tree.
+
+* fifo-watermark-aligned: Data done irq is expected if data length is less than
+  watermark in PIO mode. But fifo watermark is requested to be aligned with data
+  length in some SoC so that TX/RX irq can be generated with data done irq. Add this
+  watermark quirk to mark this requirement and force fifo watermark setting
+  accordingly.
+
 * vmmc-supply: The phandle to the regulator to use for vmmc.  If this is
   specified we'll defer probe until we can find this regulator.
 
@@ -102,6 +113,8 @@  board specific portions as listed below.
 		interrupts = <0 75 0>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+		data-addr = <0x200>;
+		fifo-watermark-aligned;
 		resets = <&rst 20>;
 		reset-names = "reset";
 	};