Message ID | 20171013162438.32458-11-alex.bennee@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | v8.2 half-precision support (work-in-progress) | expand |
On 10/13/2017 09:24 AM, Alex Bennée wrote: > Mention the pseudo-code fragment from which this is based and correct > the spelling of signalling. > > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > --- > fpu/softfloat-specialize.h | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
On 13 October 2017 at 17:24, Alex Bennée <alex.bennee@linaro.org> wrote: > Mention the pseudo-code fragment from which this is based and correct > the spelling of signalling. We are following the IEEE spec here, which spells it "signaling" with one 'l', being American. (The ARM ARM also uses the one-l spelling.) thanks -- PMM
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index c8282b8bf7..2ccd4abe11 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -445,14 +445,14 @@ static float32 commonNaNToFloat32(commonNaNT a, float_status *status) #if defined(TARGET_ARM) static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, - flag aIsLargerSignificand) + flag aIsLargerSignificand) { - /* ARM mandated NaN propagation rules: take the first of: - * 1. A if it is signaling - * 2. B if it is signaling + /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take the first of: + * 1. A if it is signalling + * 2. B if it is signalling * 3. A (quiet) * 4. B (quiet) - * A signaling NaN is always quietened before returning it. + * A signalling NaN is always quietened before returning it. */ if (aIsSNaN) { return 0;
Mention the pseudo-code fragment from which this is based and correct the spelling of signalling. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> --- fpu/softfloat-specialize.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) -- 2.14.1