| Message ID | 20180207225540.31698-1-richard.henderson@linaro.org |
|---|---|
| Headers | show |
| Series | tcg: generic vector operaions | expand |
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180207225540.31698-1-richard.henderson@linaro.org
Subject: [Qemu-devel] [PULL 00/20] tcg: generic vector operaions
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
git config --local diff.renamelimit 0
git config --local diff.renames True
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
20748398ef tcg/aarch64: Add vector operations
6295239300 tcg/i386: Add vector operations
527427aeb4 target/arm: Use vector infrastructure for aa64 orr/bic immediate
b846d63bc3 target/arm: Use vector infrastructure for aa64 multiplies
68d6a5774e target/arm: Use vector infrastructure for aa64 compares
c964e89d02 target/arm: Use vector infrastructure for aa64 constant shifts
f3f5b06e63 target/arm: Use vector infrastructure for aa64 dup/movi
e8d8eb01f3 target/arm: Use vector infrastructure for aa64 mov/not/neg
bc6680978c target/arm: Use vector infrastructure for aa64 add/sub/logic
bea70646f1 target/arm: Align vector registers
f28d0f94e9 tcg/optimize: Handle vector opcodes during optimize
e86a0694d7 tcg: Add generic vector helpers with a scalar operand
1ef5bb40af tcg: Add generic helpers for saturating arithmetic
c66189cb49 tcg: Add generic vector ops for multiplication
e47ec9c618 tcg: Add generic vector ops for comparisons
2f64c437f4 tcg: Add generic vector ops for constant shifts
8b9d408c94 tcg: Add generic vector expanders
172e3f7291 tcg: Standardize integral arguments to expanders
45e3a2c94b tcg: Add types and basic operations for host vectors
0977d8b89d tcg: Allow multiple word entries into the constant pool
=== OUTPUT BEGIN ===
Checking PATCH 1/20: tcg: Allow multiple word entries into the constant pool...
Checking PATCH 2/20: tcg: Add types and basic operations for host vectors...
ERROR: externs should be avoided in .c files
#127: FILE: tcg/tcg-op-vec.c:32:
+extern TCGv_i32 TCGV_LOW_link_error(TCGv_i64);
ERROR: externs should be avoided in .c files
#128: FILE: tcg/tcg-op-vec.c:33:
+extern TCGv_i32 TCGV_HIGH_link_error(TCGv_i64);
ERROR: Macros with complex values should be enclosed in parenthesis
#457: FILE: tcg/tcg-opc.h:209:
+#define IMPLVEC TCG_OPF_VECTOR | IMPL(TCG_TARGET_MAYBE_vec)
ERROR: Macros with complex values should be enclosed in parenthesis
#717: FILE: tcg/tcg.h:621:
+#define TCGOP_VECL(X) (X)->param1
ERROR: Macros with complex values should be enclosed in parenthesis
#718: FILE: tcg/tcg.h:622:
+#define TCGOP_VECE(X) (X)->param2
total: 5 errors, 0 warnings, 720 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 3/20: tcg: Standardize integral arguments to expanders...
Checking PATCH 4/20: tcg: Add generic vector expanders...
ERROR: spaces required around that '&' (ctx:WxO)
#354: FILE: accel/tcg/tcg-runtime-gvec.c:311:
+ *(vec64 *)(d + i) = *(vec64 *)(a + i) &~ *(vec64 *)(b + i);
^
ERROR: space prohibited after that '~' (ctx:OxW)
#354: FILE: accel/tcg/tcg-runtime-gvec.c:311:
+ *(vec64 *)(d + i) = *(vec64 *)(a + i) &~ *(vec64 *)(b + i);
^
ERROR: spaces required around that '|' (ctx:WxO)
#365: FILE: accel/tcg/tcg-runtime-gvec.c:322:
+ *(vec64 *)(d + i) = *(vec64 *)(a + i) |~ *(vec64 *)(b + i);
^
ERROR: space prohibited after that '~' (ctx:OxW)
#365: FILE: accel/tcg/tcg-runtime-gvec.c:322:
+ *(vec64 *)(d + i) = *(vec64 *)(a + i) |~ *(vec64 *)(b + i);
^
ERROR: trailing whitespace
#997: FILE: tcg/tcg-op-gvec.c:465:
+ } $
ERROR: space prohibited after that open parenthesis '('
#2239: FILE: tcg/tcg.h:1230:
+ ? ( (VECE) == MO_8 ? 0x0101010101010101ull * (uint8_t)(C) \
total: 6 errors, 0 warnings, 2159 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 5/20: tcg: Add generic vector ops for constant shifts...
Checking PATCH 6/20: tcg: Add generic vector ops for comparisons...
ERROR: spaces required around that '*' (ctx:WxV)
#36: FILE: accel/tcg/tcg-runtime-gvec.c:485:
+ *(TYPE *)(d + i) = DO_CMP0(*(TYPE *)(a + i) OP *(TYPE *)(b + i)); \
^
ERROR: spaces required around that '==' (ctx:WxB)
#42: FILE: accel/tcg/tcg-runtime-gvec.c:491:
+ DO_CMP1(gvec_eq##SZ, vec##SZ, ==) \
^
ERROR: spaces required around that '!=' (ctx:WxB)
#43: FILE: accel/tcg/tcg-runtime-gvec.c:492:
+ DO_CMP1(gvec_ne##SZ, vec##SZ, !=) \
^
ERROR: spaces required around that '<' (ctx:WxB)
#44: FILE: accel/tcg/tcg-runtime-gvec.c:493:
+ DO_CMP1(gvec_lt##SZ, svec##SZ, <) \
^
ERROR: spaces required around that '<=' (ctx:WxB)
#45: FILE: accel/tcg/tcg-runtime-gvec.c:494:
+ DO_CMP1(gvec_le##SZ, svec##SZ, <=) \
^
ERROR: spaces required around that '<' (ctx:WxB)
#46: FILE: accel/tcg/tcg-runtime-gvec.c:495:
+ DO_CMP1(gvec_ltu##SZ, vec##SZ, <) \
^
ERROR: spaces required around that '<=' (ctx:WxB)
#47: FILE: accel/tcg/tcg-runtime-gvec.c:496:
+ DO_CMP1(gvec_leu##SZ, vec##SZ, <=)
^
ERROR: space prohibited after that '&&' (ctx:ExW)
#242: FILE: tcg/tcg-op-gvec.c:1710:
+ && check_size_impl(oprsz, 8)
^
total: 8 errors, 0 warnings, 303 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 7/20: tcg: Add generic vector ops for multiplication...
Checking PATCH 8/20: tcg: Add generic helpers for saturating arithmetic...
ERROR: spaces required around that '&' (ctx:WxO)
#68: FILE: accel/tcg/tcg-runtime-gvec.c:594:
+ if (((di ^ ai) &~ (ai ^ bi)) < 0) {
^
ERROR: space prohibited after that '~' (ctx:OxW)
#68: FILE: accel/tcg/tcg-runtime-gvec.c:594:
+ if (((di ^ ai) &~ (ai ^ bi)) < 0) {
^
ERROR: spaces required around that '&' (ctx:WxO)
#86: FILE: accel/tcg/tcg-runtime-gvec.c:612:
+ if (((di ^ ai) &~ (ai ^ bi)) < 0) {
^
ERROR: space prohibited after that '~' (ctx:OxW)
#86: FILE: accel/tcg/tcg-runtime-gvec.c:612:
+ if (((di ^ ai) &~ (ai ^ bi)) < 0) {
^
total: 4 errors, 0 warnings, 411 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 9/20: tcg: Add generic vector helpers with a scalar operand...
Checking PATCH 10/20: tcg/optimize: Handle vector opcodes during optimize...
ERROR: spaces required around that ':' (ctx:VxE)
#174: FILE: tcg/optimize.c:644:
+ CASE_OP_32_64_VEC(add):
^
ERROR: spaces required around that ':' (ctx:VxE)
#175: FILE: tcg/optimize.c:645:
+ CASE_OP_32_64_VEC(mul):
^
ERROR: spaces required around that ':' (ctx:VxE)
#176: FILE: tcg/optimize.c:646:
+ CASE_OP_32_64_VEC(and):
^
ERROR: spaces required around that ':' (ctx:VxE)
#177: FILE: tcg/optimize.c:647:
+ CASE_OP_32_64_VEC(or):
^
ERROR: spaces required around that ':' (ctx:VxE)
#178: FILE: tcg/optimize.c:648:
+ CASE_OP_32_64_VEC(xor):
^
ERROR: spaces required around that ':' (ctx:VxE)
#187: FILE: tcg/optimize.c:713:
+ CASE_OP_32_64_VEC(sub):
^
ERROR: spaces required around that ':' (ctx:VxE)
#210: FILE: tcg/optimize.c:744:
+ CASE_OP_32_64_VEC(xor):
^
ERROR: spaces required around that ':' (ctx:VxE)
#219: FILE: tcg/optimize.c:761:
+ CASE_OP_32_64_VEC(andc):
^
ERROR: spaces required around that ':' (ctx:VxE)
#228: FILE: tcg/optimize.c:769:
+ CASE_OP_32_64_VEC(orc):
^
ERROR: spaces required around that ':' (ctx:VxE)
#250: FILE: tcg/optimize.c:807:
+ CASE_OP_32_64_VEC(add):
^
ERROR: spaces required around that ':' (ctx:VxE)
#251: FILE: tcg/optimize.c:808:
+ CASE_OP_32_64_VEC(sub):
^
ERROR: spaces required around that ':' (ctx:VxE)
#252: FILE: tcg/optimize.c:809:
+ CASE_OP_32_64_VEC(or):
^
ERROR: spaces required around that ':' (ctx:VxE)
#253: FILE: tcg/optimize.c:810:
+ CASE_OP_32_64_VEC(xor):
^
ERROR: spaces required around that ':' (ctx:VxE)
#254: FILE: tcg/optimize.c:811:
+ CASE_OP_32_64_VEC(andc):
^
ERROR: spaces required around that ':' (ctx:VxE)
#272: FILE: tcg/optimize.c:824:
+ CASE_OP_32_64_VEC(and):
^
ERROR: spaces required around that ':' (ctx:VxE)
#273: FILE: tcg/optimize.c:825:
+ CASE_OP_32_64_VEC(orc):
^
ERROR: spaces required around that ':' (ctx:VxE)
#283: FILE: tcg/optimize.c:1039:
+ CASE_OP_32_64_VEC(and):
^
ERROR: spaces required around that ':' (ctx:VxE)
#284: FILE: tcg/optimize.c:1040:
+ CASE_OP_32_64_VEC(mul):
^
ERROR: spaces required around that ':' (ctx:VxE)
#294: FILE: tcg/optimize.c:1055:
+ CASE_OP_32_64_VEC(or):
^
ERROR: spaces required around that ':' (ctx:VxE)
#295: FILE: tcg/optimize.c:1056:
+ CASE_OP_32_64_VEC(and):
^
ERROR: spaces required around that ':' (ctx:VxE)
#306: FILE: tcg/optimize.c:1068:
+ CASE_OP_32_64_VEC(andc):
^
ERROR: spaces required around that ':' (ctx:VxE)
#307: FILE: tcg/optimize.c:1069:
+ CASE_OP_32_64_VEC(sub):
^
ERROR: spaces required around that ':' (ctx:VxE)
#308: FILE: tcg/optimize.c:1070:
+ CASE_OP_32_64_VEC(xor):
^
ERROR: spaces required around that ':' (ctx:VxE)
#317: FILE: tcg/optimize.c:1084:
+ CASE_OP_32_64_VEC(mov):
^
total: 24 errors, 0 warnings, 296 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 11/20: target/arm: Align vector registers...
Checking PATCH 12/20: target/arm: Use vector infrastructure for aa64 add/sub/logic...
Checking PATCH 13/20: target/arm: Use vector infrastructure for aa64 mov/not/neg...
Checking PATCH 14/20: target/arm: Use vector infrastructure for aa64 dup/movi...
Checking PATCH 15/20: target/arm: Use vector infrastructure for aa64 constant shifts...
Checking PATCH 16/20: target/arm: Use vector infrastructure for aa64 compares...
Checking PATCH 17/20: target/arm: Use vector infrastructure for aa64 multiplies...
Checking PATCH 18/20: target/arm: Use vector infrastructure for aa64 orr/bic immediate...
Checking PATCH 19/20: tcg/i386: Add vector operations...
Checking PATCH 20/20: tcg/aarch64: Add vector operations...
=== OUTPUT END ===
Test command exited with code: 1
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@freelists.org
On 7 February 2018 at 22:55, Richard Henderson <richard.henderson@linaro.org> wrote: > Aside from r-b markers, there is only one minor change from v11. > > The check_operand_size assert loosened to allow 8-byte operation > with a large (in this case 32-byte) clear. Previously we'd test > the clear size and require the operation be a multiple of 16. > This showed up during an AdvSIMD insn with SVE enabled. > > > r~ > > > The following changes since commit 17a5bbb44df9a4a79166332bc26e2d8ca6bd8fa8: > > Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-02-06' into staging (2018-02-07 16:26:01 +0000) > > are available in the Git repository at: > > git://github.com/rth7680/qemu.git tags/pull-tcg-20180207 > > for you to fetch changes up to b63799b11c17e8f1068dbd05c18cbb9c9aa69c56: > > tcg/aarch64: Add vector operations (2018-02-07 14:47:50 -0800) > > ---------------------------------------------------------------- > tcg generic vectors alpha guest boot-serial-test fails on ppc64 host: QTEST_QEMU_BINARY=alpha-softmmu/qemu-system-alpha QTEST_QEMU_IMG=qemu-img MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))} gtester -k --verbose -m=quick tests/boot-serial-test tests/qmp-test tests/device-introspect-test tests/qom-test tests/test-hmp TEST: tests/boot-serial-test... (pid=60169) /alpha/boot-serial/clipper: qemu-system-alpha: /home/pm215/qemu/tcg/ppc/tcg-target.inc.c:55 5: patch_reloc: Assertion `hi + lo == value' failed. Broken pipe FAIL GTester: last random seed: R02Sdc2c32b69bd880017ace08222ce46dd8 (pid=60174) FAIL: tests/boot-serial-test and on sparc64 host: QTEST_QEMU_BINARY=alpha-softmmu/qemu-system-alpha QTEST_QEMU_IMG=qemu-img MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))} gtester -k --verbose -m=quick tests/boot-serial-test tests/qmp-test tests/device-introspect-test tests/qom-test tests/test-hmp TEST: tests/boot-serial-test... (pid=15664) /alpha/boot-serial/clipper: qemu-system-alpha: /home/pm215/qemu/tcg/sparc/tcg-target.inc.c:319: patch_reloc: Assertion `check_fit_ptr(value, 13)' failed. Broken pipe FAIL GTester: last random seed: R02Se799092027459ef1507e239bdc0212a2 (pid=15801) FAIL: tests/boot-serial-test (same assert also fires for hppa boot-serial test and numerous other tests that run guest code) thanks -- PMM
Aside from r-b markers, there is only one minor change from v11. The check_operand_size assert loosened to allow 8-byte operation with a large (in this case 32-byte) clear. Previously we'd test the clear size and require the operation be a multiple of 16. This showed up during an AdvSIMD insn with SVE enabled. r~ The following changes since commit 17a5bbb44df9a4a79166332bc26e2d8ca6bd8fa8: Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-02-06' into staging (2018-02-07 16:26:01 +0000) are available in the Git repository at: git://github.com/rth7680/qemu.git tags/pull-tcg-20180207 for you to fetch changes up to b63799b11c17e8f1068dbd05c18cbb9c9aa69c56: tcg/aarch64: Add vector operations (2018-02-07 14:47:50 -0800) ---------------------------------------------------------------- tcg generic vectors ---------------------------------------------------------------- Richard Henderson (20): tcg: Allow multiple word entries into the constant pool tcg: Add types and basic operations for host vectors tcg: Standardize integral arguments to expanders tcg: Add generic vector expanders tcg: Add generic vector ops for constant shifts tcg: Add generic vector ops for comparisons tcg: Add generic vector ops for multiplication tcg: Add generic helpers for saturating arithmetic tcg: Add generic vector helpers with a scalar operand tcg/optimize: Handle vector opcodes during optimize target/arm: Align vector registers target/arm: Use vector infrastructure for aa64 add/sub/logic target/arm: Use vector infrastructure for aa64 mov/not/neg target/arm: Use vector infrastructure for aa64 dup/movi target/arm: Use vector infrastructure for aa64 constant shifts target/arm: Use vector infrastructure for aa64 compares target/arm: Use vector infrastructure for aa64 multiplies target/arm: Use vector infrastructure for aa64 orr/bic immediate tcg/i386: Add vector operations tcg/aarch64: Add vector operations Makefile.target | 4 +- accel/tcg/tcg-runtime.h | 118 +++ target/arm/cpu.h | 2 +- tcg/aarch64/tcg-target.h | 25 +- tcg/aarch64/tcg-target.opc.h | 3 + tcg/i386/tcg-target.h | 41 +- tcg/i386/tcg-target.opc.h | 13 + tcg/tcg-gvec-desc.h | 49 + tcg/tcg-op-gvec.h | 306 ++++++ tcg/tcg-op.h | 52 +- tcg/tcg-opc.h | 46 + tcg/tcg.h | 87 ++ accel/tcg/tcg-runtime-gvec.c | 997 +++++++++++++++++++ target/arm/translate-a64.c | 975 ++++++++++++++----- tcg/aarch64/tcg-target.inc.c | 588 ++++++++++- tcg/i386/tcg-target.inc.c | 987 ++++++++++++++++++- tcg/optimize.c | 150 +-- tcg/tcg-op-gvec.c | 2216 ++++++++++++++++++++++++++++++++++++++++++ tcg/tcg-op-vec.c | 389 ++++++++ tcg/tcg-op.c | 42 +- tcg/tcg-pool.inc.c | 115 ++- tcg/tcg.c | 125 ++- accel/tcg/Makefile.objs | 2 +- configure | 48 + tcg/README | 86 ++ 25 files changed, 6970 insertions(+), 496 deletions(-) create mode 100644 tcg/aarch64/tcg-target.opc.h create mode 100644 tcg/i386/tcg-target.opc.h create mode 100644 tcg/tcg-gvec-desc.h create mode 100644 tcg/tcg-op-gvec.h create mode 100644 accel/tcg/tcg-runtime-gvec.c create mode 100644 tcg/tcg-op-gvec.c create mode 100644 tcg/tcg-op-vec.c