| Message ID | 20180530181929.5066-4-ard.biesheuvel@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | More SynQuacer updates | expand |
On Wed, May 30, 2018 at 08:19:29PM +0200, Ard Biesheuvel wrote: > Add a description of the SMMU that sits in front of the NETSEC and > eMMC controllers to the IORT table so that ACPI based OSes can > utilize it. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Looks reasonable to me. Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> > --- > Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc | 109 +++++++++++++++++++- > 1 file changed, 107 insertions(+), 2 deletions(-) > > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc > index 92c485f8006f..3f2aaa3d8858 100644 > --- a/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc > @@ -13,6 +13,7 @@ > **/ > > #include <IndustryStandard/IoRemappingTable.h> > +#include <Platform/MemoryMap.h> > > #include "AcpiTables.h" > > @@ -29,10 +30,23 @@ typedef struct { > EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping; > } SYNQUACER_RC_NODE; > > +typedef struct { > + EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE Node; > + EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT Context[8]; > +} SYNQUACER_SMMU_NODE; > + > +typedef struct { > + EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE Node; > + CONST CHAR8 Name[11]; > + EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping; > +} SYNQUACER_NC_NODE; > + > typedef struct { > EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort; > SYNQUACER_ITS_NODE ItsNode; > SYNQUACER_RC_NODE RcNode[2]; > + SYNQUACER_SMMU_NODE SmmuNode; > + SYNQUACER_NC_NODE NamedCompNode[2]; > } SYNQUACER_IO_REMAPPING_STRUCTURE; > > #define __SYNQUACER_ID_MAPPING(In, Num, Out, Ref, Flags) \ > @@ -49,7 +63,7 @@ STATIC SYNQUACER_IO_REMAPPING_STRUCTURE Iort = { > __ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE, > SYNQUACER_IO_REMAPPING_STRUCTURE, > EFI_ACPI_IO_REMAPPING_TABLE_REVISION), > - 3, // NumNodes > + 6, // NumNodes > sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset > 0 // Reserved > }, { > @@ -94,7 +108,7 @@ STATIC SYNQUACER_IO_REMAPPING_STRUCTURE Iort = { > // > __SYNQUACER_ID_MAPPING(0x0, 0x0, 0x0, ItsNode, > EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE), > - }, { > + }, { > // PciRcNode > { > { > @@ -121,6 +135,97 @@ STATIC SYNQUACER_IO_REMAPPING_STRUCTURE Iort = { > __SYNQUACER_ID_MAPPING(0x0, 0x0, 0x0, ItsNode, > EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE), > } > + }, { > + // NETSEC/eMMC SMMU node > + { > + { > + EFI_ACPI_IORT_TYPE_SMMUv1v2, > + sizeof(SYNQUACER_SMMU_NODE), > + 0x0, > + 0x0, > + 0x0, > + 0x0, > + }, > + SYNQUACER_SCB_SMMU_BASE, > + SYNQUACER_SCB_SMMU_SIZE, > + EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500, > + EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK, > + FIELD_OFFSET(EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE, > + SMMU_NSgIrpt), > + 0x8, > + sizeof(EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE), > + 0x0, > + 0x0, > + 228, > + EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, > + 0x0, > + 0x0, > + }, { > + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, > + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, > + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, > + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, > + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, > + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, > + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, > + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, > + }, > + }, { > + { > + // NETSEC named component node > + { > + { > + EFI_ACPI_IORT_TYPE_NAMED_COMP, > + sizeof(SYNQUACER_NC_NODE), > + 0x0, > + 0x0, > + 0x1, > + FIELD_OFFSET(SYNQUACER_NC_NODE, RcIdMapping), > + }, > + 0x0, > + EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA, > + 0x0, > + 0x0, > + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM | > + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS, > + 40, > + }, { > + "\\_SB_.NET0" > + }, { > + 0x0, > + 0x0, > + 0x0, > + FIELD_OFFSET(SYNQUACER_IO_REMAPPING_STRUCTURE, SmmuNode), > + EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE > + } > + }, { > + // eMMC named component node > + { > + { > + EFI_ACPI_IORT_TYPE_NAMED_COMP, > + sizeof(SYNQUACER_NC_NODE), > + 0x0, > + 0x0, > + 0x1, > + FIELD_OFFSET(SYNQUACER_NC_NODE, RcIdMapping), > + }, > + 0x0, > + EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA, > + 0x0, > + 0x0, > + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM | > + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS, > + 40, > + }, { > + "\\_SB_.MMC0" > + }, { > + 0x0, > + 0x0, > + 0x0, > + FIELD_OFFSET(SYNQUACER_IO_REMAPPING_STRUCTURE, SmmuNode), > + EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE > + } > + } > } > }; > > -- > 2.17.0 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
On 31 May 2018 at 11:16, Leif Lindholm <leif.lindholm@linaro.org> wrote: > On Wed, May 30, 2018 at 08:19:29PM +0200, Ard Biesheuvel wrote: >> Add a description of the SMMU that sits in front of the NETSEC and >> eMMC controllers to the IORT table so that ACPI based OSes can >> utilize it. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > > Looks reasonable to me. > Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> > As it turns out, we don't actually need a SCP firmware update for this, and the other remaining issue (only 40 address bits wired up while the IP can driver 48) was fixed both in the Linux driver (and backported) and in the DMA layer, so let's enable this piece of functionality now. Note that DT boot will not enable the SMMU. Pushed as 8c3914c90ecd..a82113852ae1 >> --- >> Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc | 109 +++++++++++++++++++- >> 1 file changed, 107 insertions(+), 2 deletions(-) >> >> diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc >> index 92c485f8006f..3f2aaa3d8858 100644 >> --- a/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc >> +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc >> @@ -13,6 +13,7 @@ >> **/ >> >> #include <IndustryStandard/IoRemappingTable.h> >> +#include <Platform/MemoryMap.h> >> >> #include "AcpiTables.h" >> >> @@ -29,10 +30,23 @@ typedef struct { >> EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping; >> } SYNQUACER_RC_NODE; >> >> +typedef struct { >> + EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE Node; >> + EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT Context[8]; >> +} SYNQUACER_SMMU_NODE; >> + >> +typedef struct { >> + EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE Node; >> + CONST CHAR8 Name[11]; >> + EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping; >> +} SYNQUACER_NC_NODE; >> + >> typedef struct { >> EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort; >> SYNQUACER_ITS_NODE ItsNode; >> SYNQUACER_RC_NODE RcNode[2]; >> + SYNQUACER_SMMU_NODE SmmuNode; >> + SYNQUACER_NC_NODE NamedCompNode[2]; >> } SYNQUACER_IO_REMAPPING_STRUCTURE; >> >> #define __SYNQUACER_ID_MAPPING(In, Num, Out, Ref, Flags) \ >> @@ -49,7 +63,7 @@ STATIC SYNQUACER_IO_REMAPPING_STRUCTURE Iort = { >> __ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE, >> SYNQUACER_IO_REMAPPING_STRUCTURE, >> EFI_ACPI_IO_REMAPPING_TABLE_REVISION), >> - 3, // NumNodes >> + 6, // NumNodes >> sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset >> 0 // Reserved >> }, { >> @@ -94,7 +108,7 @@ STATIC SYNQUACER_IO_REMAPPING_STRUCTURE Iort = { >> // >> __SYNQUACER_ID_MAPPING(0x0, 0x0, 0x0, ItsNode, >> EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE), >> - }, { >> + }, { >> // PciRcNode >> { >> { >> @@ -121,6 +135,97 @@ STATIC SYNQUACER_IO_REMAPPING_STRUCTURE Iort = { >> __SYNQUACER_ID_MAPPING(0x0, 0x0, 0x0, ItsNode, >> EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE), >> } >> + }, { >> + // NETSEC/eMMC SMMU node >> + { >> + { >> + EFI_ACPI_IORT_TYPE_SMMUv1v2, >> + sizeof(SYNQUACER_SMMU_NODE), >> + 0x0, >> + 0x0, >> + 0x0, >> + 0x0, >> + }, >> + SYNQUACER_SCB_SMMU_BASE, >> + SYNQUACER_SCB_SMMU_SIZE, >> + EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500, >> + EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK, >> + FIELD_OFFSET(EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE, >> + SMMU_NSgIrpt), >> + 0x8, >> + sizeof(EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE), >> + 0x0, >> + 0x0, >> + 228, >> + EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, >> + 0x0, >> + 0x0, >> + }, { >> + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, >> + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, >> + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, >> + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, >> + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, >> + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, >> + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, >> + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, >> + }, >> + }, { >> + { >> + // NETSEC named component node >> + { >> + { >> + EFI_ACPI_IORT_TYPE_NAMED_COMP, >> + sizeof(SYNQUACER_NC_NODE), >> + 0x0, >> + 0x0, >> + 0x1, >> + FIELD_OFFSET(SYNQUACER_NC_NODE, RcIdMapping), >> + }, >> + 0x0, >> + EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA, >> + 0x0, >> + 0x0, >> + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM | >> + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS, >> + 40, >> + }, { >> + "\\_SB_.NET0" >> + }, { >> + 0x0, >> + 0x0, >> + 0x0, >> + FIELD_OFFSET(SYNQUACER_IO_REMAPPING_STRUCTURE, SmmuNode), >> + EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE >> + } >> + }, { >> + // eMMC named component node >> + { >> + { >> + EFI_ACPI_IORT_TYPE_NAMED_COMP, >> + sizeof(SYNQUACER_NC_NODE), >> + 0x0, >> + 0x0, >> + 0x1, >> + FIELD_OFFSET(SYNQUACER_NC_NODE, RcIdMapping), >> + }, >> + 0x0, >> + EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA, >> + 0x0, >> + 0x0, >> + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM | >> + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS, >> + 40, >> + }, { >> + "\\_SB_.MMC0" >> + }, { >> + 0x0, >> + 0x0, >> + 0x0, >> + FIELD_OFFSET(SYNQUACER_IO_REMAPPING_STRUCTURE, SmmuNode), >> + EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE >> + } >> + } >> } >> }; >> >> -- >> 2.17.0 >> _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc index 92c485f8006f..3f2aaa3d8858 100644 --- a/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc @@ -13,6 +13,7 @@ **/ #include <IndustryStandard/IoRemappingTable.h> +#include <Platform/MemoryMap.h> #include "AcpiTables.h" @@ -29,10 +30,23 @@ typedef struct { EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping; } SYNQUACER_RC_NODE; +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE Node; + EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT Context[8]; +} SYNQUACER_SMMU_NODE; + +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE Node; + CONST CHAR8 Name[11]; + EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping; +} SYNQUACER_NC_NODE; + typedef struct { EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort; SYNQUACER_ITS_NODE ItsNode; SYNQUACER_RC_NODE RcNode[2]; + SYNQUACER_SMMU_NODE SmmuNode; + SYNQUACER_NC_NODE NamedCompNode[2]; } SYNQUACER_IO_REMAPPING_STRUCTURE; #define __SYNQUACER_ID_MAPPING(In, Num, Out, Ref, Flags) \ @@ -49,7 +63,7 @@ STATIC SYNQUACER_IO_REMAPPING_STRUCTURE Iort = { __ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE, SYNQUACER_IO_REMAPPING_STRUCTURE, EFI_ACPI_IO_REMAPPING_TABLE_REVISION), - 3, // NumNodes + 6, // NumNodes sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset 0 // Reserved }, { @@ -94,7 +108,7 @@ STATIC SYNQUACER_IO_REMAPPING_STRUCTURE Iort = { // __SYNQUACER_ID_MAPPING(0x0, 0x0, 0x0, ItsNode, EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE), - }, { + }, { // PciRcNode { { @@ -121,6 +135,97 @@ STATIC SYNQUACER_IO_REMAPPING_STRUCTURE Iort = { __SYNQUACER_ID_MAPPING(0x0, 0x0, 0x0, ItsNode, EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE), } + }, { + // NETSEC/eMMC SMMU node + { + { + EFI_ACPI_IORT_TYPE_SMMUv1v2, + sizeof(SYNQUACER_SMMU_NODE), + 0x0, + 0x0, + 0x0, + 0x0, + }, + SYNQUACER_SCB_SMMU_BASE, + SYNQUACER_SCB_SMMU_SIZE, + EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500, + EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK, + FIELD_OFFSET(EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE, + SMMU_NSgIrpt), + 0x8, + sizeof(EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE), + 0x0, + 0x0, + 228, + EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, + 0x0, + 0x0, + }, { + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, + { 228, EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL, }, + }, + }, { + { + // NETSEC named component node + { + { + EFI_ACPI_IORT_TYPE_NAMED_COMP, + sizeof(SYNQUACER_NC_NODE), + 0x0, + 0x0, + 0x1, + FIELD_OFFSET(SYNQUACER_NC_NODE, RcIdMapping), + }, + 0x0, + EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA, + 0x0, + 0x0, + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM | + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS, + 40, + }, { + "\\_SB_.NET0" + }, { + 0x0, + 0x0, + 0x0, + FIELD_OFFSET(SYNQUACER_IO_REMAPPING_STRUCTURE, SmmuNode), + EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE + } + }, { + // eMMC named component node + { + { + EFI_ACPI_IORT_TYPE_NAMED_COMP, + sizeof(SYNQUACER_NC_NODE), + 0x0, + 0x0, + 0x1, + FIELD_OFFSET(SYNQUACER_NC_NODE, RcIdMapping), + }, + 0x0, + EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA, + 0x0, + 0x0, + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM | + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS, + 40, + }, { + "\\_SB_.MMC0" + }, { + 0x0, + 0x0, + 0x0, + FIELD_OFFSET(SYNQUACER_IO_REMAPPING_STRUCTURE, SmmuNode), + EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE + } + } } };
Add a description of the SMMU that sits in front of the NETSEC and eMMC controllers to the IORT table so that ACPI based OSes can utilize it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc | 109 +++++++++++++++++++- 1 file changed, 107 insertions(+), 2 deletions(-) -- 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel