diff mbox series

[v3,01/20] coresight: pmu: Adding ITRACE property to cs_etm PMU

Message ID 20190404033541.14072-2-mathieu.poirier@linaro.org
State Superseded
Headers show
Series coresight: Add support for CPU-wide trace scenarios | expand

Commit Message

Mathieu Poirier April 4, 2019, 3:35 a.m. UTC 
Add to the capabilities the ITRACE property so that ITRACE START events
are generated when the PMU is switched on by the core.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

---
 drivers/hwtracing/coresight/coresight-etm-perf.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

-- 
2.17.1

Comments

Suzuki K Poulose April 4, 2019, 8:48 a.m. UTC | #1 
On 04/04/2019 04:35, Mathieu Poirier wrote:
> Add to the capabilities the ITRACE property so that ITRACE START events

> are generated when the PMU is switched on by the core.

> 

> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

> ---


Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
diff mbox series

Patch

diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index 4d5a2b9f9d6a..25ae56e924bb 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -566,7 +566,8 @@  static int __init etm_perf_init(void)
 {
 	int ret;
 
-	etm_pmu.capabilities		= PERF_PMU_CAP_EXCLUSIVE;
+	etm_pmu.capabilities		= (PERF_PMU_CAP_EXCLUSIVE |
+					   PERF_PMU_CAP_ITRACE);
 
 	etm_pmu.attr_groups		= etm_pmu_attr_groups;
 	etm_pmu.task_ctx_nr		= perf_sw_context;