diff mbox series

[13/13] target/openrisc: Update cpu "any" to v1.3

Message ID 20190827000745.19645-14-richard.henderson@linaro.org
State Superseded
Headers show
Series target/openrisc updates | expand

Commit Message

Richard Henderson Aug. 27, 2019, 12:07 a.m. UTC 
Now that the two updates from v3.1 are implemented,
update the "any" cpu to enable it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/openrisc/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.17.1

Comments

Stafford Horne Aug. 27, 2019, 4:44 a.m. UTC | #1 
On Mon, Aug 26, 2019 at 05:07:45PM -0700, Richard Henderson wrote:
> Now that the two updates from v3.1 are implemented,

> update the "any" cpu to enable it.


It should say 1.3 not 3.1 above.

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Other than that.

Reviewed-by: Stafford Horne <shorne@gmail.com>
diff mbox series

Patch

diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index f96a69e278..506aec6bfb 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -129,7 +129,7 @@  static void openrisc_any_initfn(Object *obj)
 
     cpu->env.vr = 0x13000040;   /* Obsolete VER + UVRP for new SPRs */
     cpu->env.vr2 = 0;           /* No version specific id */
-    cpu->env.avr = 0x01010000;  /* Architecture v1.1 */
+    cpu->env.avr = 0x01030000;  /* Architecture v1.3 */
 
     cpu->env.upr = UPR_UP | UPR_DMP | UPR_IMP | UPR_PICP | UPR_TTP | UPR_PMP;
     cpu->env.cpucfgr = CPUCFGR_NSGF | CPUCFGR_OB32S | CPUCFGR_OF32S |