| Message ID | 20191219105130.29394-1-m.szyprowski@samsung.com |
|---|---|
| Headers | show |
| Series | Exynos5422: fix bus related OPPs for Odroid XU3/XU4/HC1 | expand |
On Thu, Dec 19, 2019 at 11:51:30AM +0100, Marek Szyprowski wrote: > Hardkernel's Odroid XU3/XU4/HC1 boards use bootloader, which configures top > PLLs to the following values: MPLL: 532MHz, CPLL: 666MHz and DPLL: 600MHz. > > Adjust all bus related OPPs to the values that are possible to derive from > the top PLL configured by the bootloader. Also add a comment for each bus > describing which PLL is used for it. > > The most significant change is the highest rate for wcore bus. It has been > increased to 532MHz as this is the value configured initially by the > bootloader. Also the voltage for this OPP is changed to match the value > set by the bootloader. > > This patch finally allows the buses to operate on the rates matching the > values set for each OPP and fixes the following warnings observed on boot: > > exynos-bus: new bus device registered: soc:bus_wcore ( 84000 KHz ~ 400000 KHz) > exynos-bus: new bus device registered: soc:bus_noc ( 67000 KHz ~ 100000 KHz) > exynos-bus: new bus device registered: soc:bus_fsys_apb (100000 KHz ~ 200000 KHz) > ... > exynos-bus soc:bus_wcore: dev_pm_opp_set_rate: failed to find current OPP for freq 532000000 (-34) > exynos-bus soc:bus_noc: dev_pm_opp_set_rate: failed to find current OPP for freq 111000000 (-34) > exynos-bus soc:bus_fsys_apb: dev_pm_opp_set_rate: failed to find current OPP for freq 222000000 (-34) > > The problem with setting incorrect (in some cases much lower) clock rate > for the defined OPP were there from the beginning, but went unnoticed > because the only way to observe it was to manually check the rate of the > respective clocks. The commit 4294a779bd8d ("PM / devfreq: exynos-bus: > Convert to use dev_pm_opp_set_rate()") finally revealed it, because it > enabled use of the generic code from the OPP framework, which issues the > above mentioned warnings. > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > Tested-by: Chanwoo Choi <cw00.choi@samsung.com> > Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> > --- > arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 76 +++++++++++-------- Thanks, applied. Best regards, Krzysztof
Dear All, Currently the only Exynos5422-based boards that support bus frequency scaling are Hardkernel's Odroid XU3/XU4/HC1. The recent changes in the devfreq framework revealed that some operating points for the defined busses cannot be applied, because the rates defined in the OPPs cannot be derived from the top PLL clocks (due to lack of common integer dividers). This issue has been first noticed by Lukasz Luba in: https://lkml.org/lkml/2019/7/15/276 To use the rates currently defined in the OPPs, one would need to change the rate and the topology of the top PLL clocks. The best place for such operation is the bootloader, because later when kernel boots, more and more devices (like UART, MMC, and so on) are enabled and get the clocks from those top PLLs. Changing the rate of the clock for the already enabled/operating device is very tricky. To avoid that issue I've decided to keep the current top PLL clocks configuration prepared by the bootloader on Odroid XU3/XU4/HC1 boards and adjust the OPPs for it. This means that the bus related OPPs are board dependant, so I've moved the to the respective DTS files. For other boards (for example Peach Pi/Pit Chromebooks), slightly different OPPs might need to be defined due to different clock topology and top PLLs rates configured by their bootloader. The provided approach is probably the simplest fix to let all busses operate on the highest possible speeds, which match the configuration applied initially by the bootloader. Best regards Marek Szyprowski Samsung R&D Institute Poland Changelog: v2: - removed incorrect 'opp-shared' property from bus_fsys_apb_opp_table - renamed dmc opp table to opp_table17 - added tags v1: https://patchwork.kernel.org/cover/11302803/ - initial version Patch summary: Marek Szyprowski (2): ARM: dts: exynos: Move bus related OPPs to the boards DTS ARM: dts: exynos: Adjust bus related OPPs to the values correct for Odroids arch/arm/boot/dts/exynos5420.dtsi | 259 ----------------- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 275 +++++++++++++++++- 2 files changed, 274 insertions(+), 260 deletions(-) -- 2.17.1