| Message ID | 20200110101802.4491-1-saiprakash.ranjan@codeaurora.org |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: qcom: sc7180: Add iommus property to QUP0 and QUP1 | expand |
Quoting Sai Prakash Ranjan (2020-01-10 02:18:02) > Define iommus property for QUP0 and QUP1 with the proper SID > and mask. Below SMMU global faults are seen without this during > boot and when using i2c touchscreen. > > QUP0: > arm-smmu 15000000.iommu: Unexpected global fault, this could be serious > arm-smmu 15000000.iommu: GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x00000043, GFSYNR2 0x00000000 > > QUP1: > arm-smmu 15000000.iommu: Unexpected global fault, this could be serious > arm-smmu 15000000.iommu: GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x000004c3, GFSYNR2 0x00000000 > > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Stephen Boyd <swboyd@chromium.org>
Hi, On Fri, Jan 10, 2020 at 2:18 AM Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> wrote: > > Define iommus property for QUP0 and QUP1 with the proper SID > and mask. Below SMMU global faults are seen without this during > boot and when using i2c touchscreen. > > QUP0: > arm-smmu 15000000.iommu: Unexpected global fault, this could be serious > arm-smmu 15000000.iommu: GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x00000043, GFSYNR2 0x00000000 > > QUP1: > arm-smmu 15000000.iommu: Unexpected global fault, this could be serious > arm-smmu 15000000.iommu: GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x000004c3, GFSYNR2 0x00000000 > > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 ++ > 1 file changed, 2 insertions(+) Fixes: ba3fc6496366 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1") Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org>
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 8011c5fe2a31..01e431f49c18 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -338,6 +338,7 @@ qupv3_id_0: geniqup@8c0000 { #address-cells = <2>; #size-cells = <2>; ranges; + iommus = <&apps_smmu 0x43 0x0>; status = "disabled"; i2c0: i2c@880000 { @@ -546,6 +547,7 @@ qupv3_id_1: geniqup@ac0000 { #address-cells = <2>; #size-cells = <2>; ranges; + iommus = <&apps_smmu 0x4c3 0x0>; status = "disabled"; i2c6: i2c@a80000 {
Define iommus property for QUP0 and QUP1 with the proper SID and mask. Below SMMU global faults are seen without this during boot and when using i2c touchscreen. QUP0: arm-smmu 15000000.iommu: Unexpected global fault, this could be serious arm-smmu 15000000.iommu: GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x00000043, GFSYNR2 0x00000000 QUP1: arm-smmu 15000000.iommu: Unexpected global fault, this could be serious arm-smmu 15000000.iommu: GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x000004c3, GFSYNR2 0x00000000 Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 ++ 1 file changed, 2 insertions(+)