Message ID | 20201217180638.22748-3-digetx@gmail.com |
---|---|
State | Accepted |
Commit | 7885db0ce77426df8bc82bb71d295263772afc3e |
Headers | show |
Series | Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs | expand |
22.12.2020 01:54, Rob Herring пишет: > On Thu, Dec 17, 2020 at 09:05:52PM +0300, Dmitry Osipenko wrote: >> Power domain fits much better than a voltage regulator in regards to >> a proper hardware description and from a software perspective as well. >> Hence replace the core regulator with the power domain. Note that this >> doesn't affect any existing DTBs because we haven't started to use the >> regulator yet, and thus, it's okay to change it. >> >> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> >> --- >> .../bindings/memory-controllers/nvidia,tegra30-emc.yaml | 6 +++--- >> 1 file changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml >> index 0a2e2c0d0fdd..7b4af9169b0b 100644 >> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml >> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml >> @@ -39,9 +39,9 @@ properties: >> description: >> Phandle of the Memory Controller node. >> >> - core-supply: >> + power-domains: >> description: >> - Phandle of voltage regulator of the SoC "core" power domain. >> + Phandle to the SoC "core" power domain. > > power-domains needs to define how many (maxItems). Okay, thanks.
diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml index 0a2e2c0d0fdd..7b4af9169b0b 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml @@ -39,9 +39,9 @@ properties: description: Phandle of the Memory Controller node. - core-supply: + power-domains: description: - Phandle of voltage regulator of the SoC "core" power domain. + Phandle to the SoC "core" power domain. operating-points-v2: description: @@ -241,7 +241,7 @@ examples: nvidia,memory-controller = <&mc>; operating-points-v2 = <&dvfs_opp_table>; - core-supply = <&vdd_core>; + power-domains = <&domain>; #interconnect-cells = <0>;
Power domain fits much better than a voltage regulator in regards to a proper hardware description and from a software perspective as well. Hence replace the core regulator with the power domain. Note that this doesn't affect any existing DTBs because we haven't started to use the regulator yet, and thus, it's okay to change it. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- .../bindings/memory-controllers/nvidia,tegra30-emc.yaml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)