diff mbox series

[v2,12/14] arm64: dts: qcom: sc7280: Add SPMI PMIC arbiter device for SC7280

Message ID 1614773878-8058-13-git-send-email-rnayak@codeaurora.org
State Superseded
Headers show
Series Add binding updates and DT files for SC7280 SoC | expand

Commit Message

Rajendra Nayak March 3, 2021, 12:17 p.m. UTC 
From: satya priya <skakit@codeaurora.org>

Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.

Signed-off-by: satya priya <skakit@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Comments

Stephen Boyd March 4, 2021, 12:12 a.m. UTC | #1 
Quoting Rajendra Nayak (2021-03-03 04:17:56)
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index fe4fdb9..aa6f847 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -239,6 +239,25 @@
>                         interrupt-controller;
>                 };
>  
> +               spmi_bus: spmi@c440000 {
> +                       compatible = "qcom,spmi-pmic-arb";
> +                       reg = <0 0x0c440000 0 0x1100>,
> +                             <0 0x0c600000 0 0x2000000>,
> +                             <0 0x0e600000 0 0x100000>,
> +                             <0 0x0e700000 0 0xa0000>,
> +                             <0 0x0c40a000 0 0x26000>;
> +                       reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
> +                       interrupt-names = "periph_irq";
> +                       interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
> +                       qcom,ee = <0>;
> +                       qcom,channel = <0>;
> +                       #address-cells = <1>;
> +                       #size-cells = <1>;

I see the binding says these should be 2 instead of 1 but I suspect that
is incorrect.

> +                       interrupt-controller;
> +                       #interrupt-cells = <4>;
> +                       cell-index = <0>;

Is cell-index used? Please remove as I don't see it used anywhere and
not in the binding.

> +               };
> +
>                 tlmm: pinctrl@f100000 {
>                         compatible = "qcom,sc7280-pinctrl";
>                         reg = <0 0x0f100000 0 0x1000000>;
Rajendra Nayak March 5, 2021, 5:44 a.m. UTC | #2 
On 3/4/2021 5:42 AM, Stephen Boyd wrote:
> Quoting Rajendra Nayak (2021-03-03 04:17:56)

>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi

>> index fe4fdb9..aa6f847 100644

>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi

>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi

>> @@ -239,6 +239,25 @@

>>                          interrupt-controller;

>>                  };

>>   

>> +               spmi_bus: spmi@c440000 {

>> +                       compatible = "qcom,spmi-pmic-arb";

>> +                       reg = <0 0x0c440000 0 0x1100>,

>> +                             <0 0x0c600000 0 0x2000000>,

>> +                             <0 0x0e600000 0 0x100000>,

>> +                             <0 0x0e700000 0 0xa0000>,

>> +                             <0 0x0c40a000 0 0x26000>;

>> +                       reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";

>> +                       interrupt-names = "periph_irq";

>> +                       interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;

>> +                       qcom,ee = <0>;

>> +                       qcom,channel = <0>;

>> +                       #address-cells = <1>;

>> +                       #size-cells = <1>;

> 

> I see the binding says these should be 2 instead of 1 but I suspect that

> is incorrect.


yeah looks like the bindings need to be fixed

> 

>> +                       interrupt-controller;

>> +                       #interrupt-cells = <4>;

>> +                       cell-index = <0>;

> 

> Is cell-index used? Please remove as I don't see it used anywhere and

> not in the binding.


I'll drop it. thanks

> 

>> +               };

>> +

>>                  tlmm: pinctrl@f100000 {

>>                          compatible = "qcom,sc7280-pinctrl";

>>                          reg = <0 0x0f100000 0 0x1000000>;


-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index fe4fdb9..aa6f847 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -239,6 +239,25 @@ 
 			interrupt-controller;
 		};
 
+		spmi_bus: spmi@c440000 {
+			compatible = "qcom,spmi-pmic-arb";
+			reg = <0 0x0c440000 0 0x1100>,
+			      <0 0x0c600000 0 0x2000000>,
+			      <0 0x0e600000 0 0x100000>,
+			      <0 0x0e700000 0 0xa0000>,
+			      <0 0x0c40a000 0 0x26000>;
+			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+			interrupt-names = "periph_irq";
+			interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,ee = <0>;
+			qcom,channel = <0>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			interrupt-controller;
+			#interrupt-cells = <4>;
+			cell-index = <0>;
+		};
+
 		tlmm: pinctrl@f100000 {
 			compatible = "qcom,sc7280-pinctrl";
 			reg = <0 0x0f100000 0 0x1000000>;