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[v1,0/8] GICv3 LPI and ITS feature implementation

Message ID 20210323041238.133835-1-shashi.mallela@linaro.org
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Series GICv3 LPI and ITS feature implementation | expand

Message

Shashi Mallela March 23, 2021, 4:12 a.m. UTC
This patchset implements qemu device model for enabling physical
LPI support and ITS functionality in GIC as per GICv3 specification.
Both flat table and 2 level tables are implemented.The ITS commands
for adding/deleting ITS table entries,trigerring LPI interrupts are 
implemented.Translated LPI interrupt ids are processed by redistributor
to determine priority and set pending state appropriately before
forwarding the same to cpu interface.
The ITS feature support has been added to sbsa-ref platform as well as
virt platform,wherein the emulated functionality co-exists with kvm
kernel functionality.

Shashi Mallela (8):
  hw/intc: GICv3 ITS initial framework
  hw/intc: GICv3 ITS register definitions added
  hw/intc: GICv3 ITS command queue framework
  hw/intc: GICv3 ITS Command processing
  hw/intc: GICv3 ITS Feature enablement
  hw/intc: GICv3 redistributor ITS processing
  hw/arm/sbsa-ref: add ITS support in SBSA GIC
  hw/arm/virt: add ITS support in virt GIC

 hw/arm/sbsa-ref.c                      |   26 +-
 hw/arm/virt.c                          |   10 +-
 hw/intc/arm_gicv3.c                    |    6 +
 hw/intc/arm_gicv3_common.c             |   16 +
 hw/intc/arm_gicv3_cpuif.c              |   15 +-
 hw/intc/arm_gicv3_dist.c               |   22 +-
 hw/intc/arm_gicv3_its.c                | 1417 ++++++++++++++++++++
 hw/intc/arm_gicv3_its_common.c         |   17 +-
 hw/intc/arm_gicv3_its_kvm.c            |    2 +-
 hw/intc/arm_gicv3_redist.c             |  155 ++-
 hw/intc/gicv3_internal.h               |  176 ++-
 hw/intc/meson.build                    |    1 +
 include/hw/intc/arm_gicv3_common.h     |   14 +
 include/hw/intc/arm_gicv3_its_common.h |   12 +-
 target/arm/kvm_arm.h                   |    4 +-
 15 files changed, 1869 insertions(+), 24 deletions(-)
 create mode 100644 hw/intc/arm_gicv3_its.c

-- 
2.27.0

Comments

Alex Bennée March 25, 2021, 5:59 p.m. UTC | #1
Shashi Mallela <shashi.mallela@linaro.org> writes:

> This patchset implements qemu device model for enabling physical

> LPI support and ITS functionality in GIC as per GICv3 specification.

> Both flat table and 2 level tables are implemented.The ITS commands

> for adding/deleting ITS table entries,trigerring LPI interrupts are 

> implemented.Translated LPI interrupt ids are processed by redistributor

> to determine priority and set pending state appropriately before

> forwarding the same to cpu interface.

> The ITS feature support has been added to sbsa-ref platform as well as

> virt platform,wherein the emulated functionality co-exists with kvm

> kernel functionality.


Running the kvm-unit-tests ITS set:

   env QEMU=$HOME/lsrc/qemu.git/builds/arm.all/qemu-system-aarch64 ./run_tests.sh -g its

with a patched unitests.cfg to remove the KVM requirement I get:

  PASS its-introspection (5 tests)
  FAIL its-trigger (6 tests, 1 unexpected failures)
  FAIL its-migration
  FAIL its-pending-migration (1 tests, 1 unexpected failures)
  SKIP its-migrate-unmapped-collection (1 tests, 1 skipped)

The its-migration asserts:

  Now migrate the VM, then press a key to continue...
  INFO: gicv3: its-migration: Migration complete
  INT dev_id=2 event_id=20
  /home/alex/lsrc/tests/kvm-unit-tests.git/lib/arm64/gic-v3-its-cmd.c:192: assert failed: false: INT timeout!
          STACK:

Full logs attached:
-- 
Alex Bennée
Alex Bennée March 25, 2021, 7:44 p.m. UTC | #2
Shashi Mallela <shashi.mallela@linaro.org> writes:

> This patchset implements qemu device model for enabling physical

> LPI support and ITS functionality in GIC as per GICv3 specification.

> Both flat table and 2 level tables are implemented.The ITS commands

> for adding/deleting ITS table entries,trigerring LPI interrupts are 

> implemented.Translated LPI interrupt ids are processed by redistributor

> to determine priority and set pending state appropriately before

> forwarding the same to cpu interface.

> The ITS feature support has been added to sbsa-ref platform as well as

> virt platform,wherein the emulated functionality co-exists with kvm

> kernel functionality.


OK I've finished my first pass. I didn't want to keep repeating myself
with the later patches. So in summary:

  - use REG/FIELD to avoid the manual mask definition/manipulation
  - define registers in the patch that first uses them
  - check LOG_UNIMP vs LOG_GUEST_ERROR (and possibly assert if it
    shouldn't happen)
  - and of course pass the kvm-unit-tests ITS tests ;-) 

Thanks,

>

> Shashi Mallela (8):

>   hw/intc: GICv3 ITS initial framework

>   hw/intc: GICv3 ITS register definitions added

>   hw/intc: GICv3 ITS command queue framework

>   hw/intc: GICv3 ITS Command processing

>   hw/intc: GICv3 ITS Feature enablement

>   hw/intc: GICv3 redistributor ITS processing

>   hw/arm/sbsa-ref: add ITS support in SBSA GIC

>   hw/arm/virt: add ITS support in virt GIC

>

>  hw/arm/sbsa-ref.c                      |   26 +-

>  hw/arm/virt.c                          |   10 +-

>  hw/intc/arm_gicv3.c                    |    6 +

>  hw/intc/arm_gicv3_common.c             |   16 +

>  hw/intc/arm_gicv3_cpuif.c              |   15 +-

>  hw/intc/arm_gicv3_dist.c               |   22 +-

>  hw/intc/arm_gicv3_its.c                | 1417 ++++++++++++++++++++

>  hw/intc/arm_gicv3_its_common.c         |   17 +-

>  hw/intc/arm_gicv3_its_kvm.c            |    2 +-

>  hw/intc/arm_gicv3_redist.c             |  155 ++-

>  hw/intc/gicv3_internal.h               |  176 ++-

>  hw/intc/meson.build                    |    1 +

>  include/hw/intc/arm_gicv3_common.h     |   14 +

>  include/hw/intc/arm_gicv3_its_common.h |   12 +-

>  target/arm/kvm_arm.h                   |    4 +-

>  15 files changed, 1869 insertions(+), 24 deletions(-)

>  create mode 100644 hw/intc/arm_gicv3_its.c



-- 
Alex Bennée