| Message ID | 20210429081151.17558-1-cl@rock-chips.com |
|---|---|
| Headers | show |
| Series | arm64: dts: rockchip: add basic dtsi/dts files for RK3568 SoC | expand |
On Thu, Apr 29, 2021 at 04:13:21PM +0800, cl@rock-chips.com wrote: > From: Liang Chen <cl@rock-chips.com> > > Current dts files with 'grf' nodes are manually verified. In order to > automate this process grf.txt has to be converted to YAML. > > Add new descriptions for: > "rockchip,rk3568-grf", "syscon", "simple-mfd" > "rockchip,rk3568-pmugrf", "syscon", "simple-mfd" > > Signed-off-by: Liang Chen <cl@rock-chips.com> > --- > .../devicetree/bindings/soc/rockchip/grf.txt | 61 ------------------- > .../devicetree/bindings/soc/rockchip/grf.yaml | 60 ++++++++++++++++++ > 2 files changed, 60 insertions(+), 61 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt > create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.yaml > > diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt b/Documentation/devicetree/bindings/soc/rockchip/grf.txt > deleted file mode 100644 > index f96511aa3897..000000000000 > --- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt > +++ /dev/null > @@ -1,61 +0,0 @@ > -* Rockchip General Register Files (GRF) > - > -The general register file will be used to do static set by software, which > -is composed of many registers for system control. > - > -From RK3368 SoCs, the GRF is divided into two sections, > -- GRF, used for general non-secure system, > -- SGRF, used for general secure system, > -- PMUGRF, used for always on system > - > -On RK3328 SoCs, the GRF adds a section for USB2PHYGRF, > - > -ON RK3308 SoC, the GRF is divided into four sections: > -- GRF, used for general non-secure system, > -- SGRF, used for general secure system, > -- DETECTGRF, used for audio codec system, > -- COREGRF, used for pvtm, > - > -Required Properties: > - > -- compatible: GRF should be one of the following: > - - "rockchip,px30-grf", "syscon": for px30 > - - "rockchip,rk3036-grf", "syscon": for rk3036 > - - "rockchip,rk3066-grf", "syscon": for rk3066 > - - "rockchip,rk3188-grf", "syscon": for rk3188 > - - "rockchip,rk3228-grf", "syscon": for rk3228 > - - "rockchip,rk3288-grf", "syscon": for rk3288 > - - "rockchip,rk3308-grf", "syscon": for rk3308 > - - "rockchip,rk3328-grf", "syscon": for rk3328 > - - "rockchip,rk3368-grf", "syscon": for rk3368 > - - "rockchip,rk3399-grf", "syscon": for rk3399 > - - "rockchip,rv1108-grf", "syscon": for rv1108 > -- compatible: DETECTGRF should be one of the following: > - - "rockchip,rk3308-detect-grf", "syscon": for rk3308 > -- compatilbe: COREGRF should be one of the following: > - - "rockchip,rk3308-core-grf", "syscon": for rk3308 > -- compatible: PMUGRF should be one of the following: > - - "rockchip,px30-pmugrf", "syscon": for px30 > - - "rockchip,rk3368-pmugrf", "syscon": for rk3368 > - - "rockchip,rk3399-pmugrf", "syscon": for rk3399 > -- compatible: SGRF should be one of the following: > - - "rockchip,rk3288-sgrf", "syscon": for rk3288 > -- compatible: USB2PHYGRF should be one of the following: > - - "rockchip,px30-usb2phy-grf", "syscon": for px30 > - - "rockchip,rk3328-usb2phy-grf", "syscon": for rk3328 > -- compatible: USBGRF should be one of the following: > - - "rockchip,rv1108-usbgrf", "syscon": for rv1108 > -- reg: physical base address of the controller and length of memory mapped > - region. > - > -Example: GRF and PMUGRF of RK3399 SoCs > - > - pmugrf: syscon@ff320000 { > - compatible = "rockchip,rk3399-pmugrf", "syscon"; > - reg = <0x0 0xff320000 0x0 0x1000>; > - }; > - > - grf: syscon@ff770000 { > - compatible = "rockchip,rk3399-grf", "syscon"; > - reg = <0x0 0xff770000 0x0 0x10000>; > - }; > diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml > new file mode 100644 > index 000000000000..93231b95554b > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml > @@ -0,0 +1,60 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/rockchip/grf.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip General Register Files > + > +maintainers: > + - Heiko Stuebner <heiko@sntech.de> > + > +properties: > + compatible: > + - items: The '-' is the source of your error. > + - enum: > + - rockchip,px30-grf > + - rockchip,px30-pmugrf > + - rockchip,px30-usb2phy-grf > + - rockchip,rk3036-grf > + - rockchip,rk3066-grf > + - rockchip,rk3188-grf > + - rockchip,rk3228-grf > + - rockchip,rk3288-grf > + - rockchip,rk3288-sgrf > + - rockchip,rk3308-core-grf > + - rockchip,rk3308-detect-grf > + - rockchip,rk3308-grf > + - rockchip,rk3328-grf > + - rockchip,rk3328-usb2phy-grf > + - rockchip,rk3368-grf > + - rockchip,rk3368-pmugrf > + - rockchip,rk3399-grf > + - rockchip,rk3399-pmugrf > + - rockchip,rk3568-grf > + - rockchip,rk3568-pmugrf > + - rockchip,rv1108-grf > + - rockchip,rv1108-usbgrf > + - const: syscon > + - const: simple-mfd 'simple-mfd' was not in the old binding. That implies you have child nodes, and if so, they need to be documented. I imagine that will mean splitting this into multiple schemas if that's the case. > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + pmugrf: syscon@ff320000 { > + compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd"; > + reg = <0xff320000 0x1000>; > + }; > + > + grf: syscon@ff770000 { > + compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; > + reg = <0xff770000 0x10000>; > + }; > -- > 2.17.1 > > >
On 4/29/21 11:24 PM, Rob Herring wrote: > On Thu, Apr 29, 2021 at 04:13:21PM +0800, cl@rock-chips.com wrote: >> From: Liang Chen <cl@rock-chips.com> >> >> Current dts files with 'grf' nodes are manually verified. In order to >> automate this process grf.txt has to be converted to YAML. >> >> Add new descriptions for: >> "rockchip,rk3568-grf", "syscon", "simple-mfd" >> "rockchip,rk3568-pmugrf", "syscon", "simple-mfd" >> >> Signed-off-by: Liang Chen <cl@rock-chips.com> >> --- [..] >> +properties: >> + compatible: >> + - items: > > The '-' is the source of your error. > >> + - enum: >> + - rockchip,px30-grf >> + - rockchip,px30-pmugrf >> + - rockchip,px30-usb2phy-grf >> + - rockchip,rk3036-grf >> + - rockchip,rk3066-grf >> + - rockchip,rk3188-grf >> + - rockchip,rk3228-grf >> + - rockchip,rk3288-grf >> + - rockchip,rk3288-sgrf >> + - rockchip,rk3308-core-grf >> + - rockchip,rk3308-detect-grf >> + - rockchip,rk3308-grf >> + - rockchip,rk3328-grf >> + - rockchip,rk3328-usb2phy-grf >> + - rockchip,rk3368-grf >> + - rockchip,rk3368-pmugrf >> + - rockchip,rk3399-grf >> + - rockchip,rk3399-pmugrf >> + - rockchip,rk3568-grf >> + - rockchip,rk3568-pmugrf >> + - rockchip,rv1108-grf >> + - rockchip,rv1108-usbgrf >> + - const: syscon >> + - const: simple-mfd > > 'simple-mfd' was not in the old binding. That implies you have child > nodes, and if so, they need to be documented. I imagine that will mean > splitting this into multiple schemas if that's the case. > Hi, Question for rob+dt: Given that a number of txt documents still are in need for YAML conversion. Which is a bit beyond the author of this serie. The core rk3568.dtsi is needed for other series to base on. To speed things up a bit and reduce the work load: Is it possible to add the grf compatibles in use first and do the rest of the subnodes for various SoCs later? Is it possible to add for now to reduce notification output: additionalProperties: true and then later: additionalProperties: false === From build log: #address-cells #size-cells reboot-mode io-domains usb2-phy@100 mipi-dphy-rx0 pcie-phy phy@f780 edp-phy usbphy lvds power-controller grf-gpio === Example for rk3399: grf: syscon@ff770000 { compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; io_domains: io-domains { compatible = "rockchip,rk3399-io-voltage-domain"; // rockchip-io-domain.txt }; mipi_dphy_rx0: mipi-dphy-rx0 { compatible = "rockchip,rk3399-mipi-dphy-rx0"; // rockchip-mipi-dphy-rx0.yaml }; u2phy0: usb2-phy@e450 { compatible = "rockchip,rk3399-usb2phy"; // phy-rockchip-inno-usb2.yaml }; u2phy1: usb2-phy@e460 { compatible = "rockchip,rk3399-usb2phy"; // phy-rockchip-inno-usb2.yaml }; emmc_phy: phy@f780 { compatible = "rockchip,rk3399-emmc-phy"; // rockchip-emmc-phy.txt }; pcie_phy: pcie-phy { compatible = "rockchip,rk3399-pcie-phy"; // rockchip-pcie-phy.txt }; };
On Thu, 29 Apr 2021 at 10:12, <cl@rock-chips.com> wrote: > > From: Liang Chen <cl@rock-chips.com> > > add "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc" for mmc nodes on > a rk3568 platform to rockchip-dw-mshc.yaml. > > Signed-off-by: Liang Chen <cl@rock-chips.com> Applied for next (and by amending the commit message according to Rob's suggestion), thanks! Kind regards Uffe > --- > .../devicetree/bindings/mmc/rockchip-dw-mshc.yaml | 9 +-------- > 1 file changed, 1 insertion(+), 8 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml > index 3762f1c8de96..eaa3b0ef24f6 100644 > --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml > +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml > @@ -29,21 +29,14 @@ properties: > - const: rockchip,rk3288-dw-mshc > - items: > - enum: > - # for Rockchip PX30 > - rockchip,px30-dw-mshc > - # for Rockchip RK3036 > - rockchip,rk3036-dw-mshc > - # for Rockchip RK322x > - rockchip,rk3228-dw-mshc > - # for Rockchip RK3308 > - rockchip,rk3308-dw-mshc > - # for Rockchip RK3328 > - rockchip,rk3328-dw-mshc > - # for Rockchip RK3368 > - rockchip,rk3368-dw-mshc > - # for Rockchip RK3399 > - rockchip,rk3399-dw-mshc > - # for Rockchip RV1108 > + - rockchip,rk3568-dw-mshc > - rockchip,rv1108-dw-mshc > - const: rockchip,rk3288-dw-mshc > > -- > 2.17.1 > > >
Hi, Am Donnerstag, 13. Mai 2021, 08:46:06 CEST schrieb cl@rock-chips.com: > From: Liang Chen <cl@rock-chips.com> > > The clock property need 2 items on some rockchip chips. > > Signed-off-by: Liang Chen <cl@rock-chips.com> this patch should definitly move over to Jianquns gpio driver series, as it introduces the usage of these new clocks. Also while the single-clock variant definitly doesn't need it, I think we may want clock-names "apb_pclk", "debounce-ref" for the 2-clock variants? Heiko > --- > Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > index d993e00..0d62c28 100644 > --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > @@ -22,7 +22,10 @@ properties: > maxItems: 1 > > clocks: > - maxItems: 1 > + minItems: 1 > + items: > + - description: APB interface clock source > + - description: GPIO debounce reference clock source > > gpio-controller: true > >
On Thu, Apr 29, 2021 at 04:11:42PM +0800, cl@rock-chips.com wrote: > From: Liang Chen <cl@rock-chips.com> > > add "rockchip,rk3568-i2c", "rockchip,rk3399-i2c" for i2c nodes on > a rk3568 platform to i2c-rk3x.yaml. > > Signed-off-by: Liang Chen <cl@rock-chips.com> Applied to for-next, thanks!
Hi Jay, Am Freitag, 18. Juni 2021, 08:41:45 CEST schrieb jay.xu@rock-chips.com: > Hi Heiko > > -------------- > jay.xu@rock-chips.com > >Hi, > > > >Am Donnerstag, 13. Mai 2021, 08:46:06 CEST schrieb cl@rock-chips.com: > >> From: Liang Chen <cl@rock-chips.com> > >> > >> The clock property need 2 items on some rockchip chips. > >> > >> Signed-off-by: Liang Chen <cl@rock-chips.com> > > > >this patch should definitly move over to Jianquns gpio driver series, > >as it introduces the usage of these new clocks. > > > >Also while the single-clock variant definitly doesn't need it, > >I think we may want clock-names "apb_pclk", "debounce-ref" for the > >2-clock variants? > > > Okay, I think it's very good idea, > but is it possible to post the reg-name patch after these dts serial and gpio serial patches ? You're already creating a new binding when changing the max-items. So when we change that again later, in theory you'd need to support both cases (with and without clock-names) So I'd really prefer to get the binding right the first time and identifying multiple clocks by clock-names instead of an implicit ordering is way better in the long run as well. Heiko > > > > >Heiko > > > >> --- > >> Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 5 ++++- > >> 1 file changed, 4 insertions(+), 1 deletion(-) > >> > >> diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > >> index d993e00..0d62c28 100644 > >> --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > >> +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > >> @@ -22,7 +22,10 @@ properties: > >> maxItems: 1 > >> > >> clocks: > >> - maxItems: 1 > >> + minItems: 1 > >> + items: > >> + - description: APB interface clock source > >> + - description: GPIO debounce reference clock source > >> > >> gpio-controller: true > >> > >> > > > > > > > > > > > > > > >
From: Liang Chen <cl@rock-chips.com> v1: 1. add some dt-bindings for RK3568 devices. 2. add core dtsi for RK3568 SoC. 3. add basic dts for RK3568 EVB v2: 1. sort device nodes by some rules. v3: 1. make ARCH=arm64 dtbs_check, then fix some errors and add some documents. v4: 1. make ARCH=arm64 dt_binding_check, then fix grf.yaml. 2. correct gic node. Liang Chen (10): dt-bindings: i2c: i2c-rk3x: add description for rk3568 dt-bindings: serial: snps-dw-apb-uart: add description for rk3568 dt-bindings: mmc: rockchip-dw-mshc: add description for rk3568 dt-bindings: watchdog: dw-wdt: add description for rk3568 dt-bindings: pwm: rockchip: add description for rk3568 dt-bindings: gpio: change items restriction of clock for rockchip,gpio-bank dt-bindings: soc: rockchip: Convert grf.txt to YAML arm64: dts: rockchip: add generic pinconfig settings used by most Rockchip socs arm64: dts: rockchip: add core dtsi for RK3568 SoC arm64: dts: rockchip: add basic dts for RK3568 EVB .../devicetree/bindings/arm/rockchip.yaml | 5 + .../bindings/gpio/rockchip,gpio-bank.yaml | 3 +- .../devicetree/bindings/i2c/i2c-rk3x.yaml | 1 + .../bindings/mmc/rockchip-dw-mshc.yaml | 9 +- .../devicetree/bindings/pwm/pwm-rockchip.yaml | 1 + .../bindings/serial/snps-dw-apb-uart.yaml | 1 + .../devicetree/bindings/soc/rockchip/grf.txt | 61 - .../devicetree/bindings/soc/rockchip/grf.yaml | 60 + .../bindings/watchdog/snps,dw-wdt.yaml | 1 + arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-evb1-v10.dts | 79 + .../boot/dts/rockchip/rk3568-pinctrl.dtsi | 3111 +++++++++++++++++ arch/arm64/boot/dts/rockchip/rk3568.dtsi | 779 +++++ .../boot/dts/rockchip/rockchip-pinconf.dtsi | 344 ++ 14 files changed, 4386 insertions(+), 70 deletions(-) delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.yaml create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3568.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi