Message ID | 20210514213032.575161-1-arnd@kernel.org |
---|---|
State | New |
Headers | show |
Series | drm/msm/dsi: fix 32-bit clang warning | expand |
On 5/14/2021 2:30 PM, Arnd Bergmann wrote: > From: Arnd Bergmann <arnd@arndb.de> > > clang is a little overzealous with warning about a constant conversion > in an untaken branch of a ternary expression: > > drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c:975:48: error: implicit conversion from 'unsigned long long' to 'unsigned long' changes value from 5000000000 to 705032704 [-Werror,-Wconstant-conversion] > .max_pll_rate = (5000000000ULL < ULONG_MAX) ? 5000000000UL : ULONG_MAX, > ^~~~~~~~~~~~ > > Rewrite this to use a preprocessor conditional instead to avoid the > warning. > > Fixes: 076437c9e360 ("drm/msm/dsi: move min/max PLL rate to phy config") > Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Nathan Chancellor <nathan@kernel.org> > --- > As found with another patch, using __builtin_choose_expr() would > likely also work here, but doesn't seem any more readable. > --- > drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c > index e76ce40a12ab..accd6b4eb7c2 100644 > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c > @@ -972,7 +972,11 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs = { > .restore_pll_state = dsi_7nm_pll_restore_state, > }, > .min_pll_rate = 600000000UL, > - .max_pll_rate = (5000000000ULL < ULONG_MAX) ? 5000000000ULL : ULONG_MAX, > +#ifdef CONFIG_64BIT > + .max_pll_rate = 5000000000UL, > +#else > + .max_pll_rate = ULONG_MAX, > +#endif > .io_start = { 0xae94400, 0xae96400 }, > .num_dsi_phy = 2, > .quirks = DSI_PHY_7NM_QUIRK_V4_1, >
On Sat, 15 May 2021 at 00:31, Arnd Bergmann <arnd@kernel.org> wrote: > > From: Arnd Bergmann <arnd@arndb.de> > > clang is a little overzealous with warning about a constant conversion > in an untaken branch of a ternary expression: > > drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c:975:48: error: implicit conversion from 'unsigned long long' to 'unsigned long' changes value from 5000000000 to 705032704 [-Werror,-Wconstant-conversion] > .max_pll_rate = (5000000000ULL < ULONG_MAX) ? 5000000000UL : ULONG_MAX, > ^~~~~~~~~~~~ > > Rewrite this to use a preprocessor conditional instead to avoid the > warning. > > Fixes: 076437c9e360 ("drm/msm/dsi: move min/max PLL rate to phy config") > Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > As found with another patch, using __builtin_choose_expr() would > likely also work here, but doesn't seem any more readable. > --- > drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c > index e76ce40a12ab..accd6b4eb7c2 100644 > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c > @@ -972,7 +972,11 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs = { > .restore_pll_state = dsi_7nm_pll_restore_state, > }, > .min_pll_rate = 600000000UL, > - .max_pll_rate = (5000000000ULL < ULONG_MAX) ? 5000000000ULL : ULONG_MAX, > +#ifdef CONFIG_64BIT > + .max_pll_rate = 5000000000UL, > +#else > + .max_pll_rate = ULONG_MAX, > +#endif > .io_start = { 0xae94400, 0xae96400 }, > .num_dsi_phy = 2, > .quirks = DSI_PHY_7NM_QUIRK_V4_1, > -- > 2.29.2 >
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c index e76ce40a12ab..accd6b4eb7c2 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c @@ -972,7 +972,11 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs = { .restore_pll_state = dsi_7nm_pll_restore_state, }, .min_pll_rate = 600000000UL, - .max_pll_rate = (5000000000ULL < ULONG_MAX) ? 5000000000ULL : ULONG_MAX, +#ifdef CONFIG_64BIT + .max_pll_rate = 5000000000UL, +#else + .max_pll_rate = ULONG_MAX, +#endif .io_start = { 0xae94400, 0xae96400 }, .num_dsi_phy = 2, .quirks = DSI_PHY_7NM_QUIRK_V4_1,