| Message ID | 20210514192218.13022-7-prabhakar.mahadev-lad.rj@bp.renesas.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support | expand |
On Fri, 14 May 2021 20:22:08 +0100, Lad Prabhakar wrote: > RZ/G2{L,LC,UL} SoC's have LSI_DEVID register to retrieve SoC product and > revision information. > > RZ/G{L,LC,UL} SoC's have 28-bit product-id compared to other R-Car and > RZ/G2{E,H,M,N} SoC's hence a new compatible string "renesas,devid" is > added. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > Documentation/devicetree/bindings/arm/renesas,prr.yaml | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > Acked-by: Rob Herring <robh@kernel.org>
Hi Prabhakar, On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > RZ/G2{L,LC,UL} SoC's have LSI_DEVID register to retrieve SoC product and > revision information. > > RZ/G{L,LC,UL} SoC's have 28-bit product-id compared to other R-Car and > RZ/G2{E,H,M,N} SoC's hence a new compatible string "renesas,devid" is > added. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Thanks for your patch! > --- a/Documentation/devicetree/bindings/arm/renesas,prr.yaml > +++ b/Documentation/devicetree/bindings/arm/renesas,prr.yaml > @@ -12,14 +12,16 @@ maintainers: > > description: | > Most Renesas ARM SoCs have a Product Register or Boundary Scan ID > - Register that allows to retrieve SoC product and revision information. > - If present, a device node for this register should be added. > + Register or LSI Device ID Register that allows to retrieve SoC product > + and revision information. If present, a device node for this register > + should be added. Note that this register does not seem to be documented, so I have to trust you on this. However, from looking at the LSI DEVID register address, this does not seem to be a lone register (like the Product Register on other SoCs), but to be part of the System Controller (SYSC). Hence I think there should be separate bindings for the whole SYSC block instead. You can still read the LSI DEVID register from renesas_soc_init(), using the SYSC node. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/Documentation/devicetree/bindings/arm/renesas,prr.yaml b/Documentation/devicetree/bindings/arm/renesas,prr.yaml index 1f80767da38b..94afeccba29f 100644 --- a/Documentation/devicetree/bindings/arm/renesas,prr.yaml +++ b/Documentation/devicetree/bindings/arm/renesas,prr.yaml @@ -12,14 +12,16 @@ maintainers: description: | Most Renesas ARM SoCs have a Product Register or Boundary Scan ID - Register that allows to retrieve SoC product and revision information. - If present, a device node for this register should be added. + Register or LSI Device ID Register that allows to retrieve SoC product + and revision information. If present, a device node for this register + should be added. properties: compatible: enum: - renesas,prr - renesas,bsid + - renesas,devid reg: maxItems: 1
RZ/G2{L,LC,UL} SoC's have LSI_DEVID register to retrieve SoC product and revision information. RZ/G{L,LC,UL} SoC's have 28-bit product-id compared to other R-Car and RZ/G2{E,H,M,N} SoC's hence a new compatible string "renesas,devid" is added. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> --- Documentation/devicetree/bindings/arm/renesas,prr.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)