| Message ID | 20210521055715.1844707-1-sr@denx.de |
|---|---|
| State | New |
| Headers | show |
| Series | [net] net: ethernet: mtk_eth_soc: Fix packet statistics support for MT7628/88 | expand |
From: Stefan Roese <sr@denx.de> Date: Fri, 21 May 2021 07:57:15 +0200 > The MT7628/88 SoC(s) have other (limited) packet counter registers than > currently supported in the mtk_eth_soc driver. This patch adds support > for reading these registers, so that the packet statistics are correctly > updated. > > Signed-off-by: Stefan Roese <sr@denx.de> > Fixes: 296c9120752b ("net: ethernet: mediatek: Add MT7628/88 SoC support") > Cc: Felix Fietkau <nbd@nbd.name> > Cc: John Crispin <john@phrozen.org> > Cc: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> > Cc: Reto Schneider <code@reto-schneider.ch> > Cc: Reto Schneider <reto.schneider@husqvarnagroup.com> > Cc: David S. Miller <davem@davemloft.net> > --- > drivers/net/ethernet/mediatek/mtk_eth_soc.c | 56 ++++++++++++--------- > drivers/net/ethernet/mediatek/mtk_eth_soc.h | 7 +++ > 2 files changed, 40 insertions(+), 23 deletions(-) > > + unsigned int base = MTK_GDM1_TX_GBCNT + hw_stats->reg_offset; > + u64 stats; > + > + hw_stats->rx_bytes += mtk_r32(mac->hw, base); > + stats = mtk_r32(mac->hw, base + 0x04); > + if (stats) > + hw_stats->rx_bytes += (stats << 32); > + hw_stats->rx_packets += mtk_r32(mac->hw, base + 0x08); > + hw_stats->rx_overflow += mtk_r32(mac->hw, base + 0x10); > + hw_stats->rx_fcs_errors += mtk_r32(mac->hw, base + 0x14); > + hw_stats->rx_short_errors += mtk_r32(mac->hw, base + 0x18); > + hw_stats->rx_long_errors += mtk_r32(mac->hw, base + 0x1c); > + hw_stats->rx_checksum_errors += mtk_r32(mac->hw, base + 0x20); > + hw_stats->rx_flow_control_packets += > + mtk_r32(mac->hw, base + 0x24); > + hw_stats->tx_skip += mtk_r32(mac->hw, base + 0x28); > + hw_stats->tx_collisions += mtk_r32(mac->hw, base + 0x2c); > + hw_stats->tx_bytes += mtk_r32(mac->hw, base + 0x30); > + stats = mtk_r32(mac->hw, base + 0x34); > + if (stats) > + hw_stats->tx_bytes += (stats << 32); > + hw_stats->tx_packets += mtk_r32(mac->hw, base + 0x38); > > +/* Counter / stat register */ > +#define MT7628_SDM_TPCNT (MT7628_SDM_OFFSET + 0x100) > +#define MT7628_SDM_TBCNT (MT7628_SDM_OFFSET + 0x104) > +#define MT7628_SDM_RPCNT (MT7628_SDM_OFFSET + 0x108) > +#define MT7628_SDM_RBCNT (MT7628_SDM_OFFSET + 0x10c) > +#define MT7628_SDM_CS_ERR (MT7628_SDM_OFFSET + 0x110) > + The other stats/cpunter regs should be properly defined like this too. Thank you.
On 21.05.21 23:37, David Miller wrote: > From: Stefan Roese <sr@denx.de> > Date: Fri, 21 May 2021 07:57:15 +0200 > >> The MT7628/88 SoC(s) have other (limited) packet counter registers than >> currently supported in the mtk_eth_soc driver. This patch adds support >> for reading these registers, so that the packet statistics are correctly >> updated. >> >> Signed-off-by: Stefan Roese <sr@denx.de> >> Fixes: 296c9120752b ("net: ethernet: mediatek: Add MT7628/88 SoC support") >> Cc: Felix Fietkau <nbd@nbd.name> >> Cc: John Crispin <john@phrozen.org> >> Cc: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> >> Cc: Reto Schneider <code@reto-schneider.ch> >> Cc: Reto Schneider <reto.schneider@husqvarnagroup.com> >> Cc: David S. Miller <davem@davemloft.net> >> --- >> drivers/net/ethernet/mediatek/mtk_eth_soc.c | 56 ++++++++++++--------- >> drivers/net/ethernet/mediatek/mtk_eth_soc.h | 7 +++ >> 2 files changed, 40 insertions(+), 23 deletions(-) >> >> + unsigned int base = MTK_GDM1_TX_GBCNT + hw_stats->reg_offset; >> + u64 stats; >> + >> + hw_stats->rx_bytes += mtk_r32(mac->hw, base); >> + stats = mtk_r32(mac->hw, base + 0x04); >> + if (stats) >> + hw_stats->rx_bytes += (stats << 32); >> + hw_stats->rx_packets += mtk_r32(mac->hw, base + 0x08); >> + hw_stats->rx_overflow += mtk_r32(mac->hw, base + 0x10); >> + hw_stats->rx_fcs_errors += mtk_r32(mac->hw, base + 0x14); >> + hw_stats->rx_short_errors += mtk_r32(mac->hw, base + 0x18); >> + hw_stats->rx_long_errors += mtk_r32(mac->hw, base + 0x1c); >> + hw_stats->rx_checksum_errors += mtk_r32(mac->hw, base + 0x20); >> + hw_stats->rx_flow_control_packets += >> + mtk_r32(mac->hw, base + 0x24); >> + hw_stats->tx_skip += mtk_r32(mac->hw, base + 0x28); >> + hw_stats->tx_collisions += mtk_r32(mac->hw, base + 0x2c); >> + hw_stats->tx_bytes += mtk_r32(mac->hw, base + 0x30); >> + stats = mtk_r32(mac->hw, base + 0x34); >> + if (stats) >> + hw_stats->tx_bytes += (stats << 32); >> + hw_stats->tx_packets += mtk_r32(mac->hw, base + 0x38); >> >> +/* Counter / stat register */ >> +#define MT7628_SDM_TPCNT (MT7628_SDM_OFFSET + 0x100) >> +#define MT7628_SDM_TBCNT (MT7628_SDM_OFFSET + 0x104) >> +#define MT7628_SDM_RPCNT (MT7628_SDM_OFFSET + 0x108) >> +#define MT7628_SDM_RBCNT (MT7628_SDM_OFFSET + 0x10c) >> +#define MT7628_SDM_CS_ERR (MT7628_SDM_OFFSET + 0x110) >> + > > The other stats/cpunter regs should be properly defined like this too. Okay. Will send v2 with this change shortly. Thanks, Stefan
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c index d6cc06ee0caa..ba9a49186909 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c @@ -681,32 +681,42 @@ static int mtk_set_mac_address(struct net_device *dev, void *p) void mtk_stats_update_mac(struct mtk_mac *mac) { struct mtk_hw_stats *hw_stats = mac->hw_stats; - unsigned int base = MTK_GDM1_TX_GBCNT; - u64 stats; - - base += hw_stats->reg_offset; + struct mtk_eth *eth = mac->hw; u64_stats_update_begin(&hw_stats->syncp); - hw_stats->rx_bytes += mtk_r32(mac->hw, base); - stats = mtk_r32(mac->hw, base + 0x04); - if (stats) - hw_stats->rx_bytes += (stats << 32); - hw_stats->rx_packets += mtk_r32(mac->hw, base + 0x08); - hw_stats->rx_overflow += mtk_r32(mac->hw, base + 0x10); - hw_stats->rx_fcs_errors += mtk_r32(mac->hw, base + 0x14); - hw_stats->rx_short_errors += mtk_r32(mac->hw, base + 0x18); - hw_stats->rx_long_errors += mtk_r32(mac->hw, base + 0x1c); - hw_stats->rx_checksum_errors += mtk_r32(mac->hw, base + 0x20); - hw_stats->rx_flow_control_packets += - mtk_r32(mac->hw, base + 0x24); - hw_stats->tx_skip += mtk_r32(mac->hw, base + 0x28); - hw_stats->tx_collisions += mtk_r32(mac->hw, base + 0x2c); - hw_stats->tx_bytes += mtk_r32(mac->hw, base + 0x30); - stats = mtk_r32(mac->hw, base + 0x34); - if (stats) - hw_stats->tx_bytes += (stats << 32); - hw_stats->tx_packets += mtk_r32(mac->hw, base + 0x38); + if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { + hw_stats->tx_packets += mtk_r32(mac->hw, MT7628_SDM_TPCNT); + hw_stats->tx_bytes += mtk_r32(mac->hw, MT7628_SDM_TBCNT); + hw_stats->rx_packets += mtk_r32(mac->hw, MT7628_SDM_RPCNT); + hw_stats->rx_bytes += mtk_r32(mac->hw, MT7628_SDM_RBCNT); + hw_stats->rx_checksum_errors += + mtk_r32(mac->hw, MT7628_SDM_CS_ERR); + } else { + unsigned int base = MTK_GDM1_TX_GBCNT + hw_stats->reg_offset; + u64 stats; + + hw_stats->rx_bytes += mtk_r32(mac->hw, base); + stats = mtk_r32(mac->hw, base + 0x04); + if (stats) + hw_stats->rx_bytes += (stats << 32); + hw_stats->rx_packets += mtk_r32(mac->hw, base + 0x08); + hw_stats->rx_overflow += mtk_r32(mac->hw, base + 0x10); + hw_stats->rx_fcs_errors += mtk_r32(mac->hw, base + 0x14); + hw_stats->rx_short_errors += mtk_r32(mac->hw, base + 0x18); + hw_stats->rx_long_errors += mtk_r32(mac->hw, base + 0x1c); + hw_stats->rx_checksum_errors += mtk_r32(mac->hw, base + 0x20); + hw_stats->rx_flow_control_packets += + mtk_r32(mac->hw, base + 0x24); + hw_stats->tx_skip += mtk_r32(mac->hw, base + 0x28); + hw_stats->tx_collisions += mtk_r32(mac->hw, base + 0x2c); + hw_stats->tx_bytes += mtk_r32(mac->hw, base + 0x30); + stats = mtk_r32(mac->hw, base + 0x34); + if (stats) + hw_stats->tx_bytes += (stats << 32); + hw_stats->tx_packets += mtk_r32(mac->hw, base + 0x38); + } + u64_stats_update_end(&hw_stats->syncp); } diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h index 11331b44ba07..42968c7141da 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h @@ -502,6 +502,13 @@ #define MT7628_SDM_MAC_ADRL (MT7628_SDM_OFFSET + 0x0c) #define MT7628_SDM_MAC_ADRH (MT7628_SDM_OFFSET + 0x10) +/* Counter / stat register */ +#define MT7628_SDM_TPCNT (MT7628_SDM_OFFSET + 0x100) +#define MT7628_SDM_TBCNT (MT7628_SDM_OFFSET + 0x104) +#define MT7628_SDM_RPCNT (MT7628_SDM_OFFSET + 0x108) +#define MT7628_SDM_RBCNT (MT7628_SDM_OFFSET + 0x10c) +#define MT7628_SDM_CS_ERR (MT7628_SDM_OFFSET + 0x110) + struct mtk_rx_dma { unsigned int rxd1; unsigned int rxd2;
The MT7628/88 SoC(s) have other (limited) packet counter registers than currently supported in the mtk_eth_soc driver. This patch adds support for reading these registers, so that the packet statistics are correctly updated. Signed-off-by: Stefan Roese <sr@denx.de> Fixes: 296c9120752b ("net: ethernet: mediatek: Add MT7628/88 SoC support") Cc: Felix Fietkau <nbd@nbd.name> Cc: John Crispin <john@phrozen.org> Cc: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Cc: Reto Schneider <code@reto-schneider.ch> Cc: Reto Schneider <reto.schneider@husqvarnagroup.com> Cc: David S. Miller <davem@davemloft.net> --- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 56 ++++++++++++--------- drivers/net/ethernet/mediatek/mtk_eth_soc.h | 7 +++ 2 files changed, 40 insertions(+), 23 deletions(-)