[RESEND,v7,0/5] clk: ti: add am33xx spread spectrum clock support

As reported by the TI spruh73x/spruhl7x RM, MPU and LCD modules support
spread spectrum clocking (SSC) on their output clocks. SSC is used to
spread the spectral peaking of the clock to reduce any electromagnetic
interference (EMI) that may be caused due to the clock’s fundamental
or any of its harmonics.
The series allows you to enable and adjust the spread spectrum clocking
for all am33xx/am43xx PLLs for which it is supported.

As suggested by Tony Lindgren I resend the whole series to the clk tree.
For Tony the series is ok.

Changes in v7:
- Add Tony Lindgren acked tag.

Changes in v6:
- Add Tero Kristo review tag.

Changes in v5:
- Remove ssc_ack_mask field from dpll_data structure. It was not used.
- Change ssc_downspread type from u8 to bool in dpll_data structure.

Changes in v4:
- Add Stephen Boyd review tag.
- Add Rob Herring review tag.
- Add SSC registers for CORE, DDR and PER PLLs.
- Update commit message.
- Update commit message.

Changes in v3:
- Add '-hz' suffix to "ti,ssc-modfreq" binding.
- Add Tony Lindgren acked tag.
- Use "ti,ssc-modfreq-hz" binding instead of "ti,ssc-modfreq".

Changes in v2:
- Remove SSC registers from dpll_core_ck@490 node (SSC is not supported)
- Add SSC registers to dpll_mpu_ck@488 node.
- Move the DT changes to the previous patch in the series.

Dario Binacchi (5):
  clk: ti: fix typo in routine description
  dt-bindings: ti: dpll: add spread spectrum support
  ARM: dts: am33xx-clocks: add spread spectrum support
  ARM: dts: am43xx-clocks: add spread spectrum support
  clk: ti: add am33xx/am43xx spread spectrum clock support

 .../devicetree/bindings/clock/ti/dpll.txt     | 20 +++++
 arch/arm/boot/dts/am33xx-clocks.dtsi          | 10 +--
 arch/arm/boot/dts/am43xx-clocks.dtsi          | 12 +--
 drivers/clk/ti/dpll.c                         | 39 +++++++++
 drivers/clk/ti/dpll3xxx.c                     | 87 ++++++++++++++++++-
 include/linux/clk/ti.h                        | 22 +++++
 6 files changed, 178 insertions(+), 12 deletions(-)

Quoting Dario Binacchi (2021-06-06 13:22:49)
> Replace _omap3_noncore_dpll_program with omap3_noncore_dpll_program.

> 

> Signed-off-by: Dario Binacchi <dariobin@libero.it>

> Reviewed-by: Stephen Boyd <sboyd@kernel.org>

> 

> ---


Applied to clk-next

Quoting Dario Binacchi (2021-06-06 13:22:51)
> Registers for adjusting the spread spectrum clocking (SSC) have been
> added. As reported by the TI spruh73x RM, SSC is supported only for LCD
> and MPU PLLs, but the CM_SSC_DELTAMSTEP_DPLL_XXX and
> CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field in the
> CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE, MPU, DDR,
> PER, DISP).
> 
> Signed-off-by: Dario Binacchi <dariobin@libero.it>
> Acked-by: Tony Lindgren <tony@atomide.com>
> 
> ---

Applied to clk-next

Quoting Dario Binacchi (2021-06-06 13:22:53)
> The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs.

> As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for

> the DISP/LCD and MPU PLLs on am33xx/am43xx. SSC is not supported for

> DDR, PER, and CORE PLLs.

> 

> Calculating the required values and setting the registers accordingly

> was taken from the set_mpu_spreadspectrum routine contained in the

> arch/arm/mach-omap2/am33xx/clock_am33xx.c file of the u-boot project.

> 

> In locked condition, DPLL output clock = CLKINP *[M/N]. In case of

> SSC enabled, the reference manual explains that there is a restriction

> of range of M values. Since the omap2_dpll_round_rate routine attempts

> to select the minimum possible N, the value of M obtained is not

> guaranteed to be within the range required. With the new "ti,min-div"

> parameter it is possible to increase N and consequently M to satisfy the

> constraint imposed by SSC.

> 

> Signed-off-by: Dario Binacchi <dariobin@libero.it>

> Reviewed-by: Tero Kristo <kristo@kernel.org>

> 

> ---


Applied to clk-next