| Message ID | 20210528134308.649769-1-daire.mcnamara@microchip.com |
|---|---|
| Headers | show |
| Series | CLK: microchip: Add clkcfg driver for Microchip PolarFire SoC | expand |
On Fri, 28 May 2021 14:43:07 +0100, daire.mcnamara@microchip.com wrote: > From: Daire McNamara <daire.mcnamara@microchip.com> > > Add device tree bindings for the Microchip PolarFire system > clock controller > > Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com> > --- > .../bindings/clock/microchip,mpfs.yaml | 67 +++++++++++++++++++ > .../dt-bindings/clock/microchip,mpfs-clock.h | 45 +++++++++++++ > 2 files changed, 112 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/microchip,mpfs.yaml > create mode 100644 include/dt-bindings/clock/microchip,mpfs-clock.h > Reviewed-by: Rob Herring <robh@kernel.org>
Hi Daire, On Fri, May 28, 2021 at 4:19 PM <daire.mcnamara@microchip.com> wrote: > From: Daire McNamara <daire.mcnamara@microchip.com> > > Add device tree bindings for the Microchip PolarFire system > clock controller > > Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com> Thanks for your patch! > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml > @@ -0,0 +1,67 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/microchip,mpfs.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Microchip PolarFire Clock Control Module Binding > + > +maintainers: > + - Daire McNamara <daire.mcnamara@microchip.com> > + > +description: | > + Microchip PolarFire clock control (CLKCFG) is an integrated clock controller, > + which gates and enables all peripheral clocks. > + > + This device tree binding describes 33 gate clocks. Clocks are referenced by > + user nodes by the CLKCFG node phandle and the clock index in the group, from > + 0 to 32. > + > +properties: > + compatible: > + const: microchip,mpfs-clkcfg > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + description: | > + The clock consumer should specify the desired clock by having the clock > + ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,mpfs-clock.h > + for the full list of PolarFire clock IDs. > + > + clock-output-names: > + maxItems: 33 Do you need clock-output-names? From a quick glance, the driver doesn't seem to need it. > + > +required: > + - compatible > + - reg > + - clocks > + - '#clock-cells' > + - clock-output-names > + > +additionalProperties: false > + > +examples: > + # Clock Config node: > + - | > + #include <dt-bindings/clock/microchip,mpfs-clock.h> > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + clkcfg: clock-controller@20002000 { > + compatible = "microchip,mpfs-clkcfg"; > + reg = <0x0 0x20002000 0x0 0x1000>; > + clocks = <&ref>; > + #clock-cells = <1>; > + clock-output-names = "cpu", "axi", "ahb", "envm", "mac0", "mac1", "mmc", "timer", > + "mmuart0", "mmuart1", "mmuart2", "mmuart3", "mmuart4", > + "spi0", "spi1", "i2c0", "i2c1", "can0", "can1", "usb", "rsvd", > + "rtc", "qspi", "gpio0", "gpio1", "gpio2", "ddrc", > + "fic0", "fic1", "fic2", "fic3", "athena", "cfm"; > + }; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
From: Daire McNamara <daire.mcnamara@microchip.com> This patchset adds support for the Microchip PolarFire clkcfg hardware block. Resending v5 Major changes since v4: * Adjusted license for microchip,mpfs-clock.h to match microchip,mpfs.yaml * Corrected the number of clocks to 33 from 32 Major changes since v3: * Patch reformatted so microchip,mpfs-clock.h is part of device-tree patch Major changes since v2: * In mpfs_cfg_clk_set_rate, return immediately if divider_get_val returns <0 * rebased to v5.12-rc1 Major changes since v1: * Dependency on SOC_MICROCHIP_POLARFIRE * All references to PFSOC/pfsoc changed to MPFS/mpfs * Cleaned error handling in _probe * Re-ordered code to place structs et al at top Daire McNamara (2): dt-bindings: clk: microchip: Add Microchip PolarFire host binding clk: microchip: Add driver for Microchip PolarFire SoC .../bindings/clock/microchip,mpfs.yaml | 67 +++ drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 2 +- drivers/clk/microchip/Kconfig | 7 + drivers/clk/microchip/Makefile | 6 +- drivers/clk/microchip/clk-mpfs.c | 444 ++++++++++++++++++ .../dt-bindings/clock/microchip,mpfs-clock.h | 45 ++ 7 files changed, 569 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/microchip,mpfs.yaml create mode 100644 drivers/clk/microchip/Kconfig create mode 100644 drivers/clk/microchip/clk-mpfs.c create mode 100644 include/dt-bindings/clock/microchip,mpfs-clock.h base-commit: 9f4ad9e425a1d3b6a34617b8ea226d56a119a717 prerequisite-patch-id: 6f7f70120adfa8e938b97517f0c664e43e8745a0 prerequisite-patch-id: 4ea37008d23838aa2e0658811fe15462f6cdbd87