Message ID | 20210716232916.3572966-10-l.stach@pengutronix.de |
---|---|
State | Superseded |
Headers | show |
Series | i.MX8MM GPC improvements and BLK_CTRL driver | expand |
Hi Lucas, url: https://github.com/0day-ci/linux/commits/Lucas-Stach/i-MX8MM-GPC-improvements-and-BLK_CTRL-driver/20210718-102944 base: https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next config: i386-randconfig-m021-20210718 (attached as .config) compiler: gcc-10 (Ubuntu 10.3.0-1ubuntu1~20.04) 10.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> smatch warnings: drivers/soc/imx/imx8m-blk-ctrl.c:222 imx8m_blk_ctrl_probe() warn: missing error code 'ret' vim +/ret +222 drivers/soc/imx/imx8m-blk-ctrl.c 446185fda14696 Lucas Stach 2021-07-17 150 static int imx8m_blk_ctrl_probe(struct platform_device *pdev) 446185fda14696 Lucas Stach 2021-07-17 151 { 446185fda14696 Lucas Stach 2021-07-17 152 const struct imx8m_blk_ctrl_data *bc_data; 446185fda14696 Lucas Stach 2021-07-17 153 struct device *dev = &pdev->dev; 446185fda14696 Lucas Stach 2021-07-17 154 struct imx8m_blk_ctrl *bc; 446185fda14696 Lucas Stach 2021-07-17 155 void __iomem *base; 446185fda14696 Lucas Stach 2021-07-17 156 int i, ret; 446185fda14696 Lucas Stach 2021-07-17 157 446185fda14696 Lucas Stach 2021-07-17 158 struct regmap_config regmap_config = { 446185fda14696 Lucas Stach 2021-07-17 159 .reg_bits = 32, 446185fda14696 Lucas Stach 2021-07-17 160 .val_bits = 32, 446185fda14696 Lucas Stach 2021-07-17 161 .reg_stride = 4, 446185fda14696 Lucas Stach 2021-07-17 162 }; 446185fda14696 Lucas Stach 2021-07-17 163 446185fda14696 Lucas Stach 2021-07-17 164 bc = devm_kzalloc(dev, sizeof(*bc), GFP_KERNEL); 446185fda14696 Lucas Stach 2021-07-17 165 if (!bc) 446185fda14696 Lucas Stach 2021-07-17 166 return -ENOMEM; 446185fda14696 Lucas Stach 2021-07-17 167 446185fda14696 Lucas Stach 2021-07-17 168 bc->dev = dev; 446185fda14696 Lucas Stach 2021-07-17 169 446185fda14696 Lucas Stach 2021-07-17 170 bc_data = of_device_get_match_data(dev); 446185fda14696 Lucas Stach 2021-07-17 171 446185fda14696 Lucas Stach 2021-07-17 172 base = devm_platform_ioremap_resource(pdev, 0); 446185fda14696 Lucas Stach 2021-07-17 173 if (IS_ERR(base)) 446185fda14696 Lucas Stach 2021-07-17 174 return PTR_ERR(base); 446185fda14696 Lucas Stach 2021-07-17 175 446185fda14696 Lucas Stach 2021-07-17 176 regmap_config.max_register = bc_data->max_reg; 446185fda14696 Lucas Stach 2021-07-17 177 bc->regmap = devm_regmap_init_mmio(dev, base, ®map_config); 446185fda14696 Lucas Stach 2021-07-17 178 if (IS_ERR(bc->regmap)) 446185fda14696 Lucas Stach 2021-07-17 179 return dev_err_probe(dev, PTR_ERR(bc->regmap), 446185fda14696 Lucas Stach 2021-07-17 180 "failed to init regmap \n"); 446185fda14696 Lucas Stach 2021-07-17 181 446185fda14696 Lucas Stach 2021-07-17 182 bc->domains = devm_kcalloc(dev, bc_data->num_domains, 446185fda14696 Lucas Stach 2021-07-17 183 sizeof(struct imx8m_blk_ctrl_domain), 446185fda14696 Lucas Stach 2021-07-17 184 GFP_KERNEL); 446185fda14696 Lucas Stach 2021-07-17 185 if (!bc->domains) 446185fda14696 Lucas Stach 2021-07-17 186 return -ENOMEM; 446185fda14696 Lucas Stach 2021-07-17 187 446185fda14696 Lucas Stach 2021-07-17 188 bc->onecell_data.num_domains = bc_data->num_domains; 446185fda14696 Lucas Stach 2021-07-17 189 bc->onecell_data.xlate = imx8m_blk_ctrl_xlate; 446185fda14696 Lucas Stach 2021-07-17 190 bc->onecell_data.domains = 446185fda14696 Lucas Stach 2021-07-17 191 devm_kcalloc(dev, bc_data->num_domains, 446185fda14696 Lucas Stach 2021-07-17 192 sizeof(struct generic_pm_domain *), GFP_KERNEL); 446185fda14696 Lucas Stach 2021-07-17 193 if (!bc->onecell_data.domains) 446185fda14696 Lucas Stach 2021-07-17 194 return -ENOMEM; 446185fda14696 Lucas Stach 2021-07-17 195 446185fda14696 Lucas Stach 2021-07-17 196 bc->bus_power_dev = genpd_dev_pm_attach_by_name(dev, "bus"); 446185fda14696 Lucas Stach 2021-07-17 197 if (IS_ERR(bc->bus_power_dev)) 446185fda14696 Lucas Stach 2021-07-17 198 return dev_err_probe(dev, PTR_ERR(bc->bus_power_dev), 446185fda14696 Lucas Stach 2021-07-17 199 "failed to attach power domain\n"); 446185fda14696 Lucas Stach 2021-07-17 200 446185fda14696 Lucas Stach 2021-07-17 201 for (i = 0; i < bc_data->num_domains; i++) { 446185fda14696 Lucas Stach 2021-07-17 202 const struct imx8m_blk_ctrl_domain_data *data = &bc_data->domains[i]; 446185fda14696 Lucas Stach 2021-07-17 203 struct imx8m_blk_ctrl_domain *domain = &bc->domains[i]; 446185fda14696 Lucas Stach 2021-07-17 204 int j; 446185fda14696 Lucas Stach 2021-07-17 205 446185fda14696 Lucas Stach 2021-07-17 206 domain->data = data; 446185fda14696 Lucas Stach 2021-07-17 207 446185fda14696 Lucas Stach 2021-07-17 208 for (j = 0; j < data->num_clks; j++) 446185fda14696 Lucas Stach 2021-07-17 209 domain->clks[j].id = data->clk_names[j]; 446185fda14696 Lucas Stach 2021-07-17 210 446185fda14696 Lucas Stach 2021-07-17 211 ret = devm_clk_bulk_get(dev, data->num_clks, domain->clks); 446185fda14696 Lucas Stach 2021-07-17 212 if (ret) { 446185fda14696 Lucas Stach 2021-07-17 213 dev_err_probe(dev, ret, "failed to get clock\n"); 446185fda14696 Lucas Stach 2021-07-17 214 goto cleanup_pds; 446185fda14696 Lucas Stach 2021-07-17 215 } 446185fda14696 Lucas Stach 2021-07-17 216 446185fda14696 Lucas Stach 2021-07-17 217 domain->power_dev = 446185fda14696 Lucas Stach 2021-07-17 218 dev_pm_domain_attach_by_name(dev, data->gpc_name); 446185fda14696 Lucas Stach 2021-07-17 219 if (IS_ERR(domain->power_dev )) { ^ Extra space character. 446185fda14696 Lucas Stach 2021-07-17 220 dev_err_probe(dev, PTR_ERR(domain->power_dev), 446185fda14696 Lucas Stach 2021-07-17 221 "failed to attach power domain\n"); 446185fda14696 Lucas Stach 2021-07-17 @222 goto cleanup_pds; ret = PTR_ERR(domain->power_dev); 446185fda14696 Lucas Stach 2021-07-17 223 } 446185fda14696 Lucas Stach 2021-07-17 224 446185fda14696 Lucas Stach 2021-07-17 225 domain->genpd.name = data->name; 446185fda14696 Lucas Stach 2021-07-17 226 domain->genpd.power_on = imx8m_blk_ctrl_power_on; 446185fda14696 Lucas Stach 2021-07-17 227 domain->genpd.power_off = imx8m_blk_ctrl_power_off; 446185fda14696 Lucas Stach 2021-07-17 228 domain->bc = bc; 446185fda14696 Lucas Stach 2021-07-17 229 446185fda14696 Lucas Stach 2021-07-17 230 ret = pm_genpd_init(&domain->genpd, NULL, true); 446185fda14696 Lucas Stach 2021-07-17 231 if (ret) { 446185fda14696 Lucas Stach 2021-07-17 232 dev_err_probe(dev, ret, "failed to init power domain\n"); 446185fda14696 Lucas Stach 2021-07-17 233 dev_pm_domain_detach(domain->power_dev, true); 446185fda14696 Lucas Stach 2021-07-17 234 goto cleanup_pds; 446185fda14696 Lucas Stach 2021-07-17 235 } 446185fda14696 Lucas Stach 2021-07-17 236 446185fda14696 Lucas Stach 2021-07-17 237 /* 446185fda14696 Lucas Stach 2021-07-17 238 * We use runtime PM to trigger power on/off of the upstream GPC 446185fda14696 Lucas Stach 2021-07-17 239 * domain, as a strict hierarchical parent/child power domain 446185fda14696 Lucas Stach 2021-07-17 240 * setup doesn't allow us to meet the sequencing requirements. 446185fda14696 Lucas Stach 2021-07-17 241 * This means we have nested locking of genpd locks, without the 446185fda14696 Lucas Stach 2021-07-17 242 * nesting being visible at the genpd level, so we need a 446185fda14696 Lucas Stach 2021-07-17 243 * separate lock class to make lockdep aware of the fact that 446185fda14696 Lucas Stach 2021-07-17 244 * this are separate domain locks that can be nested without a 446185fda14696 Lucas Stach 2021-07-17 245 * self-deadlock. 446185fda14696 Lucas Stach 2021-07-17 246 */ 446185fda14696 Lucas Stach 2021-07-17 247 lockdep_set_class(&domain->genpd.mlock, 446185fda14696 Lucas Stach 2021-07-17 248 &blk_ctrl_genpd_lock_class); 446185fda14696 Lucas Stach 2021-07-17 249 446185fda14696 Lucas Stach 2021-07-17 250 bc->onecell_data.domains[i] = &domain->genpd; 446185fda14696 Lucas Stach 2021-07-17 251 } 446185fda14696 Lucas Stach 2021-07-17 252 446185fda14696 Lucas Stach 2021-07-17 253 ret = of_genpd_add_provider_onecell(dev->of_node, &bc->onecell_data); 446185fda14696 Lucas Stach 2021-07-17 254 if (ret) { 446185fda14696 Lucas Stach 2021-07-17 255 dev_err_probe(dev, ret, "failed to add power domain provider\n"); 446185fda14696 Lucas Stach 2021-07-17 256 goto cleanup_pds; 446185fda14696 Lucas Stach 2021-07-17 257 } 446185fda14696 Lucas Stach 2021-07-17 258 446185fda14696 Lucas Stach 2021-07-17 259 bc->power_nb.notifier_call = bc_data->power_notifier_fn; 446185fda14696 Lucas Stach 2021-07-17 260 ret = dev_pm_genpd_add_notifier(bc->bus_power_dev, &bc->power_nb); 446185fda14696 Lucas Stach 2021-07-17 261 if (ret) { 446185fda14696 Lucas Stach 2021-07-17 262 dev_err_probe(dev, ret, "failed to add power notifier\n"); 446185fda14696 Lucas Stach 2021-07-17 263 goto cleanup_provider; 446185fda14696 Lucas Stach 2021-07-17 264 } 446185fda14696 Lucas Stach 2021-07-17 265 446185fda14696 Lucas Stach 2021-07-17 266 dev_set_drvdata(dev, bc); 446185fda14696 Lucas Stach 2021-07-17 267 446185fda14696 Lucas Stach 2021-07-17 268 return 0; 446185fda14696 Lucas Stach 2021-07-17 269 446185fda14696 Lucas Stach 2021-07-17 270 cleanup_provider: 446185fda14696 Lucas Stach 2021-07-17 271 of_genpd_del_provider(dev->of_node); 446185fda14696 Lucas Stach 2021-07-17 272 cleanup_pds: 446185fda14696 Lucas Stach 2021-07-17 273 for (i--; i >= 0; i--) { 446185fda14696 Lucas Stach 2021-07-17 274 pm_genpd_remove(&bc->domains[i].genpd); 446185fda14696 Lucas Stach 2021-07-17 275 dev_pm_domain_detach(bc->domains[i].power_dev, true); 446185fda14696 Lucas Stach 2021-07-17 276 } 446185fda14696 Lucas Stach 2021-07-17 277 446185fda14696 Lucas Stach 2021-07-17 278 dev_pm_domain_detach(bc->bus_power_dev, true); 446185fda14696 Lucas Stach 2021-07-17 279 446185fda14696 Lucas Stach 2021-07-17 280 return ret; 446185fda14696 Lucas Stach 2021-07-17 281 } --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
Hi Dan, Am Montag, dem 19.07.2021 um 09:12 +0300 schrieb Dan Carpenter: > Hi Lucas, > > url: https://github.com/0day-ci/linux/commits/Lucas-Stach/i-MX8MM-GPC-improvements-and-BLK_CTRL-driver/20210718-102944 > base: https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next > config: i386-randconfig-m021-20210718 (attached as .config) > compiler: gcc-10 (Ubuntu 10.3.0-1ubuntu1~20.04) 10.3.0 > > If you fix the issue, kindly add following tag as appropriate > Reported-by: kernel test robot <lkp@intel.com> > Reported-by: Dan Carpenter <dan.carpenter@oracle.com> > > smatch warnings: > drivers/soc/imx/imx8m-blk-ctrl.c:222 imx8m_blk_ctrl_probe() warn: missing error code 'ret' Thanks for the report! Fixed up locally. Regards, Lucas
diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile index 078dc918f4f3..8a707077914c 100644 --- a/drivers/soc/imx/Makefile +++ b/drivers/soc/imx/Makefile @@ -5,3 +5,4 @@ endif obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o +obj-$(CONFIG_SOC_IMX8M) += imx8m-blk-ctrl.o diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-ctrl.c new file mode 100644 index 000000000000..90ff845b2643 --- /dev/null +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -0,0 +1,394 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/* + * Copyright 2021 Pengutronix, Lucas Stach <kernel@pengutronix.de> + */ + +#include <linux/device.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/pm_domain.h> +#include <linux/pm_runtime.h> +#include <linux/regmap.h> +#include <linux/clk.h> + +#include <dt-bindings/power/imx8mm-power.h> + +#define BLK_SFT_RSTN 0x0 +#define BLK_CLK_EN 0x4 + +struct imx8m_blk_ctrl_domain; + +struct imx8m_blk_ctrl { + struct device *dev; + struct notifier_block power_nb; + struct device *bus_power_dev; + struct regmap *regmap; + struct imx8m_blk_ctrl_domain *domains; + struct genpd_onecell_data onecell_data; +}; + +struct imx8m_blk_ctrl_domain_data { + const char *name; + const char **clk_names; + int num_clks; + const char *gpc_name; + u32 rst_mask; + u32 clk_mask; +}; + +#define DOMAIN_MAX_CLKS 3 + +struct imx8m_blk_ctrl_domain { + struct generic_pm_domain genpd; + const struct imx8m_blk_ctrl_domain_data *data; + struct clk_bulk_data clks[DOMAIN_MAX_CLKS]; + struct device *power_dev; + struct imx8m_blk_ctrl *bc; +}; + +struct imx8m_blk_ctrl_data { + int max_reg; + notifier_fn_t power_notifier_fn; + const struct imx8m_blk_ctrl_domain_data *domains; + int num_domains; +}; + +static inline struct imx8m_blk_ctrl_domain * +to_imx8m_blk_ctrl_domain(struct generic_pm_domain *genpd) +{ + return container_of(genpd, struct imx8m_blk_ctrl_domain, genpd); +} + +static int imx8m_blk_ctrl_power_on(struct generic_pm_domain *genpd) +{ + struct imx8m_blk_ctrl_domain *domain = to_imx8m_blk_ctrl_domain(genpd); + const struct imx8m_blk_ctrl_domain_data *data = domain->data; + struct imx8m_blk_ctrl *bc = domain->bc; + int ret; + + /* make sure bus domain is awake */ + ret = pm_runtime_get_sync(bc->bus_power_dev); + if (ret < 0) { + pm_runtime_put_noidle(bc->bus_power_dev); + dev_err(bc->dev, "failed to power up bus domain\n"); + return ret; + } + + /* put devices into reset */ + regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask); + + /* enable upstream and blk-ctrl clocks to allow reset to propagate */ + ret = clk_bulk_prepare_enable(data->num_clks, domain->clks); + if (ret) { + dev_err(bc->dev, "failed to enable clocks\n"); + goto bus_put; + } + regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask); + + /* power up upstream GPC domain */ + ret = pm_runtime_get_sync(domain->power_dev); + if (ret) { + dev_err(bc->dev, "failed to power up peripheral domain\n"); + goto clk_disable; + } + + /* wait for reset to propagate */ + udelay(5); + + /* release reset */ + regmap_set_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask); + + /* disable upstream clocks */ + clk_bulk_disable_unprepare(data->num_clks, domain->clks); + + return 0; + +clk_disable: + clk_bulk_disable_unprepare(data->num_clks, domain->clks); +bus_put: + pm_runtime_put(bc->bus_power_dev); + + return ret; +} + +static int imx8m_blk_ctrl_power_off(struct generic_pm_domain *genpd) +{ + struct imx8m_blk_ctrl_domain *domain = to_imx8m_blk_ctrl_domain(genpd); + const struct imx8m_blk_ctrl_domain_data *data = domain->data; + struct imx8m_blk_ctrl *bc = domain->bc; + + /* put devices into reset and disable clocks */ + regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask); + regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask); + + /* power down upstream GPC domain */ + pm_runtime_put(domain->power_dev); + + /* allow bus domain to suspend */ + pm_runtime_put(bc->bus_power_dev); + + return 0; +} + +static struct generic_pm_domain * +imx8m_blk_ctrl_xlate(struct of_phandle_args *args, void *data) +{ + struct genpd_onecell_data *onecell_data = data; + unsigned int index = args->args[0]; + + if (args->args_count != 1 || + index > onecell_data->num_domains) + return ERR_PTR(-EINVAL); + + return onecell_data->domains[index]; +} + +static struct lock_class_key blk_ctrl_genpd_lock_class; + +static int imx8m_blk_ctrl_probe(struct platform_device *pdev) +{ + const struct imx8m_blk_ctrl_data *bc_data; + struct device *dev = &pdev->dev; + struct imx8m_blk_ctrl *bc; + void __iomem *base; + int i, ret; + + struct regmap_config regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + }; + + bc = devm_kzalloc(dev, sizeof(*bc), GFP_KERNEL); + if (!bc) + return -ENOMEM; + + bc->dev = dev; + + bc_data = of_device_get_match_data(dev); + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + regmap_config.max_register = bc_data->max_reg; + bc->regmap = devm_regmap_init_mmio(dev, base, ®map_config); + if (IS_ERR(bc->regmap)) + return dev_err_probe(dev, PTR_ERR(bc->regmap), + "failed to init regmap \n"); + + bc->domains = devm_kcalloc(dev, bc_data->num_domains, + sizeof(struct imx8m_blk_ctrl_domain), + GFP_KERNEL); + if (!bc->domains) + return -ENOMEM; + + bc->onecell_data.num_domains = bc_data->num_domains; + bc->onecell_data.xlate = imx8m_blk_ctrl_xlate; + bc->onecell_data.domains = + devm_kcalloc(dev, bc_data->num_domains, + sizeof(struct generic_pm_domain *), GFP_KERNEL); + if (!bc->onecell_data.domains) + return -ENOMEM; + + bc->bus_power_dev = genpd_dev_pm_attach_by_name(dev, "bus"); + if (IS_ERR(bc->bus_power_dev)) + return dev_err_probe(dev, PTR_ERR(bc->bus_power_dev), + "failed to attach power domain\n"); + + for (i = 0; i < bc_data->num_domains; i++) { + const struct imx8m_blk_ctrl_domain_data *data = &bc_data->domains[i]; + struct imx8m_blk_ctrl_domain *domain = &bc->domains[i]; + int j; + + domain->data = data; + + for (j = 0; j < data->num_clks; j++) + domain->clks[j].id = data->clk_names[j]; + + ret = devm_clk_bulk_get(dev, data->num_clks, domain->clks); + if (ret) { + dev_err_probe(dev, ret, "failed to get clock\n"); + goto cleanup_pds; + } + + domain->power_dev = + dev_pm_domain_attach_by_name(dev, data->gpc_name); + if (IS_ERR(domain->power_dev )) { + dev_err_probe(dev, PTR_ERR(domain->power_dev), + "failed to attach power domain\n"); + goto cleanup_pds; + } + + domain->genpd.name = data->name; + domain->genpd.power_on = imx8m_blk_ctrl_power_on; + domain->genpd.power_off = imx8m_blk_ctrl_power_off; + domain->bc = bc; + + ret = pm_genpd_init(&domain->genpd, NULL, true); + if (ret) { + dev_err_probe(dev, ret, "failed to init power domain\n"); + dev_pm_domain_detach(domain->power_dev, true); + goto cleanup_pds; + } + + /* + * We use runtime PM to trigger power on/off of the upstream GPC + * domain, as a strict hierarchical parent/child power domain + * setup doesn't allow us to meet the sequencing requirements. + * This means we have nested locking of genpd locks, without the + * nesting being visible at the genpd level, so we need a + * separate lock class to make lockdep aware of the fact that + * this are separate domain locks that can be nested without a + * self-deadlock. + */ + lockdep_set_class(&domain->genpd.mlock, + &blk_ctrl_genpd_lock_class); + + bc->onecell_data.domains[i] = &domain->genpd; + } + + ret = of_genpd_add_provider_onecell(dev->of_node, &bc->onecell_data); + if (ret) { + dev_err_probe(dev, ret, "failed to add power domain provider\n"); + goto cleanup_pds; + } + + bc->power_nb.notifier_call = bc_data->power_notifier_fn; + ret = dev_pm_genpd_add_notifier(bc->bus_power_dev, &bc->power_nb); + if (ret) { + dev_err_probe(dev, ret, "failed to add power notifier\n"); + goto cleanup_provider; + } + + dev_set_drvdata(dev, bc); + + return 0; + +cleanup_provider: + of_genpd_del_provider(dev->of_node); +cleanup_pds: + for (i--; i >= 0; i--) { + pm_genpd_remove(&bc->domains[i].genpd); + dev_pm_domain_detach(bc->domains[i].power_dev, true); + } + + dev_pm_domain_detach(bc->bus_power_dev, true); + + return ret; +} + +static int imx8m_blk_ctrl_remove(struct platform_device *pdev) +{ + struct imx8m_blk_ctrl *bc = dev_get_drvdata(&pdev->dev); + int i; + + of_genpd_del_provider(pdev->dev.of_node); + + for (i = 0; bc->onecell_data.num_domains; i++) { + struct imx8m_blk_ctrl_domain *domain = &bc->domains[i]; + + pm_genpd_remove(&domain->genpd); + dev_pm_domain_detach(domain->power_dev, true); + } + + dev_pm_genpd_remove_notifier(bc->bus_power_dev); + + dev_pm_domain_detach(bc->bus_power_dev, true); + + return 0; +} + +static int imx8mm_vpu_power_notifier(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct imx8m_blk_ctrl *bc = container_of(nb, struct imx8m_blk_ctrl, + power_nb); + + if (action != GENPD_NOTIFY_ON && action != GENPD_NOTIFY_PRE_OFF) + return NOTIFY_OK; + + /* + * The ADB in the VPUMIX domain has no separate reset and clock + * enable bits, but is ungated together with the VPU clocks. To + * allow the handshake with the GPC to progress we put the VPUs + * in reset and ungate the clocks. + */ + regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, + BIT(0) | BIT(1) | BIT(2)); + regmap_set_bits(bc->regmap, BLK_CLK_EN, + BIT(0) | BIT(1) | BIT(2)); + + if (action == GENPD_NOTIFY_ON) { + /* + * On power up we have no software backchannel to the GPC to + * wait for the ADB handshake to happen, so we just delay for a + * bit. On power down the GPC driver waits for the handshake. + */ + udelay(5); + + /* set "fuse" bits to enable the VPUs */ + regmap_set_bits(bc->regmap, 0x8, 0xffffffff); + regmap_set_bits(bc->regmap, 0xc, 0xffffffff); + regmap_set_bits(bc->regmap, 0x10, 0xffffffff); + regmap_set_bits(bc->regmap, 0x14, 0xffffffff); + } + + return NOTIFY_OK; +} + +static const struct imx8m_blk_ctrl_domain_data imx8m_vpu_blk_ctl_domain_data[] = { + [IMX8MM_VPUBLK_PD_G1] = { + .name = "vpublk-g1", + .clk_names = (const char *[]){ "g1", }, + .num_clks = 1, + .gpc_name = "g1", + .rst_mask = BIT(1), + .clk_mask = BIT(1), + }, + [IMX8MM_VPUBLK_PD_G2] = { + .name = "vpublk-g2", + .clk_names = (const char *[]){ "g2", }, + .num_clks = 1, + .gpc_name = "g2", + .rst_mask = BIT(0), + .clk_mask = BIT(0), + }, + [IMX8MM_VPUBLK_PD_H1] = { + .name = "vpublk-h1", + .clk_names = (const char *[]){ "h1", }, + .num_clks = 1, + .gpc_name = "h1", + .rst_mask = BIT(2), + .clk_mask = BIT(2), + }, +}; + +static const struct imx8m_blk_ctrl_data imx8m_vpu_blk_ctl_dev_data = { + .max_reg = 0x18, + .power_notifier_fn = imx8mm_vpu_power_notifier, + .domains = imx8m_vpu_blk_ctl_domain_data, + .num_domains = ARRAY_SIZE(imx8m_vpu_blk_ctl_domain_data), +}; + +static const struct of_device_id imx8m_blk_ctrl_of_match[] = { + { + .compatible = "fsl,imx8mm-vpu-blk-ctrl", + .data = &imx8m_vpu_blk_ctl_dev_data + }, { + /* Sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, imx8m_blk_ctrl_of_match); + +static struct platform_driver imx8m_blk_ctrl_driver = { + .probe = imx8m_blk_ctrl_probe, + .remove = imx8m_blk_ctrl_remove, + .driver = { + .name = "imx8m-blk-ctrl", + .of_match_table = imx8m_blk_ctrl_of_match, + }, +}; +module_platform_driver(imx8m_blk_ctrl_driver);
This adds a driver for the blk-ctrl blocks found in the i.MX8M* line of SoCs. The blk-ctrl is a top-level peripheral located in the various *MIX power domains and interacts with the GPC power controller to provide the peripherals in the power domain access to the NoC and ensures that those peripherals are properly reset when their respective power domain is brought back to life. Software needs to do different things to make the bus handshake happen after the the GPC *MIX domain is power up and before it is powered down. As the requirements are quite different between the various blk-ctrls there is a callback function provided to hook in the proper sequence. The peripheral domains are quite uniform, they handle the soft clock enables and resets in the blk-ctrl address space and sequencing with the upstream GPC power domains. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- This commit includes the full code to drive the VPUMIX domain on the i.MX8MM, as the skeleton driver would probably be harder to review without the context provided by one blk-ctrl implementation. Other blk-ctrl implementations will follow, based on this overall structure. --- drivers/soc/imx/Makefile | 1 + drivers/soc/imx/imx8m-blk-ctrl.c | 394 +++++++++++++++++++++++++++++++ 2 files changed, 395 insertions(+) create mode 100644 drivers/soc/imx/imx8m-blk-ctrl.c