Message ID | 20210910143951.92242-1-shashi.mallela@linaro.org |
---|---|
Headers | show |
Series | GICv3 LPI and ITS feature implementation | expand |
On Fri, 10 Sept 2021 at 15:39, Shashi Mallela <shashi.mallela@linaro.org> wrote: > > This patchset implements qemu device model for enabling physical > LPI support and ITS functionality in GIC as per GICv3 specification. > Both flat table and 2 level tables are implemented.The ITS commands > for adding/deleting ITS table entries,trigerring LPI interrupts are > implemented.Translated LPI interrupt ids are processed by redistributor > to determine priority and set pending state appropriately before > forwarding the same to cpu interface. > The ITS feature support has been added to virt platform,wherein the > emulated functionality co-exists with kvm kernel functionality. > > Changes in v9: > - removed sbsa-ref patch due to inconclusive ongoing discussion > regarding ITS placement and version in sbsa-ref platform.This will be > taken up as a separate functionality later > - updated its enable code as per latest virt 6.2 > - updated its code to replace usage of MEMTX_ with bool > - All kvm_unit_tests PASS > - Verified Linux Boot functionality > > Shashi Mallela (9): > hw/intc: GICv3 ITS initial framework > hw/intc: GICv3 ITS register definitions added > hw/intc: GICv3 ITS command queue framework > hw/intc: GICv3 ITS Command processing > hw/intc: GICv3 ITS Feature enablement > hw/intc: GICv3 redistributor ITS processing > tests/data/acpi/virt: Add IORT files for ITS > hw/arm/virt: add ITS support in virt GIC > tests/data/acpi/virt: Update IORT files for ITS Applied to target-arm.next, thanks. -- PMM