| Message ID | 20210318063421.14895-1-hemant.agrawal@nxp.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/6] baseband: introduce NXP LA12xx driver | expand |
On Thu, Mar 18, 2021 at 7:38 AM Hemant Agrawal <hemant.agrawal@nxp.com> wrote: > > This patch introduce the baseband device drivers for NXP's > LA1200 series software defined baseband modem. Such a series deserves a cover letter. You should copy bbdev maintainer and cryptodev subtree maintainer. Quickly looked at the series, I see no change on the bbdev unit test code. Are those tests running fine with no modification (I sure hope so, but I want a confirmation). > > Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> > Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> > --- > drivers/baseband/la12xx/bbdev_la12xx.c | 110 ++++++++++++++++++ > .../baseband/la12xx/bbdev_la12xx_pmd_logs.h | 38 ++++++ > drivers/baseband/la12xx/meson.build | 6 + > drivers/baseband/la12xx/version.map | 3 + > drivers/baseband/meson.build | 2 +- > 5 files changed, 158 insertions(+), 1 deletion(-) > create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.c > create mode 100644 drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h > create mode 100644 drivers/baseband/la12xx/meson.build > create mode 100644 drivers/baseband/la12xx/version.map > [snip] > +}; > + > +RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv); > +RTE_PMD_REGISTER_ALIAS(DRIVER_NAME, bbdev_la12xx); Quick glance at this patch, no need for an alias. Alias are for maintaining compatibility when drivers are renamed but this is a new driver. -- David Marchand
On 3/18/2021 8:23 PM, David Marchand wrote: > On Thu, Mar 18, 2021 at 7:38 AM Hemant Agrawal <hemant.agrawal@nxp.com> wrote: >> This patch introduce the baseband device drivers for NXP's >> LA1200 series software defined baseband modem. > Such a series deserves a cover letter. Ok. I will do that in v2. > You should copy bbdev maintainer and cryptodev subtree maintainer. Yes, changing the Akhil's id. He moved on. > > Quickly looked at the series, I see no change on the bbdev unit test code. > Are those tests running fine with no modification (I sure hope so, but > I want a confirmation). > Good catch! Yes, we have made the changes and we are in the process of cleaning them up. We will be posting them to mailing list soon. >> Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> >> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> >> --- >> drivers/baseband/la12xx/bbdev_la12xx.c | 110 ++++++++++++++++++ >> .../baseband/la12xx/bbdev_la12xx_pmd_logs.h | 38 ++++++ >> drivers/baseband/la12xx/meson.build | 6 + >> drivers/baseband/la12xx/version.map | 3 + >> drivers/baseband/meson.build | 2 +- >> 5 files changed, 158 insertions(+), 1 deletion(-) >> create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.c >> create mode 100644 drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h >> create mode 100644 drivers/baseband/la12xx/meson.build >> create mode 100644 drivers/baseband/la12xx/version.map >> > [snip] > >> +}; >> + >> +RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv); >> +RTE_PMD_REGISTER_ALIAS(DRIVER_NAME, bbdev_la12xx); > Quick glance at this patch, no need for an alias. > Alias are for maintaining compatibility when drivers are renamed but > this is a new driver. Ok. > >
Hi Hemant/Nipun, Could you please send a new version soon? If review is completed, I would like to take it in RC1, i.e. 15th March. Regards, Akhil > > On 3/18/2021 8:23 PM, David Marchand wrote: > > On Thu, Mar 18, 2021 at 7:38 AM Hemant Agrawal > <hemant.agrawal@nxp.com> wrote: > >> This patch introduce the baseband device drivers for NXP's > >> LA1200 series software defined baseband modem. > > Such a series deserves a cover letter. > Ok. I will do that in v2. > > You should copy bbdev maintainer and cryptodev subtree maintainer. > Yes, changing the Akhil's id. He moved on. > > > > Quickly looked at the series, I see no change on the bbdev unit test code. > > Are those tests running fine with no modification (I sure hope so, but > > I want a confirmation). > > > Good catch! Yes, we have made the changes and we are in the process of > cleaning them up. > > We will be posting them to mailing list soon. > > >> Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> > >> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> > >> --- > >> drivers/baseband/la12xx/bbdev_la12xx.c | 110 > ++++++++++++++++++ > >> .../baseband/la12xx/bbdev_la12xx_pmd_logs.h | 38 ++++++ > >> drivers/baseband/la12xx/meson.build | 6 + > >> drivers/baseband/la12xx/version.map | 3 + > >> drivers/baseband/meson.build | 2 +- > >> 5 files changed, 158 insertions(+), 1 deletion(-) > >> create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.c > >> create mode 100644 > drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h > >> create mode 100644 drivers/baseband/la12xx/meson.build > >> create mode 100644 drivers/baseband/la12xx/version.map > >> > > [snip] > > > >> +}; > >> + > >> +RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv); > >> +RTE_PMD_REGISTER_ALIAS(DRIVER_NAME, bbdev_la12xx); > > Quick glance at this patch, no need for an alias. > > Alias are for maintaining compatibility when drivers are renamed but > > this is a new driver. > Ok. > > > >
On 4/8/2021 2:25 PM, Akhil Goyal wrote: > Hi Hemant/Nipun, > > Could you please send a new version soon? > If review is completed, I would like to take it in RC1, i.e. 15th March. yes, we are working on fixing few things. We will send it by weekend. Regards, Hemant > Regards, > Akhil >> On 3/18/2021 8:23 PM, David Marchand wrote: >>> On Thu, Mar 18, 2021 at 7:38 AM Hemant Agrawal >> <hemant.agrawal@nxp.com> wrote: >>>> This patch introduce the baseband device drivers for NXP's >>>> LA1200 series software defined baseband modem. >>> Such a series deserves a cover letter. >> Ok. I will do that in v2. >>> You should copy bbdev maintainer and cryptodev subtree maintainer. >> Yes, changing the Akhil's id. He moved on. >>> Quickly looked at the series, I see no change on the bbdev unit test code. >>> Are those tests running fine with no modification (I sure hope so, but >>> I want a confirmation). >>> >> Good catch! Yes, we have made the changes and we are in the process of >> cleaning them up. >> >> We will be posting them to mailing list soon. >> >>>> Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> >>>> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> >>>> --- >>>> drivers/baseband/la12xx/bbdev_la12xx.c | 110 >> ++++++++++++++++++ >>>> .../baseband/la12xx/bbdev_la12xx_pmd_logs.h | 38 ++++++ >>>> drivers/baseband/la12xx/meson.build | 6 + >>>> drivers/baseband/la12xx/version.map | 3 + >>>> drivers/baseband/meson.build | 2 +- >>>> 5 files changed, 158 insertions(+), 1 deletion(-) >>>> create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.c >>>> create mode 100644 >> drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h >>>> create mode 100644 drivers/baseband/la12xx/meson.build >>>> create mode 100644 drivers/baseband/la12xx/version.map >>>> >>> [snip] >>> >>>> +}; >>>> + >>>> +RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv); >>>> +RTE_PMD_REGISTER_ALIAS(DRIVER_NAME, bbdev_la12xx); >>> Quick glance at this patch, no need for an alias. >>> Alias are for maintaining compatibility when drivers are renamed but >>> this is a new driver. >> Ok. >>>
Note that I did not review this serie yet as v2 was pending (+ did not receive the initial serie). Planning to send comments once that v2 is formally shared. > -----Original Message----- > From: Akhil Goyal <gakhil@marvell.com> > Sent: Thursday, April 8, 2021 1:56 AM > To: hemant.agrawal@nxp.com; David Marchand > <david.marchand@redhat.com> > Cc: dev <dev@dpdk.org>; Nipun Gupta <nipun.gupta@nxp.com>; Chautru, > Nicolas <nicolas.chautru@intel.com> > Subject: RE: [EXT] Re: [dpdk-dev] [PATCH 1/6] baseband: introduce NXP > LA12xx driver > > Hi Hemant/Nipun, > > Could you please send a new version soon? > If review is completed, I would like to take it in RC1, i.e. 15th March. > > Regards, > Akhil > > > > On 3/18/2021 8:23 PM, David Marchand wrote: > > > On Thu, Mar 18, 2021 at 7:38 AM Hemant Agrawal > > <hemant.agrawal@nxp.com> wrote: > > >> This patch introduce the baseband device drivers for NXP's > > >> LA1200 series software defined baseband modem. > > > Such a series deserves a cover letter. > > Ok. I will do that in v2. > > > You should copy bbdev maintainer and cryptodev subtree maintainer. > > Yes, changing the Akhil's id. He moved on. > > > > > > Quickly looked at the series, I see no change on the bbdev unit test code. > > > Are those tests running fine with no modification (I sure hope so, > > > but I want a confirmation). > > > > > Good catch! Yes, we have made the changes and we are in the process of > > cleaning them up. > > > > We will be posting them to mailing list soon. > > > > >> Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> > > >> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> > > >> --- > > >> drivers/baseband/la12xx/bbdev_la12xx.c | 110 > > ++++++++++++++++++ > > >> .../baseband/la12xx/bbdev_la12xx_pmd_logs.h | 38 ++++++ > > >> drivers/baseband/la12xx/meson.build | 6 + > > >> drivers/baseband/la12xx/version.map | 3 + > > >> drivers/baseband/meson.build | 2 +- > > >> 5 files changed, 158 insertions(+), 1 deletion(-) > > >> create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.c > > >> create mode 100644 > > drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h > > >> create mode 100644 drivers/baseband/la12xx/meson.build > > >> create mode 100644 drivers/baseband/la12xx/version.map > > >> > > > [snip] > > > > > >> +}; > > >> + > > >> +RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv); > > >> +RTE_PMD_REGISTER_ALIAS(DRIVER_NAME, bbdev_la12xx); > > > Quick glance at this patch, no need for an alias. > > > Alias are for maintaining compatibility when drivers are renamed but > > > this is a new driver. > > Ok. > > > > > >
> -----Original Message----- > From: nipun.gupta@nxp.com <nipun.gupta@nxp.com> > Sent: Tuesday, September 28, 2021 1:30 AM > To: dev@dpdk.org; gakhil@marvell.com; Chautru, Nicolas > <nicolas.chautru@intel.com> > Cc: david.marchand@redhat.com; hemant.agrawal@nxp.com; Nipun Gupta > <nipun.gupta@nxp.com> > Subject: [PATCH v7 1/9] bbdev: add big endian processing data processing > info > > From: Nipun Gupta <nipun.gupta@nxp.com> > > This patch intoduces a new info pertaining to bbdev device to process the > data in big endian order. Typo in commit message > > Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> > --- > lib/bbdev/rte_bbdev.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/lib/bbdev/rte_bbdev.h b/lib/bbdev/rte_bbdev.h index > 7017124414..3acc008d06 100644 > --- a/lib/bbdev/rte_bbdev.h > +++ b/lib/bbdev/rte_bbdev.h > @@ -309,6 +309,8 @@ struct rte_bbdev_driver_info { > uint16_t min_alignment; > /** HARQ memory available in kB */ > uint32_t harq_buffer_size; > + /** Device support input, output and HARQ data as big-endian */ > + uint8_t support_be_data; Shouldn't this either be a bool or even better an enum? Ie. as per rte_bbdev_op_cb_mode enum for instance Having 0/1 magic number in the code will always be misleading > /** Default queue configuration used if none is supplied */ > struct rte_bbdev_queue_conf default_queue_conf; > /** Device operation capabilities */ > -- > 2.17.1
> -----Original Message----- > From: nipun.gupta@nxp.com <nipun.gupta@nxp.com> > Sent: Tuesday, September 28, 2021 1:30 AM > To: dev@dpdk.org; gakhil@marvell.com; Chautru, Nicolas > <nicolas.chautru@intel.com> > Cc: david.marchand@redhat.com; hemant.agrawal@nxp.com; Nipun Gupta > <nipun.gupta@nxp.com> > Subject: [PATCH v7 5/9] baseband/la12xx: add queue and modem config > support > > From: Hemant Agrawal <hemant.agrawal@nxp.com> > > This patch add support for connecting with modem and creating the ipc > channel as queues with modem for the exchange of data. > > Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> > Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> > --- > MAINTAINERS | 1 + > doc/guides/bbdevs/index.rst | 1 + > doc/guides/bbdevs/la12xx.rst | 81 +++ > doc/guides/rel_notes/release_21_11.rst | 5 + > drivers/baseband/la12xx/bbdev_la12xx.c | 555 ++++++++++++++++++++- > drivers/baseband/la12xx/bbdev_la12xx.h | 17 +- > drivers/baseband/la12xx/bbdev_la12xx_ipc.h | 189 ++++++- > 7 files changed, 836 insertions(+), 13 deletions(-) create mode 100644 > doc/guides/bbdevs/la12xx.rst > > diff --git a/MAINTAINERS b/MAINTAINERS > index e3f0e8759f..1bf39820d6 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1296,6 +1296,7 @@ NXP LA12xx driver > M: Nipun Gupta <nipun.gupta@nxp.com> > M: Hemant Agrawal <hemant.agrawal@nxp.com> > F: drivers/baseband/la12xx/ > +F: doc/guides/bbdevs/la12xx.rst > > > Rawdev Drivers > diff --git a/doc/guides/bbdevs/index.rst b/doc/guides/bbdevs/index.rst index > 4445cbd1b0..cedd706fa6 100644 > --- a/doc/guides/bbdevs/index.rst > +++ b/doc/guides/bbdevs/index.rst > @@ -14,3 +14,4 @@ Baseband Device Drivers > fpga_lte_fec > fpga_5gnr_fec > acc100 > + la12xx > diff --git a/doc/guides/bbdevs/la12xx.rst b/doc/guides/bbdevs/la12xx.rst > new file mode 100644 index 0000000000..3c9ac5c047 > --- /dev/null > +++ b/doc/guides/bbdevs/la12xx.rst > @@ -0,0 +1,81 @@ > +.. SPDX-License-Identifier: BSD-3-Clause > + Copyright 2021 NXP > + > +NXP LA12xx Poll Mode Driver > +======================================= > + > +The BBDEV LA12xx poll mode driver (PMD) supports an implementation for > +offloading High Phy processing functions like LDPC Encode / Decode 5GNR > +wireless acceleration function, using PCI based LA12xx Software defined > radio. > + > +More information can be found at `NXP Official Website > +<https://www.nxp.com/products/processors-and-microcontrollers/arm- > processors/layerscape-processors/layerscape-access-la1200-programmable- > baseband-processor:LA1200>`_. > + > +Features > +-------- > + > +LA12xx PMD supports the following features: > + > +- Maximum of 8 UL queues > +- Maximum of 8 DL queues Minor: I suggest to capture explicitly these are 5G (UL/DL) and not 4G (UL/DL). Or LDPC explicitly. > +- PCIe Gen-3 x8 Interface > +- MSI-X Minor: I don't see MSI-x capability or implementation in the PMD below (.capability_flags) > + > +Installation > +------------ > + > +Section 3 of the DPDK manual provides instructions on installing and > compiling DPDK. > + > +DPDK requires hugepages to be configured as detailed in section 2 of the > DPDK manual. > + > +Initialization > +-------------- > + > +The device can be listed on the host console with: > + > + > +Use the following lspci command to get the multiple LA12xx processor > +ids. The device ID of the LA12xx baseband processor is "1c30". > + > +.. code-block:: console > + > + sudo lspci -nn > + > +... > +0001:01:00.0 Power PC [0b20]: Freescale Semiconductor Inc Device > +[1957:1c30] ( rev 10) ... > +0002:01:00.0 Power PC [0b20]: Freescale Semiconductor Inc Device > +[1957:1c30] ( rev 10) > + > + > +Prerequisites > +------------- > + > +Currently supported by DPDK: > + > +- NXP LA1224 BSP **1.0+**. > +- NXP LA1224 PCIe Modem card connected to ARM host. > + > +- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to > setup the basic DPDK environment. > + > +* Use dev arg option ``modem=0`` to identify the modem instance for a > +given > + device. This is required only if more than 1 modem cards are attached to > host. > + this is optional and the default value is 0. > + e.g. ``--vdev=baseband_la12xx,modem=0`` > + > +* Use dev arg option ``max_nb_queues=x`` to specify the maximum > number > +of queues > + to be used for communication with offload device i.e. modem. default is > 16. > + e.g. ``--vdev=baseband_la12xx,max_nb_queues=4`` > + > +Enabling logs > +------------- > + > +For enabling logs, use the following EAL parameter: > + > +.. code-block:: console > + > + ./your_bbdev_application <EAL args> --log-level=la12xx:<level> > + > +Using ``bb.la12xx`` as log matching criteria, all Baseband PMD logs can > +be enabled which are lower than logging ``level``. > diff --git a/doc/guides/rel_notes/release_21_11.rst > b/doc/guides/rel_notes/release_21_11.rst > index ad7c1afec0..60b92c9a9f 100644 > --- a/doc/guides/rel_notes/release_21_11.rst > +++ b/doc/guides/rel_notes/release_21_11.rst > @@ -91,6 +91,11 @@ New Features > Added command-line options to specify total number of processes and > current process ID. Each process owns subset of Rx and Tx queues. > > +* **Added NXP LA12xx baseband PMD.** > + > + * Added a new baseband PMD driver for NXP LA12xx Software defined > radio. > + * See the :doc:`../bbdevs/la12xx` for more details. > + > > Removed Items > ------------- > diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c > b/drivers/baseband/la12xx/bbdev_la12xx.c > index f9f32d665a..46ee5b4d70 100644 > --- a/drivers/baseband/la12xx/bbdev_la12xx.c > +++ b/drivers/baseband/la12xx/bbdev_la12xx.c > @@ -3,6 +3,11 @@ > */ > > #include <string.h> > +#include <unistd.h> > +#include <fcntl.h> > +#include <sys/ioctl.h> > +#include <sys/mman.h> > +#include <dirent.h> > > #include <rte_common.h> > #include <rte_bus_vdev.h> > @@ -29,11 +34,552 @@ struct bbdev_la12xx_params { > #define LA12XX_VDEV_MODEM_ID_ARG "modem" > #define LA12XX_MAX_MODEM 4 > > +#define LA12XX_MAX_CORES 4 > +#define LA12XX_LDPC_ENC_CORE 0 > +#define LA12XX_LDPC_DEC_CORE 1 > + > +#define LA12XX_MAX_LDPC_ENC_QUEUES 4 > +#define LA12XX_MAX_LDPC_DEC_QUEUES 4 > + > static const char * const bbdev_la12xx_valid_params[] = { > LA12XX_MAX_NB_QUEUES_ARG, > LA12XX_VDEV_MODEM_ID_ARG, > }; > > +static const struct rte_bbdev_op_cap bbdev_capabilities[] = { > + { > + .type = RTE_BBDEV_OP_LDPC_ENC, > + .cap.ldpc_enc = { > + .capability_flags = > + RTE_BBDEV_LDPC_RATE_MATCH | > + RTE_BBDEV_LDPC_CRC_24A_ATTACH > | > + > RTE_BBDEV_LDPC_CRC_24B_ATTACH, > + .num_buffers_src = > + > RTE_BBDEV_LDPC_MAX_CODE_BLOCKS, > + .num_buffers_dst = > + > RTE_BBDEV_LDPC_MAX_CODE_BLOCKS, > + } > + }, > + { > + .type = RTE_BBDEV_OP_LDPC_DEC, > + .cap.ldpc_dec = { > + .capability_flags = > + RTE_BBDEV_LDPC_CRC_TYPE_24A_CHECK | > + > RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK | > + > RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP, > + .num_buffers_src = > + > RTE_BBDEV_LDPC_MAX_CODE_BLOCKS, > + .num_buffers_hard_out = > + > RTE_BBDEV_LDPC_MAX_CODE_BLOCKS, > + .llr_size = 8, > + .llr_decimals = 1, > + } > + }, > + RTE_BBDEV_END_OF_CAPABILITIES_LIST() > +}; > + > +static struct rte_bbdev_queue_conf default_queue_conf = { > + .queue_size = MAX_CHANNEL_DEPTH, > +}; > + > +/* Get device info */ > +static void > +la12xx_info_get(struct rte_bbdev *dev __rte_unused, > + struct rte_bbdev_driver_info *dev_info) { > + PMD_INIT_FUNC_TRACE(); > + > + dev_info->driver_name = RTE_STR(DRIVER_NAME); > + dev_info->max_num_queues = LA12XX_MAX_QUEUES; > + dev_info->queue_size_lim = MAX_CHANNEL_DEPTH; > + dev_info->hardware_accelerated = true; > + dev_info->max_dl_queue_priority = 0; > + dev_info->max_ul_queue_priority = 0; > + dev_info->support_be_data = 1; > + dev_info->default_queue_conf = default_queue_conf; > + dev_info->capabilities = bbdev_capabilities; > + dev_info->cpu_flag_reqs = NULL; > + dev_info->min_alignment = 64; > + > + rte_bbdev_log_debug("got device info from %u", dev->data- > >dev_id); } > + > +/* Release queue */ > +static int > +la12xx_queue_release(struct rte_bbdev *dev, uint16_t q_id) { > + RTE_SET_USED(dev); > + RTE_SET_USED(q_id); > + > + PMD_INIT_FUNC_TRACE(); > + > + return 0; > +} > + > +#define HUGEPG_OFFSET(A) \ > + ((uint64_t) ((unsigned long) (A) \ > + - ((uint64_t)ipc_priv->hugepg_start.host_vaddr))) > + > +static int ipc_queue_configure(uint32_t channel_id, > + ipc_t instance, struct bbdev_la12xx_q_priv *q_priv) { > + ipc_userspace_t *ipc_priv = (ipc_userspace_t *)instance; > + ipc_instance_t *ipc_instance = ipc_priv->instance; > + ipc_ch_t *ch; > + void *vaddr; > + uint32_t i = 0; > + uint32_t msg_size = sizeof(struct bbdev_ipc_enqueue_op); > + > + PMD_INIT_FUNC_TRACE(); > + > + rte_bbdev_log_debug("%x %p", ipc_instance->initialized, > + ipc_priv->instance); > + ch = &(ipc_instance->ch_list[channel_id]); > + > + rte_bbdev_log_debug("channel: %u, depth: %u, msg size: %u", > + channel_id, q_priv->queue_size, msg_size); > + > + /* Start init of channel */ > + ch->md.ring_size = rte_cpu_to_be_32(q_priv->queue_size); > + ch->md.pi = 0; > + ch->md.ci = 0; > + ch->md.msg_size = msg_size; > + for (i = 0; i < q_priv->queue_size; i++) { > + vaddr = rte_malloc(NULL, msg_size, RTE_CACHE_LINE_SIZE); > + if (!vaddr) > + return IPC_HOST_BUF_ALLOC_FAIL; > + /* Only offset now */ > + ch->bd_h[i].modem_ptr = > + rte_cpu_to_be_32(HUGEPG_OFFSET(vaddr)); > + ch->bd_h[i].host_virt_l = lower_32_bits(vaddr); > + ch->bd_h[i].host_virt_h = upper_32_bits(vaddr); > + q_priv->msg_ch_vaddr[i] = vaddr; > + /* Not sure use of this len may be for CRC*/ > + ch->bd_h[i].len = 0; > + } > + ch->host_ipc_params = > + rte_cpu_to_be_32(HUGEPG_OFFSET(q_priv->host_params)); > + > + rte_bbdev_log_debug("Channel configured"); > + return IPC_SUCCESS; > +} > + > +static int > +la12xx_e200_queue_setup(struct rte_bbdev *dev, > + struct bbdev_la12xx_q_priv *q_priv) > +{ > + struct bbdev_la12xx_private *priv = dev->data->dev_private; > + ipc_userspace_t *ipc_priv = priv->ipc_priv; > + struct gul_hif *mhif; > + ipc_metadata_t *ipc_md; > + ipc_ch_t *ch; > + int instance_id = 0, i; > + int ret; > + > + PMD_INIT_FUNC_TRACE(); > + > + switch (q_priv->op_type) { > + case RTE_BBDEV_OP_LDPC_ENC: > + q_priv->la12xx_core_id = LA12XX_LDPC_ENC_CORE; > + break; > + case RTE_BBDEV_OP_LDPC_DEC: > + q_priv->la12xx_core_id = LA12XX_LDPC_DEC_CORE; > + break; > + default: > + rte_bbdev_log(ERR, "Unsupported op type\n"); > + return -1; > + } > + > + mhif = (struct gul_hif *)ipc_priv->mhif_start.host_vaddr; > + /* offset is from start of PEB */ > + ipc_md = (ipc_metadata_t *)((uintptr_t)ipc_priv- > >peb_start.host_vaddr + > + mhif->ipc_regs.ipc_mdata_offset); > + ch = &ipc_md->instance_list[instance_id].ch_list[q_priv->q_id]; > + > + if (q_priv->q_id < priv->num_valid_queues) { > + ipc_br_md_t *md = &(ch->md); > + > + q_priv->feca_blk_id = rte_cpu_to_be_32(ch->feca_blk_id); > + q_priv->feca_blk_id_be32 = ch->feca_blk_id; > + q_priv->host_pi = rte_be_to_cpu_32(md->pi); > + q_priv->host_ci = rte_be_to_cpu_32(md->ci); > + q_priv->host_params = (host_ipc_params_t *)(uintptr_t) > + (rte_be_to_cpu_32(ch->host_ipc_params) + > + ((uint64_t)ipc_priv->hugepg_start.host_vaddr)); > + > + for (i = 0; i < q_priv->queue_size; i++) { > + uint32_t h, l; > + > + h = ch->bd_h[i].host_virt_h; > + l = ch->bd_h[i].host_virt_l; > + q_priv->msg_ch_vaddr[i] = (void *)join_32_bits(h, l); > + } > + > + rte_bbdev_log(WARNING, > + "Queue [%d] already configured, not configuring > again", > + q_priv->q_id); > + return 0; > + } > + > + rte_bbdev_log_debug("setting up queue %d", q_priv->q_id); > + > + /* Call ipc_configure_channel */ > + ret = ipc_queue_configure(q_priv->q_id, ipc_priv, q_priv); > + if (ret) { > + rte_bbdev_log(ERR, "Unable to setup queue (%d) (err=%d)", > + q_priv->q_id, ret); > + return ret; > + } > + > + /* Set queue properties for LA12xx device */ > + switch (q_priv->op_type) { > + case RTE_BBDEV_OP_LDPC_ENC: > + if (priv->num_ldpc_enc_queues >= > LA12XX_MAX_LDPC_ENC_QUEUES) { > + rte_bbdev_log(ERR, > + "num_ldpc_enc_queues reached max > value"); > + return -1; > + } > + ch->la12xx_core_id = > + rte_cpu_to_be_32(LA12XX_LDPC_ENC_CORE); > + ch->feca_blk_id = rte_cpu_to_be_32(priv- > >num_ldpc_enc_queues++); > + break; > + case RTE_BBDEV_OP_LDPC_DEC: > + if (priv->num_ldpc_dec_queues >= > LA12XX_MAX_LDPC_DEC_QUEUES) { > + rte_bbdev_log(ERR, > + "num_ldpc_dec_queues reached max > value"); > + return -1; > + } > + ch->la12xx_core_id = > + rte_cpu_to_be_32(LA12XX_LDPC_DEC_CORE); > + ch->feca_blk_id = rte_cpu_to_be_32(priv- > >num_ldpc_dec_queues++); > + break; > + default: > + rte_bbdev_log(ERR, "Not supported op type\n"); > + return -1; > + } > + ch->op_type = rte_cpu_to_be_32(q_priv->op_type); > + ch->depth = rte_cpu_to_be_32(q_priv->queue_size); > + > + /* Store queue config here */ > + q_priv->feca_blk_id = rte_cpu_to_be_32(ch->feca_blk_id); > + q_priv->feca_blk_id_be32 = ch->feca_blk_id; > + > + return 0; > +} > + > +/* Setup a queue */ > +static int > +la12xx_queue_setup(struct rte_bbdev *dev, uint16_t q_id, > + const struct rte_bbdev_queue_conf *queue_conf) { > + struct bbdev_la12xx_private *priv = dev->data->dev_private; > + struct rte_bbdev_queue_data *q_data; > + struct bbdev_la12xx_q_priv *q_priv; > + int ret; > + > + PMD_INIT_FUNC_TRACE(); > + > + /* Move to setup_queues callback */ > + q_data = &dev->data->queues[q_id]; > + q_data->queue_private = rte_zmalloc(NULL, > + sizeof(struct bbdev_la12xx_q_priv), 0); > + if (!q_data->queue_private) { > + rte_bbdev_log(ERR, "Memory allocation failed for qpriv"); > + return -ENOMEM; > + } > + q_priv = q_data->queue_private; > + q_priv->q_id = q_id; > + q_priv->bbdev_priv = dev->data->dev_private; > + q_priv->queue_size = queue_conf->queue_size; > + q_priv->op_type = queue_conf->op_type; > + > + ret = la12xx_e200_queue_setup(dev, q_priv); > + if (ret) { > + rte_bbdev_log(ERR, "e200_queue_setup failed for qid: %d", > + q_id); > + return ret; > + } > + > + /* Store queue config here */ > + priv->num_valid_queues++; > + > + return 0; > +} > + > +static int > +la12xx_start(struct rte_bbdev *dev) > +{ > + struct bbdev_la12xx_private *priv = dev->data->dev_private; > + ipc_userspace_t *ipc_priv = priv->ipc_priv; > + int ready = 0; > + struct gul_hif *hif_start; > + > + PMD_INIT_FUNC_TRACE(); > + > + hif_start = (struct gul_hif *)ipc_priv->mhif_start.host_vaddr; > + > + /* Set Host Read bit */ > + SET_HIF_HOST_RDY(hif_start, HIF_HOST_READY_IPC_APP); > + > + /* Now wait for modem ready bit */ > + while (!ready) > + ready = CHK_HIF_MOD_RDY(hif_start, > HIF_MOD_READY_IPC_APP); > + > + return 0; > +} > + > +static const struct rte_bbdev_ops pmd_ops = { > + .info_get = la12xx_info_get, > + .queue_setup = la12xx_queue_setup, > + .queue_release = la12xx_queue_release, > + .start = la12xx_start > +}; > +static struct hugepage_info * > +get_hugepage_info(void) > +{ > + struct hugepage_info *hp_info; > + struct rte_memseg *mseg; > + > + PMD_INIT_FUNC_TRACE(); > + > + /* TODO - find a better way */ > + hp_info = rte_malloc(NULL, sizeof(struct hugepage_info), 0); > + if (!hp_info) { > + rte_bbdev_log(ERR, "Unable to allocate on local heap"); > + return NULL; > + } > + > + mseg = rte_mem_virt2memseg(hp_info, NULL); > + hp_info->vaddr = mseg->addr; > + hp_info->paddr = rte_mem_virt2phy(mseg->addr); > + hp_info->len = mseg->len; > + > + return hp_info; > +} > + > +static int open_ipc_dev(int modem_id) > +{ > + char dev_initials[16], dev_path[PATH_MAX]; > + struct dirent *entry; > + int dev_ipc = 0; > + DIR *dir; > + > + dir = opendir("/dev/"); > + if (!dir) { > + rte_bbdev_log(ERR, "Unable to open /dev/"); > + return -1; > + } > + > + sprintf(dev_initials, "gulipcgul%d", modem_id); > + > + while ((entry = readdir(dir)) != NULL) { > + if (!strncmp(dev_initials, entry->d_name, > + sizeof(dev_initials) - 1)) > + break; > + } > + > + if (!entry) { > + rte_bbdev_log(ERR, "Error: No gulipcgul%d device", > modem_id); > + return -1; > + } > + > + sprintf(dev_path, "/dev/%s", entry->d_name); > + dev_ipc = open(dev_path, O_RDWR); > + if (dev_ipc < 0) { > + rte_bbdev_log(ERR, "Error: Cannot open %s", dev_path); > + return -errno; > + } > + > + return dev_ipc; > +} > + > +static int > +setup_la12xx_dev(struct rte_bbdev *dev) { > + struct bbdev_la12xx_private *priv = dev->data->dev_private; > + ipc_userspace_t *ipc_priv = priv->ipc_priv; > + struct hugepage_info *hp = NULL; > + ipc_channel_us_t *ipc_priv_ch = NULL; > + int dev_ipc = 0, dev_mem = 0, i; > + ipc_metadata_t *ipc_md; > + struct gul_hif *mhif; > + uint32_t phy_align = 0; > + int ret; > + > + PMD_INIT_FUNC_TRACE(); > + > + if (!ipc_priv) { > + /* TODO - get a better way */ > + /* Get the hugepage info against it */ > + hp = get_hugepage_info(); > + if (!hp) { > + rte_bbdev_log(ERR, "Unable to get hugepage info"); > + ret = -ENOMEM; > + goto err; > + } > + > + rte_bbdev_log_debug("0x%" PRIx64 " %p 0x%" PRIx64, > + hp->paddr, hp->vaddr, hp->len); > + > + ipc_priv = rte_zmalloc(0, sizeof(ipc_userspace_t), 0); > + if (ipc_priv == NULL) { > + rte_bbdev_log(ERR, > + "Unable to allocate memory for ipc priv"); > + ret = -ENOMEM; > + goto err; > + } > + > + for (i = 0; i < IPC_MAX_CHANNEL_COUNT; i++) { > + ipc_priv_ch = rte_zmalloc(0, > + sizeof(ipc_channel_us_t), 0); > + if (ipc_priv_ch == NULL) { > + rte_bbdev_log(ERR, > + "Unable to allocate memory for > channels"); > + ret = -ENOMEM; > + } > + ipc_priv->channels[i] = ipc_priv_ch; > + } > + > + dev_mem = open("/dev/mem", O_RDWR); > + if (dev_mem < 0) { > + rte_bbdev_log(ERR, "Error: Cannot open > /dev/mem"); > + ret = -errno; > + goto err; > + } > + > + ipc_priv->instance_id = 0; > + ipc_priv->dev_mem = dev_mem; > + > + rte_bbdev_log_debug("hugepg input 0x%" PRIx64 "%p 0x%" > PRIx64, > + hp->paddr, hp->vaddr, hp->len); > + > + ipc_priv->sys_map.hugepg_start.host_phys = hp->paddr; > + ipc_priv->sys_map.hugepg_start.size = hp->len; > + > + ipc_priv->hugepg_start.host_phys = hp->paddr; > + ipc_priv->hugepg_start.host_vaddr = hp->vaddr; > + ipc_priv->hugepg_start.size = hp->len; > + > + rte_free(hp); > + } > + > + dev_ipc = open_ipc_dev(priv->modem_id); > + if (dev_ipc < 0) { > + rte_bbdev_log(ERR, "Error: open_ipc_dev failed"); > + goto err; > + } > + ipc_priv->dev_ipc = dev_ipc; > + > + ret = ioctl(ipc_priv->dev_ipc, IOCTL_GUL_IPC_GET_SYS_MAP, > + &ipc_priv->sys_map); > + if (ret) { > + rte_bbdev_log(ERR, > + "IOCTL_GUL_IPC_GET_SYS_MAP ioctl failed"); > + goto err; > + } > + > + phy_align = (ipc_priv->sys_map.mhif_start.host_phys % 0x1000); > + ipc_priv->mhif_start.host_vaddr = > + mmap(0, ipc_priv->sys_map.mhif_start.size + phy_align, > + (PROT_READ | PROT_WRITE), MAP_SHARED, ipc_priv- > >dev_mem, > + (ipc_priv->sys_map.mhif_start.host_phys - phy_align)); > + if (ipc_priv->mhif_start.host_vaddr == MAP_FAILED) { > + rte_bbdev_log(ERR, "MAP failed:"); > + ret = -errno; > + goto err; > + } > + > + ipc_priv->mhif_start.host_vaddr = (void *) ((uintptr_t) > + (ipc_priv->mhif_start.host_vaddr) + phy_align); > + > + phy_align = (ipc_priv->sys_map.peb_start.host_phys % 0x1000); > + ipc_priv->peb_start.host_vaddr = > + mmap(0, ipc_priv->sys_map.peb_start.size + phy_align, > + (PROT_READ | PROT_WRITE), MAP_SHARED, ipc_priv- > >dev_mem, > + (ipc_priv->sys_map.peb_start.host_phys - phy_align)); > + if (ipc_priv->peb_start.host_vaddr == MAP_FAILED) { > + rte_bbdev_log(ERR, "MAP failed:"); > + ret = -errno; > + goto err; > + } > + > + ipc_priv->peb_start.host_vaddr = (void *)((uintptr_t) > + (ipc_priv->peb_start.host_vaddr) + phy_align); > + > + phy_align = (ipc_priv->sys_map.modem_ccsrbar.host_phys % > 0x1000); > + ipc_priv->modem_ccsrbar.host_vaddr = > + mmap(0, ipc_priv->sys_map.modem_ccsrbar.size + > phy_align, > + (PROT_READ | PROT_WRITE), MAP_SHARED, ipc_priv- > >dev_mem, > + (ipc_priv->sys_map.modem_ccsrbar.host_phys - > phy_align)); > + if (ipc_priv->modem_ccsrbar.host_vaddr == MAP_FAILED) { > + rte_bbdev_log(ERR, "MAP failed:"); > + ret = -errno; > + goto err; > + } > + > + ipc_priv->modem_ccsrbar.host_vaddr = (void *)((uintptr_t) > + (ipc_priv->modem_ccsrbar.host_vaddr) + phy_align); > + > + ipc_priv->hugepg_start.modem_phys = > + ipc_priv->sys_map.hugepg_start.modem_phys; > + > + ipc_priv->mhif_start.host_phys = > + ipc_priv->sys_map.mhif_start.host_phys; > + ipc_priv->mhif_start.size = ipc_priv->sys_map.mhif_start.size; > + ipc_priv->peb_start.host_phys = ipc_priv- > >sys_map.peb_start.host_phys; > + ipc_priv->peb_start.size = ipc_priv->sys_map.peb_start.size; > + > + rte_bbdev_log(INFO, "peb 0x%" PRIx64 "%p 0x%" PRIx32, > + ipc_priv->peb_start.host_phys, > + ipc_priv->peb_start.host_vaddr, > + ipc_priv->peb_start.size); > + rte_bbdev_log(INFO, "hugepg 0x%" PRIx64 "%p 0x%" PRIx32, > + ipc_priv->hugepg_start.host_phys, > + ipc_priv->hugepg_start.host_vaddr, > + ipc_priv->hugepg_start.size); > + rte_bbdev_log(INFO, "mhif 0x%" PRIx64 "%p 0x%" PRIx32, > + ipc_priv->mhif_start.host_phys, > + ipc_priv->mhif_start.host_vaddr, > + ipc_priv->mhif_start.size); > + mhif = (struct gul_hif *)ipc_priv->mhif_start.host_vaddr; > + > + /* offset is from start of PEB */ > + ipc_md = (ipc_metadata_t *)((uint64_t)ipc_priv- > >peb_start.host_vaddr + > + mhif->ipc_regs.ipc_mdata_offset); > + > + if (sizeof(ipc_metadata_t) != mhif->ipc_regs.ipc_mdata_size) { > + rte_bbdev_log(ERR, > + "ipc_metadata_t =0x%" PRIx64 > + ", mhif->ipc_regs.ipc_mdata_size=0x%" PRIx32, > + sizeof(ipc_metadata_t), mhif- > >ipc_regs.ipc_mdata_size); > + rte_bbdev_log(ERR, "--> mhif->ipc_regs.ipc_mdata_offset= > 0x%" > + PRIx32, mhif->ipc_regs.ipc_mdata_offset); > + rte_bbdev_log(ERR, "gul_hif size=0x%" PRIx64, > + sizeof(struct gul_hif)); > + return IPC_MD_SZ_MISS_MATCH; > + } > + > + ipc_priv->instance = (ipc_instance_t *) > + (&ipc_md->instance_list[ipc_priv->instance_id]); > + > + rte_bbdev_log_debug("finish host init"); > + > + priv->ipc_priv = ipc_priv; > + > + return 0; > + > +err: > + rte_free(hp); > + rte_free(ipc_priv); > + rte_free(ipc_priv_ch); > + if (dev_mem) > + close(dev_mem); > + if (dev_ipc) > + close(dev_ipc); > + > + return ret; > +} > + > static inline int > parse_u16_arg(const char *key, const char *value, void *extra_args) { @@ - > 122,6 +668,7 @@ la12xx_bbdev_create(struct rte_vdev_device *vdev, > struct rte_bbdev *bbdev; > const char *name = rte_vdev_device_name(vdev); > struct bbdev_la12xx_private *priv; > + int ret; > > PMD_INIT_FUNC_TRACE(); > > @@ -151,7 +698,13 @@ la12xx_bbdev_create(struct rte_vdev_device > *vdev, > > rte_bbdev_log(INFO, "Setting Up %s: DevId=%d, ModemId=%d", > name, bbdev->data->dev_id, priv- > >modem_id); > - bbdev->dev_ops = NULL; > + ret = setup_la12xx_dev(bbdev); > + if (ret) { > + rte_bbdev_log(ERR, "IPC Setup failed for %s", name); > + rte_free(bbdev->data->dev_private); > + return ret; > + } > + bbdev->dev_ops = &pmd_ops; > bbdev->device = &vdev->device; > bbdev->data->socket_id = 0; > bbdev->intr_handle = NULL; > diff --git a/drivers/baseband/la12xx/bbdev_la12xx.h > b/drivers/baseband/la12xx/bbdev_la12xx.h > index 5228502331..fe91e62bf6 100644 > --- a/drivers/baseband/la12xx/bbdev_la12xx.h > +++ b/drivers/baseband/la12xx/bbdev_la12xx.h > @@ -5,16 +5,10 @@ > #ifndef __BBDEV_LA12XX_H__ > #define __BBDEV_LA12XX_H__ > > -#define BBDEV_IPC_ENC_OP_TYPE 1 > -#define BBDEV_IPC_DEC_OP_TYPE 2 > - > -#define MAX_LDPC_ENC_FECA_QUEUES 4 > -#define MAX_LDPC_DEC_FECA_QUEUES 4 > - > #define MAX_CHANNEL_DEPTH 16 > /* private data structure */ > struct bbdev_la12xx_private { > - void *ipc_priv; > + ipc_userspace_t *ipc_priv; > uint8_t num_valid_queues; > uint8_t max_nb_queues; > uint8_t num_ldpc_enc_queues; > @@ -32,14 +26,14 @@ struct hugepage_info { struct bbdev_la12xx_q_priv { > struct bbdev_la12xx_private *bbdev_priv; > uint32_t q_id; /**< Channel ID */ > - uint32_t feca_blk_id; /** FECA block ID for processing */ > + uint32_t feca_blk_id; /**< FECA block ID for processing */ > uint32_t feca_blk_id_be32; /**< FECA Block ID for this queue */ > - uint8_t en_napi; /* 0: napi disabled, 1: napi enabled */ > + uint8_t en_napi; /**< 0: napi disabled, 1: napi enabled */ > uint16_t queue_size; /**< Queue depth */ > int32_t eventfd; /**< Event FD value */ > enum rte_bbdev_op_type op_type; /**< Operation type */ > uint32_t la12xx_core_id; > - /* LA12xx core ID on which this will be scheduled */ > + /**< LA12xx core ID on which this will be scheduled */ > struct rte_mempool *mp; /**< Pool from where buffers would be > cut */ > void *bbdev_op[MAX_CHANNEL_DEPTH]; > /**< Stores bbdev op for each index */ @@ -52,5 > +46,6 @@ struct bbdev_la12xx_q_priv { > > #define lower_32_bits(x) ((uint32_t)((uint64_t)x)) #define upper_32_bits(x) > ((uint32_t)(((uint64_t)(x) >> 16) >> 16)) > - > +#define join_32_bits(upper, lower) \ > + ((size_t)(((uint64_t)(upper) << 32) | (uint32_t)(lower))) > #endif > diff --git a/drivers/baseband/la12xx/bbdev_la12xx_ipc.h > b/drivers/baseband/la12xx/bbdev_la12xx_ipc.h > index 9aa5562981..5f613fb087 100644 > --- a/drivers/baseband/la12xx/bbdev_la12xx_ipc.h > +++ b/drivers/baseband/la12xx/bbdev_la12xx_ipc.h > @@ -4,9 +4,182 @@ > #ifndef __BBDEV_LA12XX_IPC_H__ > #define __BBDEV_LA12XX_IPC_H__ > > +#define LA12XX_MAX_QUEUES 20 > +#define HOST_RX_QUEUEID_OFFSET LA12XX_MAX_QUEUES > + > +/** No. of max channel per instance */ > +#define IPC_MAX_CHANNEL_COUNT (64) > + > /** No. of max channel per instance */ > #define IPC_MAX_DEPTH (16) > > +/** No. of max IPC instance per modem */ > +#define IPC_MAX_INSTANCE_COUNT (1) > + > +/** Error codes */ > +#define IPC_SUCCESS (0) /** IPC operation success */ > +#define IPC_INPUT_INVALID (-1) /** Invalid input to API */ > +#define IPC_CH_INVALID (-2) /** Channel no is invalid */ > +#define IPC_INSTANCE_INVALID (-3) /** Instance no is invalid */ > +#define IPC_MEM_INVALID (-4) /** Insufficient memory */ > +#define IPC_CH_FULL (-5) /** Channel is full */ > +#define IPC_CH_EMPTY (-6) /** Channel is empty */ > +#define IPC_BL_EMPTY (-7) /** Free buffer list is empty */ > +#define IPC_BL_FULL (-8) /** Free buffer list is full */ > +#define IPC_HOST_BUF_ALLOC_FAIL (-9) /** DPDK malloc fail */ > +#define IPC_MD_SZ_MISS_MATCH (-10) /** META DATA size in mhif > miss matched*/ > +#define IPC_MALLOC_FAIL (-11) /** system malloc fail */ > +#define IPC_IOCTL_FAIL (-12) /** IOCTL call failed */ > +#define IPC_MMAP_FAIL (-14) /** MMAP fail */ > +#define IPC_OPEN_FAIL (-15) /** OPEN fail */ > +#define IPC_EVENTFD_FAIL (-16) /** eventfd initialization failed */ > +#define IPC_NOT_IMPLEMENTED (-17) /** IPC feature is not > implemented yet*/ > + > +#define SET_HIF_HOST_RDY(hif, RDY_MASK) (hif->host_ready |= > RDY_MASK) > +#define CHK_HIF_MOD_RDY(hif, RDY_MASK) (hif->mod_ready & > RDY_MASK) > + > +/* Host Ready bits */ > +#define HIF_HOST_READY_HOST_REGIONS (1 << 0) > +#define HIF_HOST_READY_IPC_LIB (1 << 12) > +#define HIF_HOST_READY_IPC_APP (1 << 13) > +#define HIF_HOST_READY_FECA (1 << 14) > + > +/* Modem Ready bits */ > +#define HIF_MOD_READY_IPC_LIB (1 << 5) > +#define HIF_MOD_READY_IPC_APP (1 << 6) > +#define HIF_MOD_READY_FECA (1 << 7) > + > +typedef void *ipc_t; > + > +struct ipc_msg { > + int chid; > + void *addr; > + uint32_t len; > + uint8_t flags; > +}; > + > +typedef struct { > + uint64_t host_phys; > + uint32_t modem_phys; > + void *host_vaddr; > + uint32_t size; > +} mem_range_t; > + > +#define GUL_IPC_MAGIC 'R' > + > +#define IOCTL_GUL_IPC_GET_SYS_MAP _IOW(GUL_IPC_MAGIC, 1, struct > ipc_msg > +*) #define IOCTL_GUL_IPC_CHANNEL_REGISTER _IOWR(GUL_IPC_MAGIC, 4, > +struct ipc_msg *) #define IOCTL_GUL_IPC_CHANNEL_DEREGISTER \ > + _IOWR(GUL_IPC_MAGIC, 5, struct ipc_msg *) #define > +IOCTL_GUL_IPC_CHANNEL_RAISE_INTERRUPT _IOW(GUL_IPC_MAGIC, 6, int > *) > + > +/** buffer ring common metadata */ > +typedef struct ipc_bd_ring_md { > + volatile uint32_t pi; /**< Producer index and flag (MSB) > + * which flip for each Ring wrapping > + */ > + volatile uint32_t ci; /**< Consumer index and flag (MSB) > + * which flip for each Ring wrapping > + */ > + uint32_t ring_size; /**< depth (Used to roll-over pi/ci) */ > + uint32_t msg_size; /**< Size of the each buffer */ > +} __rte_packed ipc_br_md_t; > + > +/** IPC buffer descriptor */ > +typedef struct ipc_buffer_desc { > + union { > + uint64_t host_virt; /**< msg's host virtual address */ > + struct { > + uint32_t host_virt_l; > + uint32_t host_virt_h; > + }; > + }; > + uint32_t modem_ptr; /**< msg's modem physical address */ > + uint32_t len; /**< msg len */ > +} __rte_packed ipc_bd_t; > + > +typedef struct ipc_channel { > + uint32_t ch_id; /**< Channel id */ > + ipc_br_md_t md; /**< Metadata for BD ring */ > + ipc_bd_t bd_h[IPC_MAX_DEPTH]; /**< Buffer Descriptor on > Host */ > + ipc_bd_t bd_m[IPC_MAX_DEPTH]; /**< Buffer Descriptor on > Modem */ > + uint32_t op_type; /**< Type of the BBDEV operation > + * supported on this channel > + */ > + uint32_t depth; /**< Channel depth */ > + uint32_t feca_blk_id; /**< FECA Transport Block ID for processing > */ > + uint32_t la12xx_core_id;/**< LA12xx core ID on which this will be > + * scheduled > + */ > + uint32_t feca_input_circ_size; /**< FECA transport block input > + * circular buffer size > + */ > + uint32_t host_ipc_params; /**< Address for host IPC parameters > */ > +} __rte_packed ipc_ch_t; > + > +typedef struct ipc_instance { > + uint32_t instance_id; /**< instance id, use to init this > + * instance by ipc_init API > + */ > + uint32_t initialized; /**< Set in ipc_init */ > + ipc_ch_t ch_list[IPC_MAX_CHANNEL_COUNT]; > + /**< Channel descriptors in this instance */ } __rte_packed > +ipc_instance_t; > + > +typedef struct ipc_metadata { > + uint32_t ipc_host_signature; /**< IPC host signature, Set by host/L2 > */ > + uint32_t ipc_geul_signature; /**< IPC geul signature, Set by modem > */ > + ipc_instance_t instance_list[IPC_MAX_INSTANCE_COUNT]; > +} __rte_packed ipc_metadata_t; > + > +typedef struct ipc_channel_us_priv { > + int32_t eventfd; > + uint32_t channel_id; > + /* In flight packets status for buffer list. */ > + uint8_t bufs_inflight[IPC_MAX_DEPTH]; > +} ipc_channel_us_t; > + > +typedef struct { > + uint64_t host_phys; > + uint32_t modem_phys; > + uint32_t size; > +} mem_strt_addr_t; > + > +typedef struct { > + mem_strt_addr_t modem_ccsrbar; > + mem_strt_addr_t peb_start; /* PEB meta data */ > + mem_strt_addr_t mhif_start; /* MHIF meta daat */ > + mem_strt_addr_t hugepg_start; /* Modem to access hugepage */ } > +sys_map_t; > + > +typedef struct ipc_priv_t { > + int instance_id; > + int dev_ipc; > + int dev_mem; > + sys_map_t sys_map; > + mem_range_t modem_ccsrbar; > + mem_range_t peb_start; > + mem_range_t mhif_start; > + mem_range_t hugepg_start; > + ipc_channel_us_t *channels[IPC_MAX_CHANNEL_COUNT]; > + ipc_instance_t *instance; > + ipc_instance_t *instance_bk; > +} ipc_userspace_t; > + > +/** Structure specifying enqueue operation (enqueue at LA1224) */ > +struct bbdev_ipc_enqueue_op { > + /** Status of operation that was performed */ > + int32_t status; > + /** CRC Status of SD operation that was performed */ > + int32_t crc_stat_addr; > + /** HARQ Output buffer memory length for Shared Decode. > + * Filled by LA12xx. > + */ > + uint32_t out_len; > + /** Reserved (for 8 byte alignment) */ > + uint32_t rsvd; > +}; > + > /* This shared memory would be on the host side which have copy of some > * of the parameters which are also part of Shared BD ring. Read access > * of these parameters from the host side would not be over PCI. > @@ -14,7 +187,21 @@ > typedef struct host_ipc_params { > volatile uint32_t pi; > volatile uint32_t ci; > - volatile uint32_t modem_ptr[IPC_MAX_DEPTH]; > + volatile uint32_t bd_m_modem_ptr[IPC_MAX_DEPTH]; > } __rte_packed host_ipc_params_t; > > +struct hif_ipc_regs { > + uint32_t ipc_mdata_offset; > + uint32_t ipc_mdata_size; > +} __rte_packed; > + > +struct gul_hif { > + uint32_t ver; > + uint32_t hif_ver; > + uint32_t status; > + volatile uint32_t host_ready; > + volatile uint32_t mod_ready; > + struct hif_ipc_regs ipc_regs; > +} __rte_packed; > + > #endif > -- > 2.17.1
> -----Original Message----- > From: nipun.gupta@nxp.com <nipun.gupta@nxp.com> > Sent: Tuesday, September 28, 2021 1:30 AM > To: dev@dpdk.org; gakhil@marvell.com; Chautru, Nicolas > <nicolas.chautru@intel.com> > Cc: david.marchand@redhat.com; hemant.agrawal@nxp.com; Nipun Gupta > <nipun.gupta@nxp.com> > Subject: [PATCH v7 6/9] baseband/la12xx: add enqueue and dequeue > support > > From: Hemant Agrawal <hemant.agrawal@nxp.com> > > Add support for enqueue and dequeue the LDPC enc/dec from the modem > device. > > Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> > Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> > --- > doc/guides/bbdevs/features/la12xx.ini | 13 + > doc/guides/bbdevs/la12xx.rst | 47 ++- > drivers/baseband/la12xx/bbdev_la12xx.c | 328 ++++++++++++++++++++- > drivers/baseband/la12xx/bbdev_la12xx_ipc.h | 37 +++ > 4 files changed, 420 insertions(+), 5 deletions(-) create mode 100644 > doc/guides/bbdevs/features/la12xx.ini > > diff --git a/doc/guides/bbdevs/features/la12xx.ini > b/doc/guides/bbdevs/features/la12xx.ini > new file mode 100644 > index 0000000000..0aec5eecb6 > --- /dev/null > +++ b/doc/guides/bbdevs/features/la12xx.ini > @@ -0,0 +1,13 @@ > +; > +; Supported features of the 'la12xx' bbdev driver. > +; > +; Refer to default.ini for the full list of available PMD features. > +; > +[Features] > +Turbo Decoder (4G) = N > +Turbo Encoder (4G) = N > +LDPC Decoder (5G) = Y > +LDPC Encoder (5G) = Y > +LLR/HARQ Compression = N > +HW Accelerated = Y > +BBDEV API = Y > diff --git a/doc/guides/bbdevs/la12xx.rst b/doc/guides/bbdevs/la12xx.rst > index 3c9ac5c047..b111ec0dd6 100644 > --- a/doc/guides/bbdevs/la12xx.rst > +++ b/doc/guides/bbdevs/la12xx.rst > @@ -16,10 +16,11 @@ Features > > LA12xx PMD supports the following features: > > +- LDPC Encode in the DL > +- LDPC Decode in the UL > - Maximum of 8 UL queues > - Maximum of 8 DL queues > - PCIe Gen-3 x8 Interface > -- MSI-X > > Installation > ------------ > @@ -79,3 +80,47 @@ For enabling logs, use the following EAL parameter: > > Using ``bb.la12xx`` as log matching criteria, all Baseband PMD logs can be > enabled which are lower than logging ``level``. > + > +Test Application > +---------------- > + > +BBDEV provides a test application, ``test-bbdev.py`` and range of test > +data for testing the functionality of LA12xx for FEC encode and decode, > +depending on the device capabilities. The test application is located > +under app->test-bbdev folder and has the following options: > + > +.. code-block:: console > + > + "-p", "--testapp-path": specifies path to the bbdev test app. > + "-e", "--eal-params" : EAL arguments which are passed to the test app. > + "-t", "--timeout" : Timeout in seconds (default=300). > + "-c", "--test-cases" : Defines test cases to run. Run all if not specified. > + "-v", "--test-vector" : Test vector path (default=dpdk_path+/app/test- > bbdev/test_vectors/bbdev_null.data). > + "-n", "--num-ops" : Number of operations to process on device > (default=32). > + "-b", "--burst-size" : Operations enqueue/dequeue burst size > (default=32). > + "-s", "--snr" : SNR in dB used when generating LLRs for bler tests. > + "-s", "--iter_max" : Number of iterations for LDPC decoder. > + "-l", "--num-lcores" : Number of lcores to run (default=16). > + "-i", "--init-device" : Initialise PF device with default values. > + > + > +To execute the test application tool using simple decode or encode > +data, type one of the following: > + > +.. code-block:: console > + > + ./test-bbdev.py > + -e="--vdev=baseband_la12xx,socket_id=0,max_nb_queues=8" -c validation > + -n 64 -b 1 -v ./ldpc_dec_default.data ./test-bbdev.py > + -e="--vdev=baseband_la12xx,socket_id=0,max_nb_queues=8" -c validation > + -n 64 -b 1 -v ./ldpc_enc_default.data > + > +The test application ``test-bbdev.py``, supports the ability to > +configure the PF device with a default set of values, if the "-i" or "- > +-init-device" option is included. The default values are defined in > test_bbdev_perf.c. > + > + > +Test Vectors > +~~~~~~~~~~~~ > + > +In addition to the simple LDPC decoder and LDPC encoder tests, bbdev > +also provides a range of additional tests under the test_vectors > +folder, which may be useful. The results of these tests will depend on > +the LA12xx FEC capabilities which may cause some testcases to be skipped, > but no failure should be reported. > diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c > b/drivers/baseband/la12xx/bbdev_la12xx.c > index 46ee5b4d70..69ca83cee6 100644 > --- a/drivers/baseband/la12xx/bbdev_la12xx.c > +++ b/drivers/baseband/la12xx/bbdev_la12xx.c > @@ -120,6 +120,10 @@ la12xx_queue_release(struct rte_bbdev *dev, > uint16_t q_id) > ((uint64_t) ((unsigned long) (A) \ > - ((uint64_t)ipc_priv->hugepg_start.host_vaddr))) > > +#define MODEM_P2V(A) \ > + ((uint64_t) ((unsigned long) (A) \ > + + (unsigned long)(ipc_priv->peb_start.host_vaddr))) > + > static int ipc_queue_configure(uint32_t channel_id, > ipc_t instance, struct bbdev_la12xx_q_priv *q_priv) { @@ - > 334,6 +338,318 @@ static const struct rte_bbdev_ops pmd_ops = { > .queue_release = la12xx_queue_release, > .start = la12xx_start > }; > + > +static inline int > +is_bd_ring_full(uint32_t ci, uint32_t ci_flag, > + uint32_t pi, uint32_t pi_flag) > +{ > + if (pi == ci) { > + if (pi_flag != ci_flag) > + return 1; /* Ring is Full */ > + } > + return 0; > +} > + > +static inline int > +prepare_ldpc_enc_op(struct rte_bbdev_enc_op *bbdev_enc_op, > + struct bbdev_la12xx_q_priv *q_priv __rte_unused, > + struct rte_bbdev_op_data *in_op_data __rte_unused, > + struct rte_bbdev_op_data *out_op_data) { > + struct rte_bbdev_op_ldpc_enc *ldpc_enc = &bbdev_enc_op- > >ldpc_enc; > + uint32_t total_out_bits; > + > + total_out_bits = (ldpc_enc->tb_params.cab * > + ldpc_enc->tb_params.ea) + (ldpc_enc->tb_params.c - > + ldpc_enc->tb_params.cab) * ldpc_enc->tb_params.eb; > + > + ldpc_enc->output.length = (total_out_bits + 7)/8; > + > + rte_pktmbuf_append(out_op_data->data, ldpc_enc->output.length); > + > + return 0; > +} > + > +static inline int > +prepare_ldpc_dec_op(struct rte_bbdev_dec_op *bbdev_dec_op, > + struct bbdev_ipc_dequeue_op *bbdev_ipc_op, > + struct bbdev_la12xx_q_priv *q_priv __rte_unused, > + struct rte_bbdev_op_data *out_op_data __rte_unused) { > + struct rte_bbdev_op_ldpc_dec *ldpc_dec = &bbdev_dec_op- > >ldpc_dec; > + uint32_t total_out_bits; > + uint32_t num_code_blocks = 0; > + uint16_t sys_cols; > + > + sys_cols = (ldpc_dec->basegraph == 1) ? 22 : 10; > + if (ldpc_dec->tb_params.c == 1) { > + total_out_bits = ((sys_cols * ldpc_dec->z_c) - > + ldpc_dec->n_filler); > + /* 5G-NR protocol uses 16 bit CRC when output packet > + * size <= 3824 (bits). Otherwise 24 bit CRC is used. > + * Adjust the output bits accordingly > + */ > + if (total_out_bits - 16 <= 3824) > + total_out_bits -= 16; > + else > + total_out_bits -= 24; > + ldpc_dec->hard_output.length = (total_out_bits / 8); > + } else { > + total_out_bits = (((sys_cols * ldpc_dec->z_c) - > + ldpc_dec->n_filler - 24) * > + ldpc_dec->tb_params.c); > + ldpc_dec->hard_output.length = (total_out_bits / 8) - 3; > + } > + > + num_code_blocks = ldpc_dec->tb_params.c; > + > + bbdev_ipc_op->num_code_blocks = > rte_cpu_to_be_32(num_code_blocks); > + > + return 0; > +} > + > +static int > +enqueue_single_op(struct bbdev_la12xx_q_priv *q_priv, void *bbdev_op) { > + struct bbdev_la12xx_private *priv = q_priv->bbdev_priv; > + ipc_userspace_t *ipc_priv = priv->ipc_priv; > + ipc_instance_t *ipc_instance = ipc_priv->instance; > + struct bbdev_ipc_dequeue_op *bbdev_ipc_op; > + struct rte_bbdev_op_ldpc_enc *ldpc_enc; > + struct rte_bbdev_op_ldpc_dec *ldpc_dec; > + uint32_t q_id = q_priv->q_id; > + uint32_t ci, ci_flag, pi, pi_flag; > + ipc_ch_t *ch = &(ipc_instance->ch_list[q_id]); > + ipc_br_md_t *md = &(ch->md); > + size_t virt; > + char *huge_start_addr = > + (char *)q_priv->bbdev_priv->ipc_priv- > >hugepg_start.host_vaddr; > + struct rte_bbdev_op_data *in_op_data, *out_op_data; > + char *data_ptr; > + uint32_t l1_pcie_addr; > + int ret; > + > + ci = IPC_GET_CI_INDEX(q_priv->host_ci); > + ci_flag = IPC_GET_CI_FLAG(q_priv->host_ci); > + > + pi = IPC_GET_PI_INDEX(q_priv->host_pi); > + pi_flag = IPC_GET_PI_FLAG(q_priv->host_pi); > + > + rte_bbdev_dp_log(DEBUG, "before bd_ring_full: pi: %u, ci: %u," > + "pi_flag: %u, ci_flag: %u, ring size: %u", > + pi, ci, pi_flag, ci_flag, q_priv->queue_size); > + > + if (is_bd_ring_full(ci, ci_flag, pi, pi_flag)) { > + rte_bbdev_dp_log(DEBUG, "bd ring full for queue id: %d", > q_id); > + return IPC_CH_FULL; > + } > + > + virt = MODEM_P2V(q_priv->host_params->bd_m_modem_ptr[pi]); > + bbdev_ipc_op = (struct bbdev_ipc_dequeue_op *)virt; > + q_priv->bbdev_op[pi] = bbdev_op; > + > + switch (q_priv->op_type) { > + case RTE_BBDEV_OP_LDPC_ENC: > + ldpc_enc = &(((struct rte_bbdev_enc_op *)bbdev_op)- > >ldpc_enc); > + in_op_data = &ldpc_enc->input; > + out_op_data = &ldpc_enc->output; > + > + ret = prepare_ldpc_enc_op(bbdev_op, q_priv, > + in_op_data, out_op_data); > + if (ret) { > + rte_bbdev_log(ERR, "process_ldpc_enc_op fail, ret: > %d", > + ret); > + return ret; > + } > + break; > + > + case RTE_BBDEV_OP_LDPC_DEC: > + ldpc_dec = &(((struct rte_bbdev_dec_op *)bbdev_op)- > >ldpc_dec); > + in_op_data = &ldpc_dec->input; > + > + out_op_data = &ldpc_dec->hard_output; > + > + ret = prepare_ldpc_dec_op(bbdev_op, bbdev_ipc_op, > + q_priv, out_op_data); > + if (ret) { > + rte_bbdev_log(ERR, "process_ldpc_dec_op fail, ret: > %d", > + ret); > + return ret; > + } > + break; > + > + default: > + rte_bbdev_log(ERR, "unsupported bbdev_ipc op type"); > + return -1; > + } > + > + if (in_op_data->data) { > + data_ptr = rte_pktmbuf_mtod(in_op_data->data, char *); > + l1_pcie_addr = (uint32_t)GUL_USER_HUGE_PAGE_ADDR + > + data_ptr - huge_start_addr; > + bbdev_ipc_op->in_addr = l1_pcie_addr; > + bbdev_ipc_op->in_len = in_op_data->length; > + } > + > + if (out_op_data->data) { > + data_ptr = rte_pktmbuf_mtod(out_op_data->data, char *); > + l1_pcie_addr = (uint32_t)GUL_USER_HUGE_PAGE_ADDR + > + data_ptr - huge_start_addr; > + bbdev_ipc_op->out_addr = > rte_cpu_to_be_32(l1_pcie_addr); > + bbdev_ipc_op->out_len = rte_cpu_to_be_32(out_op_data- > >length); > + } > + > + /* Move Producer Index forward */ > + pi++; > + /* Flip the PI flag, if wrapping */ > + if (unlikely(q_priv->queue_size == pi)) { > + pi = 0; > + pi_flag = pi_flag ? 0 : 1; > + } > + > + if (pi_flag) > + IPC_SET_PI_FLAG(pi); > + else > + IPC_RESET_PI_FLAG(pi); > + q_priv->host_pi = pi; > + > + /* Wait for Data Copy & pi_flag update to complete before updating > pi */ > + rte_mb(); > + /* now update pi */ > + md->pi = rte_cpu_to_be_32(pi); > + > + rte_bbdev_dp_log(DEBUG, "enter: pi: %u, ci: %u," > + "pi_flag: %u, ci_flag: %u, ring size: %u", > + pi, ci, pi_flag, ci_flag, q_priv->queue_size); > + > + return 0; > +} > + > +/* Enqueue decode burst */ > +static uint16_t > +enqueue_dec_ops(struct rte_bbdev_queue_data *q_data, > + struct rte_bbdev_dec_op **ops, uint16_t nb_ops) { > + struct bbdev_la12xx_q_priv *q_priv = q_data->queue_private; > + int nb_enqueued, ret; > + > + for (nb_enqueued = 0; nb_enqueued < nb_ops; nb_enqueued++) { > + ret = enqueue_single_op(q_priv, ops[nb_enqueued]); > + if (ret) > + break; > + } > + > + q_data->queue_stats.enqueue_err_count += nb_ops - > nb_enqueued; > + q_data->queue_stats.enqueued_count += nb_enqueued; > + > + return nb_enqueued; > +} > + > +/* Enqueue encode burst */ > +static uint16_t > +enqueue_enc_ops(struct rte_bbdev_queue_data *q_data, > + struct rte_bbdev_enc_op **ops, uint16_t nb_ops) { > + struct bbdev_la12xx_q_priv *q_priv = q_data->queue_private; > + int nb_enqueued, ret; > + > + for (nb_enqueued = 0; nb_enqueued < nb_ops; nb_enqueued++) { > + ret = enqueue_single_op(q_priv, ops[nb_enqueued]); > + if (ret) > + break; > + } > + > + q_data->queue_stats.enqueue_err_count += nb_ops - > nb_enqueued; > + q_data->queue_stats.enqueued_count += nb_enqueued; > + > + return nb_enqueued; > +} > + > +/* Dequeue encode burst */ > +static void * > +dequeue_single_op(struct bbdev_la12xx_q_priv *q_priv, void *dst) { > + void *op; > + uint32_t ci, ci_flag; > + uint32_t temp_ci; > + > + temp_ci = q_priv->host_params->ci; > + if (temp_ci == q_priv->host_ci) > + return NULL; > + > + ci = IPC_GET_CI_INDEX(q_priv->host_ci); > + ci_flag = IPC_GET_CI_FLAG(q_priv->host_ci); > + > + rte_bbdev_dp_log(DEBUG, > + "ci: %u, ci_flag: %u, ring size: %u", > + ci, ci_flag, q_priv->queue_size); > + > + op = q_priv->bbdev_op[ci]; > + > + rte_memcpy(dst, q_priv->msg_ch_vaddr[ci], > + sizeof(struct bbdev_ipc_enqueue_op)); > + > + /* Move Consumer Index forward */ > + ci++; > + /* Flip the CI flag, if wrapping */ > + if (q_priv->queue_size == ci) { > + ci = 0; > + ci_flag = ci_flag ? 0 : 1; > + } > + if (ci_flag) > + IPC_SET_CI_FLAG(ci); > + else > + IPC_RESET_CI_FLAG(ci); > + > + q_priv->host_ci = ci; > + > + rte_bbdev_dp_log(DEBUG, > + "exit: ci: %u, ci_flag: %u, ring size: %u", > + ci, ci_flag, q_priv->queue_size); > + > + return op; > +} > + > +/* Dequeue decode burst */ > +static uint16_t > +dequeue_dec_ops(struct rte_bbdev_queue_data *q_data, > + struct rte_bbdev_dec_op **ops, uint16_t nb_ops) { > + struct bbdev_la12xx_q_priv *q_priv = q_data->queue_private; > + struct bbdev_ipc_enqueue_op bbdev_ipc_op; > + int nb_dequeued; > + > + for (nb_dequeued = 0; nb_dequeued < nb_ops; nb_dequeued++) { > + ops[nb_dequeued] = dequeue_single_op(q_priv, > &bbdev_ipc_op); > + if (!ops[nb_dequeued]) > + break; > + ops[nb_dequeued]->status = bbdev_ipc_op.status; > + } > + q_data->queue_stats.dequeued_count += nb_dequeued; > + > + return nb_dequeued; > +} > + > +/* Dequeue encode burst */ > +static uint16_t > +dequeue_enc_ops(struct rte_bbdev_queue_data *q_data, > + struct rte_bbdev_enc_op **ops, uint16_t nb_ops) { > + struct bbdev_la12xx_q_priv *q_priv = q_data->queue_private; > + struct bbdev_ipc_enqueue_op bbdev_ipc_op; > + int nb_enqueued; > + > + for (nb_enqueued = 0; nb_enqueued < nb_ops; nb_enqueued++) { > + ops[nb_enqueued] = dequeue_single_op(q_priv, > &bbdev_ipc_op); > + if (!ops[nb_enqueued]) > + break; > + ops[nb_enqueued]->status = bbdev_ipc_op.status; > + } > + q_data->queue_stats.enqueued_count += nb_enqueued; > + > + return nb_enqueued; > +} > + > static struct hugepage_info * > get_hugepage_info(void) > { > @@ -710,10 +1026,14 @@ la12xx_bbdev_create(struct rte_vdev_device > *vdev, > bbdev->intr_handle = NULL; > > /* register rx/tx burst functions for data path */ > - bbdev->dequeue_enc_ops = NULL; > - bbdev->dequeue_dec_ops = NULL; > - bbdev->enqueue_enc_ops = NULL; > - bbdev->enqueue_dec_ops = NULL; > + bbdev->dequeue_enc_ops = dequeue_enc_ops; > + bbdev->dequeue_dec_ops = dequeue_dec_ops; > + bbdev->enqueue_enc_ops = enqueue_enc_ops; > + bbdev->enqueue_dec_ops = enqueue_dec_ops; These functions are for 4G which are not supported here. These can be kept as NULL. The ones used for LDPC are below. > + bbdev->dequeue_ldpc_enc_ops = dequeue_enc_ops; > + bbdev->dequeue_ldpc_dec_ops = dequeue_dec_ops; > + bbdev->enqueue_ldpc_enc_ops = enqueue_enc_ops; > + bbdev->enqueue_ldpc_dec_ops = enqueue_dec_ops; > > return 0; > } > diff --git a/drivers/baseband/la12xx/bbdev_la12xx_ipc.h > b/drivers/baseband/la12xx/bbdev_la12xx_ipc.h > index 5f613fb087..b6a7f677d0 100644 > --- a/drivers/baseband/la12xx/bbdev_la12xx_ipc.h > +++ b/drivers/baseband/la12xx/bbdev_la12xx_ipc.h > @@ -73,6 +73,25 @@ typedef struct { > _IOWR(GUL_IPC_MAGIC, 5, struct ipc_msg *) #define > IOCTL_GUL_IPC_CHANNEL_RAISE_INTERRUPT _IOW(GUL_IPC_MAGIC, 6, int > *) > > +#define GUL_USER_HUGE_PAGE_OFFSET (0) > +#define GUL_PCI1_ADDR_BASE (0x00000000ULL) > + > +#define GUL_USER_HUGE_PAGE_ADDR (GUL_PCI1_ADDR_BASE + > GUL_USER_HUGE_PAGE_OFFSET) > + > +/* IPC PI/CI index & flag manipulation helpers */ > +#define IPC_PI_CI_FLAG_MASK 0x80000000 /* (1<<31) */ > +#define IPC_PI_CI_INDEX_MASK 0x7FFFFFFF /* ~(1<<31) */ > + > +#define IPC_SET_PI_FLAG(x) (x |= IPC_PI_CI_FLAG_MASK) > +#define IPC_RESET_PI_FLAG(x) (x &= IPC_PI_CI_INDEX_MASK) > +#define IPC_GET_PI_FLAG(x) (x >> 31) > +#define IPC_GET_PI_INDEX(x) (x & IPC_PI_CI_INDEX_MASK) > + > +#define IPC_SET_CI_FLAG(x) (x |= IPC_PI_CI_FLAG_MASK) > +#define IPC_RESET_CI_FLAG(x) (x &= IPC_PI_CI_INDEX_MASK) > +#define IPC_GET_CI_FLAG(x) (x >> 31) > +#define IPC_GET_CI_INDEX(x) (x & IPC_PI_CI_INDEX_MASK) > + > /** buffer ring common metadata */ > typedef struct ipc_bd_ring_md { > volatile uint32_t pi; /**< Producer index and flag (MSB) > @@ -180,6 +199,24 @@ struct bbdev_ipc_enqueue_op { > uint32_t rsvd; > }; > > +/** Structure specifying dequeue operation (dequeue at LA1224) */ > +struct bbdev_ipc_dequeue_op { > + /** Input buffer memory address */ > + uint32_t in_addr; > + /** Input buffer memory length */ > + uint32_t in_len; > + /** Output buffer memory address */ > + uint32_t out_addr; > + /** Output buffer memory length */ > + uint32_t out_len; > + /* Number of code blocks. Only set when HARQ is used */ > + uint32_t num_code_blocks; > + /** Dequeue Operation flags */ > + uint32_t op_flags; > + /** Shared metadata between L1 and L2 */ > + uint32_t shared_metadata; > +}; > + > /* This shared memory would be on the host side which have copy of some > * of the parameters which are also part of Shared BD ring. Read access > * of these parameters from the host side would not be over PCI. > -- > 2.17.1
Hi Nipin, Based on patch 8/9 you should not need new vectors with different endianness. Existing vectors should already be supported (ie all vectors must have the same LE endianness assumption) and the bbdev-test will call reverse_all_ops to change the endianness from the vectors when the endianness == BE. This is the same concept mentioned a few times, let me know if unclear Thanks Nic > -----Original Message----- > From: nipun.gupta@nxp.com <nipun.gupta@nxp.com> > Sent: Tuesday, September 28, 2021 1:30 AM > To: dev@dpdk.org; gakhil@marvell.com; Chautru, Nicolas > <nicolas.chautru@intel.com> > Cc: david.marchand@redhat.com; hemant.agrawal@nxp.com; Nipun Gupta > <nipun.gupta@nxp.com> > Subject: [PATCH v7 9/9] app/bbdev: add test vectors for transport blocks > > From: Nipun Gupta <nipun.gupta@nxp.com> > > This patch adds two test vectors for transport block in network byte > order: > - LDPC encode for Transport Block > - LDPC decode for Transport block > > Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> > --- > app/test-bbdev/test_vectors/ldpc_dec_tb.data | 265 > +++++++++++++++++++ app/test-bbdev/test_vectors/ldpc_enc_tb.data | 95 > +++++++ > 2 files changed, 360 insertions(+) > create mode 100644 app/test-bbdev/test_vectors/ldpc_dec_tb.data > create mode 100644 app/test-bbdev/test_vectors/ldpc_enc_tb.data > > diff --git a/app/test-bbdev/test_vectors/ldpc_dec_tb.data b/app/test- > bbdev/test_vectors/ldpc_dec_tb.data > new file mode 100644 > index 0000000000..5882e8aafe > --- /dev/null > +++ b/app/test-bbdev/test_vectors/ldpc_dec_tb.data > @@ -0,0 +1,265 @@ > +# SPDX-License-Identifier: BSD-3-Clause # Copyright 2021 NXP > + > +op_type = > +RTE_BBDEV_OP_LDPC_DEC > + > +input0 = > +0x7f818181, 0x7f7f817f, 0x7f817f81, 0x817f8181, 0x817f7f81, 0x817f7f81, > +0x7f817f7f, 0x7f7f7f81, 0x7f7f7f7f, 0x817f7f7f, 0x7f7f8181, 0x817f7f7f, > +0x7f7f817f, 0x8181817f, 0x817f7f81, 0x7f7f8181, 0x81817f81, 0x7f7f7f81, > +0x81817f7f, 0x7f81817f, 0x817f7f81, 0x7f817f81, 0x8181817f, 0x7f7f7f81, > +0x7f7f817f, 0x81817f7f, 0x7f81817f, 0x7f7f817f, 0x817f817f, 0x7f7f817f, > +0x7f7f7f81, 0x7f7f7f81, 0x7f817f7f, 0x7f818181, 0x7f818181, 0x8181817f, > +0x7f7f8181, 0x7f7f7f7f, 0x7f817f7f, 0x81818181, 0x7f7f817f, 0x7f7f7f7f, > +0x817f8181, 0x7f7f7f81, 0x817f817f, 0x817f8181, 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0x7f7f7f7f, 0x817f7f7f, > +0x81817f7f, 0x7f7f8181, 0x817f8181, 0x7f81817f, 0x7f7f8181, 0x81817f7f, > +0x8181817f, 0x81818181, 0x81817f7f, 0x7f817f7f, 0x817f8181, 0x817f7f81, > +0x7f818181, 0x7f7f817f, 0x817f7f81, 0x7f7f817f, 0x817f7f7f, 0x7f81817f, > +0x7f7f7f7f, 0x7f817f81, 0x7f817f7f, 0x817f817f, 0x7f818181, 0x7f818181, > +0x81817f7f, 0x81817f7f, 0x7f817f81, 0x81817f7f, 0x8181817f, 0x7f7f8181, > +0x817f7f7f, 0x7f81817f, 0x81817f81, 0x817f7f81, 0x8181817f, 0x81817f7f, > +0x7f7f7f81, 0x7f817f7f, 0x817f7f81, 0x7f817f7f, 0x7f817f7f, 0x81818181, > +0x7f7f8181, 0x7f7f8181, 0x7f7f7f7f, 0x7f818181, 0x7f7f7f7f, 0x7f7f7f7f, > +0x7f817f81, 0x7f7f7f7f, 0x7f7f817f, 0x7f81817f, 0x7f7f8181, 0x817f7f81, > +0x7f817f7f, 0x7f7f817f, 0x81818181, 0x7f81817f, 0x7f7f7f7f, 0x7f817f7f, > +0x7f81817f, 0x7f817f81, 0x81818181, 0x7f7f7f81, 0x7f81817f, 0x7f7f8181, > +0x7f7f817f, 0x7f7f8181, 0x7f81817f, 0x81817f7f, 0x7f7f817f, 0x7f81817f, > +0x817f817f, 0x817f817f, 0x7f7f8181, 0x817f7f81, 0x7f7f8181, 0x7f817f7f, > +0x7f7f8181, 0x817f817f, 0x817f7f7f, 0x81817f81, 0x8181817f, 0x817f8181, > +0x8181817f, 0x817f817f, 0x7f818181, 0x817f817f, 0x7f7f7f81, 0x7f818181, > +0x7f7f7f7f, 0x7f7f817f, 0x817f8181, 0x7f817f81, 0x7f818181, 0x81818181, > +0x7f81817f, 0x817f7f7f, 0x7f7f8181, 0x81817f81, 0x81817f7f, 0x817f817f, > +0x7f7f817f, 0x817f7f7f, 0x81818181, 0x817f817f, 0x8181817f, 0x7f7f7f7f, > +0x81818181, 0x7f81817f, 0x7f7f817f, 0x8181817f, 0x7f817f81, 0x7f7f817f, > +0x81817f81, 0x817f817f, 0x7f7f7f7f, 0x7f817f7f, 0x81817f81, 0x7f7f7f81, > +0x7f818181, 0x7f7f8181, 0x7f817f81, 0x7f7f8181, 0x81817f7f, 0x7f817f7f, > +0x817f7f7f, 0x81817f7f, 0x81818181, 0x7f817f7f, 0x81817f7f, 0x817f7f81, > +0x8181817f, 0x7f818181, 0x7f7f817f, 0x7f817f81, 0x7f817f7f, 0x7f7f7f81, > +0x7f7f8181, 0x817f8181, 0x81817f7f, 0x7f7f7f81, 0x817f7f7f, 0x7f7f8181, > +0x7f818181, 0x8181817f, 0x7f7f8181, 0x81817f81, 0x81818181, 0x7f7f8181, > +0x817f8181, 0x81817f7f, 0x7f7f7f81, 0x817f7f81, 0x7f7f817f, 0x7f818181, > +0x7f817f81, 0x7f7f8181, 0x7f817f7f, 0x7f7f817f, 0x7f818181, 0x7f81817f, > +0x81817f7f, 0x7f7f7f81, 0x81818181, 0x817f7f7f, 0x817f7f7f, 0x7f817f81, > +0x81818181, 0x8181817f, 0x817f817f, 0x7f818181, 0x7f7f817f, 0x7f818181, > +0x817f8181, 0x8181817f, 0x7f7f7f81, 0x7f7f8181, 0x7f818181, 0x817f7f81, > +0x7f818181, 0x8181817f, 0x7f7f7f7f, 0x7f7f817f, 0x81817f81, 0x7f81817f, > +0x7f81817f, 0x817f7f7f, 0x817f7f7f, 0x817f7f81, 0x817f7f81, 0x7f817f7f, > +0x7f817f7f, 0x7f818181, 0x81817f81, 0x8181817f, 0x7f7f8181, 0x817f7f7f, > +0x8181817f, 0x81817f81, 0x817f817f, 0x81818181, 0x7f7f817f, 0x7f7f8181, > +0x7f81817f, 0x817f8181, 0x7f7f817f, 0x817f7f7f, 0x81817f7f, 0x817f8181, > +0x7f7f8181, 0x7f7f8181, 0x8181817f, 0x81817f81, 0x7f7f7f81, 0x7f818181, > +0x7f81817f, 0x8181817f, 0x7f7f7f81, 0x7f817f81, 0x7f818181, 0x817f7f81, > +0x7f81817f, 0x817f8181, 0x7f7f8181, 0x7f817f7f, 0x7f7f7f7f, 0x81818181, > +0x81818181, 0x7f7f7f7f, 0x817f817f, 0x7f7f8181, 0x7f81817f, 0x8181817f, > +0x817f7f7f, 0x7f817f81, 0x7f817f7f, 0x7f818181, 0x7f817f81, 0x8181817f, > +0x7f817f7f, 0x817f7f81, 0x7f817f7f, 0x7f817f81, 0x81817f7f, 0x817f817f, > +0x817f817f, 0x81817f81, 0x7f7f8181, 0x8181817f, 0x7f7f817f, 0x7f7f7f7f, > +0x81817f81, 0x817f8181, 0x7f817f81, 0x7f818181, 0x817f7f81, 0x7f7f817f, > +0x81817f7f, 0x7f7f7f7f, 0x7f81817f, 0x7f7f7f81, 0x817f8181, 0x8181817f, > +0x7f817f7f, 0x817f817f, 0x7f817f7f, 0x7f817f81, 0x817f8181, 0x817f7f7f, > +0x7f81817f, 0x817f8181, 0x81817f7f, 0x8181817f, 0x817f7f81, 0x7f817f7f, > +0x7f81817f, 0x7f818181, 0x817f7f81, 0x817f7f81, 0x81817f81, 0x81817f81, > +0x81817f7f, 0x7f81817f, 0x81817f7f, 0x7f817f81, 0x817f7f7f, 0x81818181, > +0x7f7f817f, 0x81817f7f, 0x817f817f, 0x7f817f7f, 0x817f8181, 0x81818181, > +0x817f8181, 0x817f7f81, 0x7f7f7f7f, 0x7f817f81, 0x817f7f81, 0x7f817f7f, > +0x817f7f81, 0x7f7f7f81, 0x7f817f81, 0x7f7f8181, 0x7f7f7f81, 0x7f817f7f, > +0x817f7f7f, 0x817f7f7f, 0x81817f7f, 0x817f7f81, 0x7f818181, 0x7f817f7f, > +0x7f817f7f, 0x8181817f, 0x81817f7f, 0x7f817f81, 0x81818181, 0x81817f81, > +0x81818181, 0x7f817f7f, 0x7f817f81, 0x81818181, 0x8181817f, 0x81817f7f, > +0x817f7f7f, 0x7f818181, 0x7f7f8181, 0x7f818181, 0x8181817f, 0x7f817f81, > +0x7f7f7f81, 0x8181817f, 0x817f7f7f, 0x7f7f817f, 0x7f817f7f, 0x7f817f7f, > +0x7f817f7f, 0x7f817f81, 0x817f7f81, 0x817f7f7f, 0x817f817f, 0x817f817f, > +0x817f7f7f, 0x817f8181, 0x7f7f7f7f, 0x7f817f81, 0x817f817f, 0x7f817f7f, > +0x7f817f81, 0x81817f81, 0x7f7f7f7f, 0x817f7f81, 0x7f818181, 0x7f81817f, > +0x817f7f7f, 0x81818181, 0x817f8181, 0x81817f7f, 0x7f7f8181, 0x7f7f8181, > +0x7f817f81, 0x81817f81, 0x817f7f81, 0x81818181, 0x8181817f, 0x7f7f8181, > +0x81818181, 0x817f7f81, 0x7f817f81, 0x817f7f7f, 0x81818181, 0x7f81817f, > +0x7f7f8181, 0x817f7f81, 0x8181817f, 0x7f818181, 0x817f8181, 0x7f7f7f7f, > +0x8181817f, 0x817f817f, 0x817f8181, 0x81817f81, 0x817f817f, 0x7f817f81, > +0x7f7f8181, 0x817f7f81, 0x81818181, 0x7f817f81, 0x817f8181, 0x7f7f7f7f, > +0x8181817f, 0x7f7f8181, 0x817f817f, 0x81817f7f, 0x7f817f81, 0x7f817f7f, > +0x7f818181, 0x7f7f7f7f, 0x7f7f817f, 0x7f81817f, 0x817f7f81, 0x817f817f, > +0x7f7f8181, 0x7f7f7f81, 0x817f8181, 0x81818181, 0x8181817f, 0x7f7f8181, > +0x7f817f7f, 0x7f7f7f81, 0x7f7f7f81, 0x7f7f7f7f, 0x81818181, 0x7f7f8181, > +0x817f7f81, 0x81817f7f, 0x7f7f7f7f, 0x817f7f81, 0x7f817f81, 0x81818181, > +0x7f817f81, 0x7f7f7f7f, 0x8181817f, 0x7f7f7f81, 0x7f817f7f, 0x817f8181, > +0x7f7f8181, 0x817f8181, 0x7f7f817f, 0x817f8181, 0x817f7f81, 0x81818181, > +0x7f7f8181, 0x81818181, 0x7f7f817f, 0x817f817f, 0x7f7f8181, 0x81818181, > +0x7f7f7f7f, 0x7f81817f, 0x8181817f, 0x817f817f, 0x817f8181, 0x7f818181, > +0x81818181, 0x817f817f, 0x7f817f81, 0x7f817f81, 0x81817f7f, 0x8181817f, > +0x817f817f, 0x817f7f7f, 0x81817f81, 0x81817f7f, 0x7f7f817f, 0x7f7f8181, > +0x8181817f, 0x81818181, 0x81817f7f, 0x7f818181, 0x7f7f7f7f, 0x817f7f81, > +0x817f7f81, 0x7f7f7f7f, 0x7f7f7f7f, 0x81817f7f, 0x817f7f7f, 0x7f817f7f, > +0x7f7f7f7f, 0x817f8181, 0x81817f81, 0x7f7f7f7f, 0x817f8181, 0x7f7f817f, > +0x81818181, 0x7f7f7f7f, 0x7f817f81, 0x7f7f7f7f, 0x81817f81, 0x81818181, > +0x8181817f, 0x817f8181, 0x7f817f81, 0x8181817f, 0x7f7f7f81, 0x817f7f7f, > +0x7f818181, 0x7f818181, 0x7f7f7f81, 0x7f817f81, 0x8181817f, 0x7f818181 > + > +output0 = > +0xd0dd44b2, 0xe91d434b, 0x17b23d65, 0xb8abd7c1, 0x12d7d41c, > 0xce2686c2, > +0x402c1efa, 0xc9151fcc, 0xe00effad, 0xc964d36a, 0xe70e39e3, 0xd86577a2, > +0x77e04ae3, 0x9dfd60b9, 0xbf43376f, 0x09841e69, 0x53a02679, > 0x898c65d0, > +0x17434cf8, 0x9a3abfe2, 0x05e767ac, 0x902d6156, 0x716046a1, > 0x636fc345, > +0xf15b483e, 0x910e40e4, 0x5d32b9a2, 0x8e9514b0, 0x7a218bb8, > 0x7665aac3, > +0x33a5b20c, 0x8ba7b5e3, 0x220262e0, 0x7b654c15, 0xa69f1855, > 0x6dcf61e3, > +0x0036c1aa, 0x7ea806e3, 0x3f9b2ef1, 0x386cdd36, 0xf94ae7e4, > 0xf707e376, > +0xb9c90f7b, 0x40bdd41f, 0x03cf6ae8, 0xfbd5b550, 0x03d90ae6, > 0x65a6cf09, > +0xa3d70588, 0x26343d97, 0x464981b1, 0xd79f8b30, 0xa554bb7e, > 0x524d3a2c, > +0x2f75d78c, 0x3148c8d8, 0xd4cccf4d, 0xc98df39c, 0x7f4fdb2a, 0x831c5ccd, > +0xbe46bd67, 0xa9bf0a6b, 0xa726bdcc, 0xd590425d, 0xa792805b, > 0xe4b0518a, > +0x18c4bcca, 0xf3891686, 0x3cdee43e, 0xd526e3a9, 0x8112aec6, > 0x811151f4, > +0x9763de36, 0x56e50307, 0xa7313051, 0xc40db40a, 0x1931fa6e, > 0x5701947d, > +0x098ee810, 0x01cec402, 0x804668f1, 0xc00c41da, 0x02432f4d, > 0x072c9643, > +0xf23088cc, 0x74620646, 0x281f8a80, 0x2c7a2aa6, 0xfe8c2f88, 0xe0100f94, > +0x9c402559, 0x48f5c34d, 0x59a3b023, 0x2427f7e0, 0xb2f30717, > 0x9bf140a6, > +0x3fa4710b, 0xb493a4a2, 0xb16e6135, 0xd75f0e8e, 0xe7ff6b4a, > 0x43d9e122, > +0xafc5d306, 0xec88d05e, 0xabfc996a, 0x29644a44, 0xa0c5c9fa, 0xf5836a0b, > +0xd2a97513, 0x6986e115, 0x5581b429, 0xd6f8e599, 0x035a2d9a, > 0xe0835100, > +0x561d04c5, 0x565f647a, 0xff711c76, 0x6b6fcd71, 0xb08518ac, > 0xad407897, > +0x6de25115, 0x8e8fd5f1, 0x67196a81, 0xb6ef576b, 0x5e170674, > 0x3cd78132, > +0x0be74b19, 0x84f30e7b, 0x85aa98b6, 0xcfe08810, 0xaa438ec3, > 0xe95c3900, > +0xafb0c225, 0xbe52bde2, 0xd6dcfec6, 0xccde045b, 0x4fd00da2, > 0x30c377b7, > +0x771fdf0b, 0xea5f9282, 0x838dc0bf, 0x3250d0a9, 0xf2190c4d, > 0x5ec14787, > +0x32c2d755, 0xe3b9f56c, 0xfb34945e, 0x642dc6c3, 0x8fb96e69, > 0x612afce6, > +0x17eb0530, 0x2fa9637c, 0xef1068a6, 0x456c8bcd, 0x65b16eb9, > 0xf97d8e92, > +0x7b1a46 > + > +basegraph= > +2 > + > +z_c= > +256 > + > +n_cb= > +12800 > + > +q_m= > +2 > + > +n_filler= > +16 > + > +ea = > +3000 > + > +eb = > +3000 > + > +iter_max= > +8 > + > +expected_iter_count= > +2 > + > +c = > +2 > + > +r = > +0 > + > +cab = > +0 > + > +rv_index = > +0 > + > +code_block_mode = > +0 > + > +op_flags = > +RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP > + > +expected_status = > +OK > diff --git a/app/test-bbdev/test_vectors/ldpc_enc_tb.data b/app/test- > bbdev/test_vectors/ldpc_enc_tb.data > new file mode 100644 > index 0000000000..0161c06f0d > --- /dev/null > +++ b/app/test-bbdev/test_vectors/ldpc_enc_tb.data > @@ -0,0 +1,95 @@ > +# SPDX-License-Identifier: BSD-3-Clause # Copyright 2021 NXP > + > +op_type = > +RTE_BBDEV_OP_LDPC_ENC > + > +input0 = > +0xd0dd44b2, 0xe91d434b, 0x17b23d65, 0xb8abd7c1, 0x12d7d41c, > 0xce2686c2, > +0x402c1efa, 0xc9151fcc, 0xe00effad, 0xc964d36a, 0xe70e39e3, 0xd86577a2, > +0x77e04ae3, 0x9dfd60b9, 0xbf43376f, 0x09841e69, 0x53a02679, > 0x898c65d0, > +0x17434cf8, 0x9a3abfe2, 0x05e767ac, 0x902d6156, 0x716046a1, > 0x636fc345, > +0xf15b483e, 0x910e40e4, 0x5d32b9a2, 0x8e9514b0, 0x7a218bb8, > 0x7665aac3, > +0x33a5b20c, 0x8ba7b5e3, 0x220262e0, 0x7b654c15, 0xa69f1855, > 0x6dcf61e3, > +0x0036c1aa, 0x7ea806e3, 0x3f9b2ef1, 0x386cdd36, 0xf94ae7e4, > 0xf707e376, > +0xb9c90f7b, 0x40bdd41f, 0x03cf6ae8, 0xfbd5b550, 0x03d90ae6, > 0x65a6cf09, > +0xa3d70588, 0x26343d97, 0x464981b1, 0xd79f8b30, 0xa554bb7e, > 0x524d3a2c, > +0x2f75d78c, 0x3148c8d8, 0xd4cccf4d, 0xc98df39c, 0x7f4fdb2a, 0x831c5ccd, > +0xbe46bd67, 0xa9bf0a6b, 0xa726bdcc, 0xd590425d, 0xa792805b, > 0xe4b0518a, > +0x18c4bcca, 0xf3891686, 0x3cdee43e, 0xd526e3a9, 0x8112aec6, > 0x811151f4, > +0x9763de36, 0x56e50307, 0xa7313051, 0xc40db40a, 0x1931fa6e, > 0x5701947d, > +0x098ee810, 0x01cec402, 0x804668f1, 0xc00c41da, 0x02432f4d, > 0x072c9643, > +0xf23088cc, 0x74620646, 0x281f8a80, 0x2c7a2aa6, 0xfe8c2f88, 0xe0100f94, > +0x9c402559, 0x48f5c34d, 0x59a3b023, 0x2427f7e0, 0xb2f30717, > 0x9bf140a6, > +0x3fa4710b, 0xb493a4a2, 0xb16e6135, 0xd75f0e8e, 0xe7ff6b4a, > 0x43d9e122, > +0xafc5d306, 0xec88d05e, 0xabfc996a, 0x29644a44, 0xa0c5c9fa, 0xf5836a0b, > +0xd2a97513, 0x6986e115, 0x5581b429, 0xd6f8e599, 0x035a2d9a, > 0xe0835100, > +0x561d04c5, 0x565f647a, 0xff711c76, 0x6b6fcd71, 0xb08518ac, > 0xad407897, > +0x6de25115, 0x8e8fd5f1, 0x67196a81, 0xb6ef576b, 0x5e170674, > 0x3cd78132, > +0x0be74b19, 0x84f30e7b, 0x85aa98b6, 0xcfe08810, 0xaa438ec3, > 0xe95c3900, > +0xafb0c225, 0xbe52bde2, 0xd6dcfec6, 0xccde045b, 0x4fd00da2, > 0x30c377b7, > +0x771fdf0b, 0xea5f9282, 0x838dc0bf, 0x3250d0a9, 0xf2190c4d, > 0x5ec14787, > +0x32c2d755, 0xe3b9f56c, 0xfb34945e, 0x642dc6c3, 0x8fb96e69, > 0x612afce6, > +0x17eb0530, 0x2fa9637c, 0xef1068a6, 0x456c8bcd, 0x65b16eb9, > 0xf97d8e92, > +0x7b1a46 > + > +output0 = > +0x4eda9982, 0x101c74c9, 0x8b63a987, 0x34464588, 0xe27e0cf2, > 0x048dd503, > +0x6391521b, 0x59f71f1a, 0x22eeb556, 0x96d43907, 0x69a01acf, > 0x3e6a4cb4, > +0x7eca9c20, 0x2c3eb162, 0x965294d5, 0x25722e4e, 0x7d42c4d1, > 0x8489d0bf, > +0x49c2a83d, 0xa48a3fa4, 0x6ccd783a, 0xd941b110, 0xa937e9e4, > 0xc0a45188, > +0xd41b1840, 0x8bf35901, 0x769496e4, 0x91bb2778, 0x7ad8b944, > 0xd19208ad, > +0x8b519356, 0x7b6e1772, 0x30982890, 0x1e183f8a, 0xde7b9c46, > 0x2ca7c2ce, > +0xb9b6e1d7, 0x68a3c466, 0x1ecda75d, 0xb462b570, 0x2a2a5896, > 0xaf6891b1, > +0xd4bf3ba3, 0x82969dfa, 0xd0f563fb, 0xb81ff540, 0x7a0b3485, 0x4f6fd016, > +0x7741a613, 0x3f763d0e, 0x7f76a0dc, 0x37f25c1c, 0xf3412fe1, 0x2a75dc51, > +0x04827bef, 0xe5a662fd, 0xa07225f5, 0xbc9117a9, 0x55dbc54c, > 0xd9446c00, > +0xa8d26de1, 0xa293979e, 0x1ece1b94, 0xa5dd28cb, 0x13d2655e, > 0xa0e4ab01, > +0x903c5a2c, 0x58674b7e, 0x0e1c244b, 0xa9e0d342, 0x45fc615f, > 0x2971f02a, > +0x116c4e06, 0xf1d97697, 0x64b0a44f, 0xf21b9207, 0x32ddde4e, > 0x4df48b05, > +0xf0e80c2b, 0x27a14701, 0x670407a7, 0x0ffd24cd, 0x07432145, 0xfff8c98f, > +0x567dacd5, 0xef793abb, 0x29f2c205, 0x6605a7cd, 0xf1978e96, > 0x73ef3ef6, > +0x336173ff, 0xaab9b459, 0xb3f4b89c, 0xf1e50d40, 0x76c3fb75, > 0xc086001b, > +0x1cdadd3b, 0x0ed448a8, 0x53f9a461, 0x5a318eb9, 0x98d96ab4, > 0xb796ead8, > +0x6c4ffee6, 0xf5089709, 0x9d3f7c5d, 0x759e5b2c, 0x1ba452ef, > 0xe397683a, > +0x38937d85, 0x6467fa0a, 0x3e3d85a9, 0x2be700cc, 0xb51171ff, > 0x27c369b4, > +0xb91a6bbe, 0x84043906, 0x2639088d, 0x6c0f43f7, 0x1bdf6c89, > 0xf294392a, > +0xf3c7ba93, 0xe9de466a, 0xd234e9a3, 0x94374868, 0xe644c601, > 0xe8d30610, > +0xc36d3cf7, 0x239d4e49, 0x61a052ee, 0x333ac761, 0x9b372829, > 0xf2cce000, > +0x0a649c42, 0x6f20a68f, 0xc6c43664, 0x559c2c5c, 0xb1d7575e, > 0xe840adfe, > +0x16bc5314, 0x5f076f74, 0x4a5b208b, 0xceca2331, 0x2f93e7a4, > 0x82dc83c1, > +0x7ebccf3d, 0x98e4ca42, 0x6e831fa1, 0x7fe5e47d, 0xc89e7e40, > 0x6b169129, > +0xe27b1cb7, 0xf5c4d614, 0xd3ccb7e8, 0x76a89ed6, 0x2cf00fc5, > 0x76a1e27a, > +0x92a253b5, 0x7c04dbea, 0x4903867d, 0x52a21dd6, 0x7329e699, > 0xbb63a3f1, > +0x3425fd9d, 0xa02989ca, 0x2811932e, 0x72a3bf2f, 0xfa37e1ec, > 0xa7784122, > +0xa21955d1, 0xa025ba90, 0x6ef13dcc, 0xbaf9c79f, 0x1a6f9ce7, > 0x0d57bda5, > +0x9caf0dc7, 0x352a0e64, 0x598cfdc7, 0x8208cf39, 0x90fa0a87, 0xd2dcd4f9, > +0xfc54fc60, 0x57ed5faa, 0x73153bc4, 0xf7e39009, 0x3021d00b, 0x4d0f0afb, > +0xd77a18ee, 0xa8e7 > + > +basegraph= > +2 > + > +z_c= > +256 > + > +n_cb= > +12800 > + > +q_m= > +2 > + > +n_filler= > +16 > + > +ea = > +3000 > + > +eb = > +3000 > + > +c = > +2 > + > +r = > +0 > + > +cab = > +0 > + > +rv_index = > +0 > + > +code_block_mode = > +0 > + > +op_flags = > +RTE_BBDEV_LDPC_CRC_24B_ATTACH > + > +expected_status = > +OK > -- > 2.17.1
> -----Original Message----- > From: nipun.gupta@nxp.com <nipun.gupta@nxp.com> > Sent: Tuesday, September 28, 2021 1:30 AM > To: dev@dpdk.org; gakhil@marvell.com; Chautru, Nicolas > <nicolas.chautru@intel.com> > Cc: david.marchand@redhat.com; hemant.agrawal@nxp.com; Nipun Gupta > <nipun.gupta@nxp.com> > Subject: [PATCH v7 8/9] app/bbdev: handle endianness of test data > > From: Nipun Gupta <nipun.gupta@nxp.com> > > With data input, output and harq also supported in big endian format, this > patch updates the testbbdev application to handle the endianness > conversion as directed by the the driver being used. > > If the driver supports big endian data processing, conversion from little > endian to big is handled by the testbbdev application. > > Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> > --- > app/test-bbdev/test_bbdev_perf.c | 62 > ++++++++++++++++++++++++++++++++ > 1 file changed, 62 insertions(+) > > diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test- > bbdev/test_bbdev_perf.c > index 469597b8b3..a0f565ee3f 100644 > --- a/app/test-bbdev/test_bbdev_perf.c > +++ b/app/test-bbdev/test_bbdev_perf.c > @@ -227,6 +227,64 @@ clear_soft_out_cap(uint32_t *op_flags) > *op_flags &= ~RTE_BBDEV_TURBO_NEG_LLR_1_BIT_SOFT_OUT; > } > > +static inline void > +reverse_op(struct op_data_entries *op) Please refer explicitly to byte endianness in that function name + comment > +{ > + uint8_t nb_segs = op->nb_segments; > + uint32_t *data, len; > + int complete, rem, i, j; > + uint8_t *rem_data, temp; > + > + /* Validate each mbuf segment length */ Unsure the comment is correct. The code is inverting the byte endianness for all segments of the mbuf. > + for (i = 0; i < nb_segs; ++i) { > + len = op->segments[i].length; > + data = op->segments[i].addr; > + > + /* Swap complete u32 bytes */ > + complete = len / 4; > + for (j = 0; j < complete; j++) > + data[j] = rte_bswap32(data[j]); > + > + /* Swap any remaining data for last seg */ > + if (i == (nb_segs - 1)) { > + rem = len % 4; > + rem_data = (uint8_t *)&data[j]; > + for (j = 0; j < rem/2; j++) { > + temp = rem_data[j]; > + rem_data[j] = rem_data[rem - j - 1]; > + rem_data[rem - j - 1] = temp; > + } > + } > + } > +} > + > +static inline void > +reverse_all_ops(void) Same comment as above, refer explicitly to byte endianness > +{ > + unsigned int nb_inputs, nb_soft_outputs, nb_hard_outputs, > + nb_harq_inputs, nb_harq_outputs; > + > + nb_inputs = test_vector.entries[DATA_INPUT].nb_segments; > + if (nb_inputs) > + reverse_op(&test_vector.entries[DATA_INPUT]); > + > + nb_soft_outputs = > test_vector.entries[DATA_SOFT_OUTPUT].nb_segments; > + if (nb_soft_outputs) > + reverse_op(&test_vector.entries[DATA_SOFT_OUTPUT]); > + > + nb_hard_outputs = > test_vector.entries[DATA_HARD_OUTPUT].nb_segments; > + if (nb_hard_outputs) > + reverse_op(&test_vector.entries[DATA_HARD_OUTPUT]); > + > + nb_harq_inputs = > test_vector.entries[DATA_HARQ_INPUT].nb_segments; > + if (nb_harq_inputs) > + reverse_op(&test_vector.entries[DATA_HARQ_INPUT]); > + > + nb_harq_outputs = > test_vector.entries[DATA_HARQ_OUTPUT].nb_segments; > + if (nb_harq_outputs) > + reverse_op(&test_vector.entries[DATA_HARQ_OUTPUT]); Any reason not to use a for loop through all the enums of these 5 data types Ie. enum op_data_type { DATA_INPUT = 0, DATA_SOFT_OUTPUT, DATA_HARD_OUTPUT, DATA_HARQ_INPUT, DATA_HARQ_OUTPUT, DATA_NUM_TYPES, }; > +} > + > static int > check_dev_cap(const struct rte_bbdev_info *dev_info) { @@ -234,6 +292,7 > @@ check_dev_cap(const struct rte_bbdev_info *dev_info) > unsigned int nb_inputs, nb_soft_outputs, nb_hard_outputs, > nb_harq_inputs, nb_harq_outputs; > const struct rte_bbdev_op_cap *op_cap = dev_info->drv.capabilities; > + uint8_t be_data = dev_info->drv.support_be_data; > > nb_inputs = test_vector.entries[DATA_INPUT].nb_segments; > nb_soft_outputs = > test_vector.entries[DATA_SOFT_OUTPUT].nb_segments; > @@ -245,6 +304,9 @@ check_dev_cap(const struct rte_bbdev_info > *dev_info) > if (op_cap->type != test_vector.op_type) > continue; > > + if (be_data) > + reverse_all_ops(); > + > if (op_cap->type == RTE_BBDEV_OP_TURBO_DEC) { > const struct rte_bbdev_op_cap_turbo_dec *cap = > &op_cap->cap.turbo_dec; > -- > 2.17.1
> -----Original Message----- > From: nipun.gupta@nxp.com <nipun.gupta@nxp.com> > Sent: Wednesday, October 6, 2021 4:31 AM > To: dev@dpdk.org; gakhil@marvell.com; Chautru, Nicolas > <nicolas.chautru@intel.com> > Cc: david.marchand@redhat.com; hemant.agrawal@nxp.com; Nipun Gupta > <nipun.gupta@nxp.com> > Subject: [PATCH v8 8/8] app/bbdev: handle endianness of test data > > From: Nipun Gupta <nipun.gupta@nxp.com> > > With data input, output and harq also supported in big endian format, this > patch updates the testbbdev application to handle the endianness > conversion as directed by the the driver being used. > > If the driver supports big endian data processing, conversion from little > endian to big is handled by the testbbdev application. > > Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> > --- > app/test-bbdev/test_bbdev_perf.c | 43 > ++++++++++++++++++++++++++++++++ > 1 file changed, 43 insertions(+) > > diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test- > bbdev/test_bbdev_perf.c > index 469597b8b3..597c443596 100644 > --- a/app/test-bbdev/test_bbdev_perf.c > +++ b/app/test-bbdev/test_bbdev_perf.c > @@ -227,6 +227,45 @@ clear_soft_out_cap(uint32_t *op_flags) > *op_flags &= ~RTE_BBDEV_TURBO_NEG_LLR_1_BIT_SOFT_OUT; > } > > +/* This API is to convert all the test vector op data entries > + * to big endian format. It is used when the device supports > + * the input in the big endian format. > + */ > +static inline void > +convert_op_data_to_be(void) > +{ > + struct op_data_entries *op; > + enum op_data_type type; > + uint8_t nb_segs, *rem_data, temp; > + uint32_t *data, len; > + int complete, rem, i, j; > + > + for (type = DATA_INPUT; type < DATA_NUM_TYPES; ++type) { > + nb_segs = test_vector.entries[DATA_INPUT].nb_segments; Is there a typo here? Shouldn't it be instead: nb_segs = test_vector.entries[type].nb_segments; Also as part of that same commit, please put a comment in the doc that the bbdev-test is adjusting the byte endianness based on the PMD capability and confirming that all vectors input/ouput data are assuming LE by default. ./doc/guides/tool/testbbdev.rst > + op = &test_vector.entries[type]; > + > + /* Invert byte endianness for all the segments */ > + for (i = 0; i < nb_segs; ++i) { > + len = op->segments[i].length; > + data = op->segments[i].addr; > + > + /* Swap complete u32 bytes */ > + complete = len / 4; > + for (j = 0; j < complete; j++) > + data[j] = rte_bswap32(data[j]); > + > + /* Swap any remaining bytes */ > + rem = len % 4; > + rem_data = (uint8_t *)&data[j]; > + for (j = 0; j < rem/2; j++) { > + temp = rem_data[j]; > + rem_data[j] = rem_data[rem - j - 1]; > + rem_data[rem - j - 1] = temp; > + } > + } > + } > +} > + > static int > check_dev_cap(const struct rte_bbdev_info *dev_info) { @@ -234,6 +273,7 > @@ check_dev_cap(const struct rte_bbdev_info *dev_info) > unsigned int nb_inputs, nb_soft_outputs, nb_hard_outputs, > nb_harq_inputs, nb_harq_outputs; > const struct rte_bbdev_op_cap *op_cap = dev_info- > >drv.capabilities; > + uint8_t dev_be_input = dev_info->drv.support_be_data; > > nb_inputs = test_vector.entries[DATA_INPUT].nb_segments; > nb_soft_outputs = > test_vector.entries[DATA_SOFT_OUTPUT].nb_segments; > @@ -245,6 +285,9 @@ check_dev_cap(const struct rte_bbdev_info > *dev_info) > if (op_cap->type != test_vector.op_type) > continue; > > + if (dev_be_input) > + convert_op_data_to_be(); > + > if (op_cap->type == RTE_BBDEV_OP_TURBO_DEC) { > const struct rte_bbdev_op_cap_turbo_dec *cap = > &op_cap->cap.turbo_dec; > -- > 2.17.1
Hi Nipin, As mentioned earlier the bbdev api change related to endianness would be more explicit as an enum. I have put the change here as an adjusted proposal : https://patches.dpdk.org/project/dpdk/patch/1633553929-58670-2-git-send-email-nicolas.chautru@intel.com/ I have also set default value for existing PMDs for backward compatibility and put a note in rel_notes Let me know if unclear or other opinion Thanks Nic > -----Original Message----- > From: nipun.gupta@nxp.com <nipun.gupta@nxp.com> > Sent: Wednesday, October 6, 2021 4:31 AM > To: dev@dpdk.org; gakhil@marvell.com; Chautru, Nicolas > <nicolas.chautru@intel.com> > Cc: david.marchand@redhat.com; hemant.agrawal@nxp.com; Nipun Gupta > <nipun.gupta@nxp.com> > Subject: [PATCH v8 1/8] bbdev: add big endian processing data processing > info > > From: Nipun Gupta <nipun.gupta@nxp.com> > > This patch introduces a new info pertaining to bbdev device to process the > data in big endian order. > > Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> > --- > lib/bbdev/rte_bbdev.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/lib/bbdev/rte_bbdev.h b/lib/bbdev/rte_bbdev.h index > 3ebf62e697..9b9f9d0be6 100644 > --- a/lib/bbdev/rte_bbdev.h > +++ b/lib/bbdev/rte_bbdev.h > @@ -309,6 +309,8 @@ struct rte_bbdev_driver_info { > uint16_t min_alignment; > /** HARQ memory available in kB */ > uint32_t harq_buffer_size; > + /** Device support input, output and HARQ data as big-endian */ > + bool support_be_data; > /** Default queue configuration used if none is supplied */ > struct rte_bbdev_queue_conf default_queue_conf; > /** Device operation capabilities */ > -- > 2.17.1
Hi Nipun, Few nits below. Nicolas, Any more comments on this patchset, Can you ack? > +++ b/drivers/baseband/la12xx/version.map > @@ -0,0 +1,3 @@ > +DPDK_21 { > + local: *; > +}; This should be DPDK_22 > diff --git a/drivers/baseband/meson.build b/drivers/baseband/meson.build > index 5ee61d5323..ccd1eebc3b 100644 > --- a/drivers/baseband/meson.build > +++ b/drivers/baseband/meson.build > @@ -11,6 +11,7 @@ drivers = [ > 'fpga_lte_fec', > 'null', > 'turbo_sw', > + 'la12xx', Alphabetical order? > ] > > log_prefix = 'pmd.bb' > -- > 2.17.1
> From: Hemant Agrawal <hemant.agrawal@nxp.com> > > This patch adds dev args to take max queues as input > > Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> > Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> > --- Documentation for dev args missing in this patch.
> +Prerequisites > +------------- > + > +Currently supported by DPDK: > + > +- NXP LA1224 BSP **1.0+**. > +- NXP LA1224 PCIe Modem card connected to ARM host. > + > +- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup > the basic DPDK environment. > + > +* Use dev arg option ``modem=0`` to identify the modem instance for a > given > + device. This is required only if more than 1 modem cards are attached to > host. > + this is optional and the default value is 0. > + e.g. ``--vdev=baseband_la12xx,modem=0`` > + The documentation need to be split in different patches - base doc to be added in first patch, - devargs max_nb_queues for 2/8 - devargs modem for 5/8 > +* Use dev arg option ``max_nb_queues=x`` to specify the maximum number > of queues > + to be used for communication with offload device i.e. modem. default is > 16. > + e.g. ``--vdev=baseband_la12xx,max_nb_queues=4`` > + > +Enabling logs > +------------- > + > +For enabling logs, use the following EAL parameter: > + > +.. code-block:: console > + > + ./your_bbdev_application <EAL args> --log-level=la12xx:<level> > + > +Using ``bb.la12xx`` as log matching criteria, all Baseband PMD logs can be > +enabled which are lower than logging ``level``. > diff --git a/doc/guides/rel_notes/release_21_11.rst > b/doc/guides/rel_notes/release_21_11.rst > index 135aa467f2..f4cae1b760 100644 > --- a/doc/guides/rel_notes/release_21_11.rst > +++ b/doc/guides/rel_notes/release_21_11.rst > @@ -134,6 +134,11 @@ New Features > * Added tests to validate packets hard expiry. > * Added tests to verify tunnel header verification in IPsec inbound. > > +* **Added NXP LA12xx baseband PMD.** > + > + * Added a new baseband PMD driver for NXP LA12xx Software defined > radio. > + * See the :doc:`../bbdevs/la12xx` for more details. > + > Release notes may be added in your 6/8 patch where PMD is completely supported. > +#define HUGEPG_OFFSET(A) \ > + ((uint64_t) ((unsigned long) (A) \ > + - ((uint64_t)ipc_priv->hugepg_start.host_vaddr))) > + > +static int ipc_queue_configure(uint32_t channel_id, > + ipc_t instance, struct bbdev_la12xx_q_priv *q_priv) Follow DPDK coding convention here and check for other functions also.
> From: Nipun Gupta <nipun.gupta@nxp.com> > > This series introduces the BBDEV LA12xx poll mode driver (PMD) to support > an implementation for offloading High Phy processing functions like > LDPC Encode / Decode 5GNR wireless acceleration function, using PCI based > LA12xx Software defined radio. > > Please check the documentation patch for more info. > > The driver currently implements basic feature to offload only the 5G LDPC > encode/decode. > > A new capability has been added to check if the driver can support the > input data in little/big endian byte order. > > v2: add test case changes > v3: fix 32 bit compilation > v4: capability for network byte order, doc patch merged inline. > v5: add llr_size and llr_decimals, removed LLR compression flag, > update testbbdev to handle endianness, rebased on top of 20.08 > v6: added BE as device info instead of capability, updated test > to have 2 codeblocks > v7: fixed checkpatch errors > v8: remove additional test vectors, update reverse_op function name, > make be_support param as bool, other minor changes in la12xx driver > v9: add little endianness capability as well (patch by Nicolas Chautru), > fix 32 bit (i386) compilation, fix get of nb_segs, add endianness > info in testbbdev doc. > v10: use default RTE_BIG_ENDIAN/RTE_LITTLE_ENDIAN defined, add > data_endianness info for BBDEV null device > v11: split la12xx doc in separate patches and fixed some nits > Acked-by: Akhil Goyal <gakhil@marvell.com> Release notes are updated Applied to dpdk-next-crypto I believe Nicolas is out, but he has reviewed the patches and the patches look good. If I get the Ack by Wednesday, I will update the patches before they are pulled on main.
Hi Akhil, Nipin, I do ack the serie formally. Thanks for the updates and welcome to the new bbdev pmd! Acked-by: Nicolas Chautru <nicolas.chautru@intel.com > -----Original Message----- > From: Akhil Goyal <gakhil@marvell.com> > Sent: Monday, October 18, 2021 8:23 AM > To: nipun.gupta@nxp.com; dev@dpdk.org; Chautru, Nicolas > <nicolas.chautru@intel.com> > Cc: david.marchand@redhat.com; hemant.agrawal@nxp.com > Subject: RE: [EXT] [PATCH v11 0/8] baseband: add NXP LA12xx driver > > > From: Nipun Gupta <nipun.gupta@nxp.com> > > > > This series introduces the BBDEV LA12xx poll mode driver (PMD) to > > support an implementation for offloading High Phy processing functions > > like LDPC Encode / Decode 5GNR wireless acceleration function, using > > PCI based LA12xx Software defined radio. > > > > Please check the documentation patch for more info. > > > > The driver currently implements basic feature to offload only the 5G > > LDPC encode/decode. > > > > A new capability has been added to check if the driver can support the > > input data in little/big endian byte order. > > > > v2: add test case changes > > v3: fix 32 bit compilation > > v4: capability for network byte order, doc patch merged inline. > > v5: add llr_size and llr_decimals, removed LLR compression flag, > > update testbbdev to handle endianness, rebased on top of 20.08 > > v6: added BE as device info instead of capability, updated test > > to have 2 codeblocks > > v7: fixed checkpatch errors > > v8: remove additional test vectors, update reverse_op function name, > > make be_support param as bool, other minor changes in la12xx > > driver > > v9: add little endianness capability as well (patch by Nicolas Chautru), > > fix 32 bit (i386) compilation, fix get of nb_segs, add endianness > > info in testbbdev doc. > > v10: use default RTE_BIG_ENDIAN/RTE_LITTLE_ENDIAN defined, add > > data_endianness info for BBDEV null device > > v11: split la12xx doc in separate patches and fixed some nits > > > Acked-by: Akhil Goyal <gakhil@marvell.com> Release notes are updated > Applied to dpdk-next-crypto > Acked-by: Nicolas Chautru <nicolas.chautru@intel.com > I believe Nicolas is out, but he has reviewed the patches and the patches > look good. > If I get the Ack by Wednesday, I will update the patches before they are > pulled on main.
> Hi Akhil, Nipin, > > I do ack the serie formally. Thanks for the updates and welcome to the new > bbdev pmd! > > Acked-by: Nicolas Chautru <nicolas.chautru@intel.com Thanks, updated the tree.
diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c b/drivers/baseband/la12xx/bbdev_la12xx.c new file mode 100644 index 000000000..b4c3000e9 --- /dev/null +++ b/drivers/baseband/la12xx/bbdev_la12xx.c @@ -0,0 +1,110 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2020-2021 NXP + */ + +#include <string.h> + +#include <rte_common.h> +#include <rte_bus_vdev.h> +#include <rte_malloc.h> +#include <rte_ring.h> +#include <rte_kvargs.h> + +#include <rte_bbdev.h> +#include <rte_bbdev_pmd.h> + +#include <bbdev_la12xx_pmd_logs.h> + +#define DRIVER_NAME baseband_la12xx + +RTE_LOG_REGISTER(bbdev_la12xx_logtype, pmd.bb.la12xx, NOTICE); + +/* private data structure */ +struct bbdev_la12xx_private { + unsigned int max_nb_queues; /**< Max number of queues */ +}; +/* Create device */ +static int +la12xx_bbdev_create(struct rte_vdev_device *vdev) +{ + struct rte_bbdev *bbdev; + const char *name = rte_vdev_device_name(vdev); + + PMD_INIT_FUNC_TRACE(); + + bbdev = rte_bbdev_allocate(name); + if (bbdev == NULL) + return -ENODEV; + + bbdev->data->dev_private = rte_zmalloc(name, + sizeof(struct bbdev_la12xx_private), + RTE_CACHE_LINE_SIZE); + if (bbdev->data->dev_private == NULL) { + rte_bbdev_release(bbdev); + return -ENOMEM; + } + + bbdev->dev_ops = NULL; + bbdev->device = &vdev->device; + bbdev->data->socket_id = 0; + bbdev->intr_handle = NULL; + + /* register rx/tx burst functions for data path */ + bbdev->dequeue_enc_ops = NULL; + bbdev->dequeue_dec_ops = NULL; + bbdev->enqueue_enc_ops = NULL; + bbdev->enqueue_dec_ops = NULL; + + return 0; +} + +/* Initialise device */ +static int +la12xx_bbdev_probe(struct rte_vdev_device *vdev) +{ + const char *name; + + PMD_INIT_FUNC_TRACE(); + + if (vdev == NULL) + return -EINVAL; + + name = rte_vdev_device_name(vdev); + if (name == NULL) + return -EINVAL; + + return la12xx_bbdev_create(vdev); +} + +/* Uninitialise device */ +static int +la12xx_bbdev_remove(struct rte_vdev_device *vdev) +{ + struct rte_bbdev *bbdev; + const char *name; + + PMD_INIT_FUNC_TRACE(); + + if (vdev == NULL) + return -EINVAL; + + name = rte_vdev_device_name(vdev); + if (name == NULL) + return -EINVAL; + + bbdev = rte_bbdev_get_named_dev(name); + if (bbdev == NULL) + return -EINVAL; + + rte_free(bbdev->data->dev_private); + + return rte_bbdev_release(bbdev); +} + +static struct rte_vdev_driver bbdev_la12xx_pmd_drv = { + .probe = la12xx_bbdev_probe, + .remove = la12xx_bbdev_remove +}; + +RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv); +RTE_PMD_REGISTER_ALIAS(DRIVER_NAME, bbdev_la12xx); diff --git a/drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h b/drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h new file mode 100644 index 000000000..71613a5ba --- /dev/null +++ b/drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2020 NXP + */ + +#ifndef _BBDEV_LA12XX_PMD_LOGS_H_ +#define _BBDEV_LA12XX_PMD_LOGS_H_ + +#define BBDEV_LA12XX_PMD_LOG(level, fmt, args...) \ + rte_log(RTE_LOG_ ## level, bbdev_la12xx_logtype, "bbdev_la12xx: " \ + fmt "\n", ##args) + +#define BBDEV_LA12XX_PMD_DEBUG(fmt, args...) \ + rte_log(RTE_LOG_DEBUG, bbdev_la12xx_logtype, "bbdev_la12xx: %s(): "\ + fmt "\n", __func__, ##args) + +#define PMD_INIT_FUNC_TRACE() BBDEV_LA12XX_PMD_DEBUG(">>") + +#define BBDEV_LA12XX_PMD_CRIT(fmt, args...) \ + BBDEV_LA12XX_PMD_LOG(CRIT, fmt, ## args) +#define BBDEV_LA12XX_PMD_INFO(fmt, args...) \ + BBDEV_LA12XX_PMD_LOG(INFO, fmt, ## args) +#define BBDEV_LA12XX_PMD_ERR(fmt, args...) \ + BBDEV_LA12XX_PMD_LOG(ERR, fmt, ## args) +#define BBDEV_LA12XX_PMD_WARN(fmt, args...) \ + BBDEV_LA12XX_PMD_LOG(WARNING, fmt, ## args) + +/* DP Logs, toggled out at compile time if level lower than current level */ +#define BBDEV_LA12XX_PMD_DP_LOG(level, fmt, args...) \ + RTE_LOG_DP(level, PMD, fmt, ## args) + +#define BBDEV_LA12XX_PMD_DP_DEBUG(fmt, args...) \ + BBDEV_LA12XX_PMD_DP_LOG(DEBUG, fmt, ## args) +#define BBDEV_LA12XX_PMD_DP_INFO(fmt, args...) \ + BBDEV_LA12XX_PMD_DP_LOG(INFO, fmt, ## args) +#define BBDEV_LA12XX_PMD_DP_WARN(fmt, args...) \ + BBDEV_LA12XX_PMD_DP_LOG(WARNING, fmt, ## args) + +#endif /* _BBDEV_LA12XX_PMD_LOGS_H_ */ diff --git a/drivers/baseband/la12xx/meson.build b/drivers/baseband/la12xx/meson.build new file mode 100644 index 000000000..7a017dcff --- /dev/null +++ b/drivers/baseband/la12xx/meson.build @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright 2020-2021 NXP + +deps += ['bbdev', 'bus_vdev', 'ring'] + +sources = files('bbdev_la12xx.c') diff --git a/drivers/baseband/la12xx/version.map b/drivers/baseband/la12xx/version.map new file mode 100644 index 000000000..4a76d1d52 --- /dev/null +++ b/drivers/baseband/la12xx/version.map @@ -0,0 +1,3 @@ +DPDK_21 { + local: *; +}; diff --git a/drivers/baseband/meson.build b/drivers/baseband/meson.build index 920e3b02e..ba5b2e570 100644 --- a/drivers/baseband/meson.build +++ b/drivers/baseband/meson.build @@ -5,4 +5,4 @@ if is_windows subdir_done() endif -drivers = ['null', 'turbo_sw', 'fpga_lte_fec', 'fpga_5gnr_fec', 'acc100'] +drivers = ['null', 'turbo_sw', 'fpga_lte_fec', 'fpga_5gnr_fec', 'acc100', 'la12xx']