| Message ID | 20220301152421.57281-1-linux@fw-web.de |
|---|---|
| Headers | show |
| Series | Add sata nodes to rk356x | expand |
On Thu, Mar 3, 2022 at 1:04 AM Frank Wunderlich <frank-w@public-files.de> wrote: > > Hi Rob, > > thanks for review, > > have prepared the changes based on yours and krzysztof comments > > https://github.com/frank-w/BPI-R2-4.14/commits/5.17-next-20220225 > > (just ignore the top 2 commits) i thought i had a size-cells-error, but did not get them again after reverting this part, seems they are fixed by inclusion of the sata-common binding > > > Gesendet: Mittwoch, 02. März 2022 um 19:14 Uhr > > Von: "Rob Herring" <robh@kernel.org> > > An: "Frank Wunderlich" <linux@fw-web.de> > > > On Tue, Mar 01, 2022 at 04:24:17PM +0100, Frank Wunderlich wrote: > > > From: Frank Wunderlich <frank-w@public-files.de> > > > > diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml > > > new file mode 100644 > > > index 000000000000..cf67ddfc6afb > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml > > > @@ -0,0 +1,162 @@ > > > +# SPDX-License-Identifier: GPL-2.0 > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/ata/ahci-platform.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: AHCI SATA Controller > > > > blank line. > > done > > > > +description: > > > + SATA nodes are defined to describe on-chip Serial ATA controllers. > > > + Each SATA controller should have its own node. > > > + > > > + It is possible, but not required, to represent each port as a sub-node. > > > + It allows to enable each port independently when dealing with multiple > > > + PHYs. > > > > You need a '|' after 'description' if you want to maintain the > > paragraphs. > > ok added | to all multiline descriptions > > > > + > > > +maintainers: > > > + - Hans de Goede <hdegoede@redhat.com> > > > + - Jens Axboe <axboe@kernel.dk> > > > + > > > +allOf: > > > +- $ref: "sata-common.yaml#" > > > + > > > +properties: > > > + compatible: > > > + oneOf: > > > + - items: > > > + - enum: > > > + - brcm,iproc-ahci > > > + - marvell,armada-8k-ahci > > > + - marvell,berlin2q-ahci > > > + - const: generic-ahci > > > + - enum: > > > + - brcm,iproc-ahci > > > + - cavium,octeon-7130-ahci > > > + - hisilicon,hisi-ahci > > > + - ibm,476gtr-ahci > > > + - marvell,armada-3700-ahci > > > + - marvell,armada-380-ahci > > > + - snps,dwc-ahci > > > + - snps,spear-ahci > > > > Install yamllint and run 'make dt_binding_check'. It's going to > > complain about the indentation. > > you're right, i had no yamllint installed, so i have not seen these indention errors > > > > + ahci-supply: > > > + description: > > > + regulator for AHCI controller > > > + > > > + clock-names: > > > > Group with 'clocks' > > ok, already done in my tree because of krzysztofs comment > > > > + ports-implemented: > > > + $ref: '/schemas/types.yaml#/definitions/uint32' > > > + description: > > > + Mask that indicates which ports that the HBA supports > > > + are available for software to use. Useful if PORTS_IMPL > > > + is not programmed by the BIOS, which is true with > > > + some embedded SoCs. > > > + maxItems: 1 > > > > A uint32 is only ever 1 item. Drop. > > > > IIRC, isn't the max here 0xff? Add constraints. > > i've found it only set to 0x1 so i have currently set the maximum to 0x1, is this ok? > If some higher value is needed binding needs to be touched... There's a spec for it, so no need to look at what's used. Calxeda AHCI had 5 ports IIRC. > > > + reg-names: > > > + maxItems: 1 > > > > Group with 'reg'. > > ok > > > > +patternProperties: > > > + "^sata-port@[0-9a-f]+$": > > > + type: object > > > > additionalProperties: false > > ok added to my tree > > and needed to add phy-names because some marvell boards using this > > arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dt.yaml: sata@540000: sata-port@1: 'phy-names' does not match any of the regexes: 'pinctrl-[0-9]+' > > now i have only the marvell-errors about incomplete sata-port subnode (without phy/target-supply) like i mention in the patch...how to proceed with this? So the child nodes are incomplete? They should be disabled then (status = "disabled") and that turns off required properties checks. Rob
Hi > Gesendet: Samstag, 05. März 2022 um 00:37 Uhr > Von: "Rob Herring" <robh@kernel.org> > > > > + ports-implemented: > > > > + $ref: '/schemas/types.yaml#/definitions/uint32' > > > > + description: > > > > + Mask that indicates which ports that the HBA supports > > > > + are available for software to use. Useful if PORTS_IMPL > > > > + is not programmed by the BIOS, which is true with > > > > + some embedded SoCs. > > > > + maxItems: 1 > > > > > > A uint32 is only ever 1 item. Drop. > > > > > > IIRC, isn't the max here 0xff? Add constraints. > > > > i've found it only set to 0x1 so i have currently set the maximum to 0x1, is this ok? > > If some higher value is needed binding needs to be touched... > > There's a spec for it, so no need to look at what's used. Calxeda AHCI > had 5 ports IIRC. as far as i understand code in libahci.c line 535+ [1] i guess i need to set lower 5 bits to 1 for 5 ports, right? resulting in max value 0x1f > > now i have only the marvell-errors about incomplete sata-port subnode (without phy/target-supply) like i mention in the patch...how to proceed with this? > > So the child nodes are incomplete? They should be disabled then > (status = "disabled") and that turns off required properties checks. thanks, have disable the nodes and reenable them where phys/target-supply was added [2]... now the dtbs_check is clean [1] https://elixir.bootlin.com/linux/v5.17-rc6/source/drivers/ata/libahci.c#L535 [2] https://github.com/frank-w/BPI-R2-4.14/commits/5.17-next-20220225 regards Frank
Take a look again of the mentioned calxeda... it looks like it only uses the compatible "calxeda,hb-ahci" handled by drivers/ata/sata_highbank.c and seems not using the ahci-platform.c obj-$(CONFIG_SATA_HIGHBANK) += sata_highbank.o libahci.o so imho the maximum 0x1 still should be right regards Frank > > Gesendet: Samstag, 05. März 2022 um 00:37 Uhr > > Von: "Rob Herring" <robh@kernel.org> > > > There's a spec for it, so no need to look at what's used. Calxeda AHCI > > had 5 ports IIRC.
From: Frank Wunderlich <frank-w@public-files.de> This Series converts the binding for ahci-platform to yaml and adds sata nodes to rockchip rk356x device trees. v4: YAML binding: - fix min vs. max - fix indention of examples - move up sata-common.yaml - reorder compatible - add descriptions/maxitems - fix compatible-structure - fix typo in example achi vs. ahci - add clock-names and reg-names DTS-Patches: - drop newline in dts - re-add clock-names - add soc specific compatible - fix sata nodename in arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi v3: - add conversion to sata-series - fix some errors in dt_binding_check and dtbs_check - move to unevaluated properties = false - add power-domain to yaml - move sata0 to rk3568.dtsi - drop clock-names and interrupt-names Frank Wunderlich (5): dt-bindings: Convert ahci-platform DT bindings to yaml arm64: dts: broadcom: Fix sata nodename dt-bindings: Add power-domains property to ahci-platform dt-bindings: Add rk3568-dwc3-ahci compatible arm64: dts: rockchip: Add sata nodes to rk356x .../devicetree/bindings/ata/ahci-platform.txt | 79 -------- .../bindings/ata/ahci-platform.yaml | 169 ++++++++++++++++++ .../boot/dts/broadcom/northstar2/ns2.dtsi | 2 +- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 ++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 28 +++ 5 files changed, 212 insertions(+), 80 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml