| Message ID | 20220304005317.776110-1-robdclark@gmail.com |
|---|---|
| Headers | show |
| Series | drm/msm: Clear perf counters across context switch | expand |
On 3/4/2022 6:22 AM, Rob Clark wrote: > From: Rob Clark <robdclark@chromium.org> > > Some clever folks figured out a way to use performance counters as a > side-channel[1]. But, other than the special case of using the perf > counters for system profiling, we can reset the counters across context > switches to protect against this. > > This series introduces a SYSPROF param which a sufficiently privilaged > userspace (like Mesa's pps-producer, which already must run as root) to > opt-out, and makes the default behavior to reset counters on context > switches. > > [1] https://dl.acm.org/doi/pdf/10.1145/3503222.3507757 > > Rob Clark (4): > drm/msm: Update generated headers > drm/msm: Add SET_PARAM ioctl > drm/msm: Add SYSPROF param (v2) > drm/msm/a6xx: Zap counters across context switch > > drivers/gpu/drm/msm/adreno/a2xx.xml.h | 26 +- > drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 1 + > drivers/gpu/drm/msm/adreno/a3xx.xml.h | 30 +- > drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 1 + > drivers/gpu/drm/msm/adreno/a4xx.xml.h | 112 ++- > drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 1 + > drivers/gpu/drm/msm/adreno/a5xx.xml.h | 63 +- > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 1 + > drivers/gpu/drm/msm/adreno/a6xx.xml.h | 674 +++++++++++------- > drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 26 +- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 30 + > .../gpu/drm/msm/adreno/adreno_common.xml.h | 31 +- > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 14 + > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 2 + > drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h | 46 +- > drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h | 37 +- > drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h | 37 +- > drivers/gpu/drm/msm/disp/mdp_common.xml.h | 37 +- > drivers/gpu/drm/msm/dsi/dsi.xml.h | 37 +- > drivers/gpu/drm/msm/dsi/dsi_phy_10nm.xml.h | 37 +- > drivers/gpu/drm/msm/dsi/dsi_phy_14nm.xml.h | 37 +- > drivers/gpu/drm/msm/dsi/dsi_phy_20nm.xml.h | 37 +- > drivers/gpu/drm/msm/dsi/dsi_phy_28nm.xml.h | 37 +- > .../gpu/drm/msm/dsi/dsi_phy_28nm_8960.xml.h | 37 +- > drivers/gpu/drm/msm/dsi/dsi_phy_5nm.xml.h | 480 ------------- > drivers/gpu/drm/msm/dsi/dsi_phy_7nm.xml.h | 43 +- > drivers/gpu/drm/msm/dsi/mmss_cc.xml.h | 37 +- > drivers/gpu/drm/msm/dsi/sfpb.xml.h | 37 +- > drivers/gpu/drm/msm/hdmi/hdmi.xml.h | 37 +- > drivers/gpu/drm/msm/hdmi/qfprom.xml.h | 37 +- > drivers/gpu/drm/msm/msm_drv.c | 28 + > drivers/gpu/drm/msm/msm_gpu.c | 2 + > drivers/gpu/drm/msm/msm_gpu.h | 29 + > drivers/gpu/drm/msm/msm_submitqueue.c | 39 + > include/uapi/drm/msm_drm.h | 28 +- > 35 files changed, 1058 insertions(+), 1130 deletions(-) > delete mode 100644 drivers/gpu/drm/msm/dsi/dsi_phy_5nm.xml.h > For the whole series except " drm/msm: Update generated headers", Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> -Akhil.
From: Rob Clark <robdclark@chromium.org> Some clever folks figured out a way to use performance counters as a side-channel[1]. But, other than the special case of using the perf counters for system profiling, we can reset the counters across context switches to protect against this. This series introduces a SYSPROF param which a sufficiently privilaged userspace (like Mesa's pps-producer, which already must run as root) to opt-out, and makes the default behavior to reset counters on context switches. [1] https://dl.acm.org/doi/pdf/10.1145/3503222.3507757 Rob Clark (4): drm/msm: Update generated headers drm/msm: Add SET_PARAM ioctl drm/msm: Add SYSPROF param (v2) drm/msm/a6xx: Zap counters across context switch drivers/gpu/drm/msm/adreno/a2xx.xml.h | 26 +- drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 1 + drivers/gpu/drm/msm/adreno/a3xx.xml.h | 30 +- drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 1 + drivers/gpu/drm/msm/adreno/a4xx.xml.h | 112 ++- drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 1 + drivers/gpu/drm/msm/adreno/a5xx.xml.h | 63 +- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 1 + drivers/gpu/drm/msm/adreno/a6xx.xml.h | 674 +++++++++++------- drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 26 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 30 + .../gpu/drm/msm/adreno/adreno_common.xml.h | 31 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 14 + drivers/gpu/drm/msm/adreno/adreno_gpu.h | 2 + drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h | 46 +- drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h | 37 +- drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h | 37 +- drivers/gpu/drm/msm/disp/mdp_common.xml.h | 37 +- drivers/gpu/drm/msm/dsi/dsi.xml.h | 37 +- drivers/gpu/drm/msm/dsi/dsi_phy_10nm.xml.h | 37 +- drivers/gpu/drm/msm/dsi/dsi_phy_14nm.xml.h | 37 +- drivers/gpu/drm/msm/dsi/dsi_phy_20nm.xml.h | 37 +- drivers/gpu/drm/msm/dsi/dsi_phy_28nm.xml.h | 37 +- .../gpu/drm/msm/dsi/dsi_phy_28nm_8960.xml.h | 37 +- drivers/gpu/drm/msm/dsi/dsi_phy_5nm.xml.h | 480 ------------- drivers/gpu/drm/msm/dsi/dsi_phy_7nm.xml.h | 43 +- drivers/gpu/drm/msm/dsi/mmss_cc.xml.h | 37 +- drivers/gpu/drm/msm/dsi/sfpb.xml.h | 37 +- drivers/gpu/drm/msm/hdmi/hdmi.xml.h | 37 +- drivers/gpu/drm/msm/hdmi/qfprom.xml.h | 37 +- drivers/gpu/drm/msm/msm_drv.c | 28 + drivers/gpu/drm/msm/msm_gpu.c | 2 + drivers/gpu/drm/msm/msm_gpu.h | 29 + drivers/gpu/drm/msm/msm_submitqueue.c | 39 + include/uapi/drm/msm_drm.h | 28 +- 35 files changed, 1058 insertions(+), 1130 deletions(-) delete mode 100644 drivers/gpu/drm/msm/dsi/dsi_phy_5nm.xml.h