| Message ID | 20220402184011.132465-10-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | dt-bindings: qcom: convert entire GSBI (QUP I2C/SPI/UART) to DT schema | expand |
On Sat, Apr 02, 2022 at 08:40:11PM +0200, Krzysztof Kozlowski wrote: > Convert the Qualcomm General Serial Bus Interface (GSBI) to DT > Schema. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/soc/qcom/qcom,gsbi.txt | 87 ------------ > .../bindings/soc/qcom/qcom,gsbi.yaml | 133 ++++++++++++++++++ > 2 files changed, 133 insertions(+), 87 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt > create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml Great initiative to convert everything in one go! [...] > diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml > new file mode 100644 > index 000000000000..b97e359f3f90 > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml > @@ -0,0 +1,133 @@ > +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/qcom/qcom,gsbi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm General Serial Bus Interface (GSBI) > + > +maintainers: > + - Andy Gross <agross@kernel.org> > + - Bjorn Andersson <bjorn.andersson@linaro.org> > + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > + > +description: > + The GSBI controller is modeled as a node with zero or more child nodes, each > + representing a serial sub-node device that is mux'd as part of the GSBI > + configuration settings. The mode setting will govern the input/output mode > + of the 4 GSBI IOs. > + > + A GSBI controller node can contain 0 or more child nodes representing serial > + devices. These serial devices can be a QCOM UART, I2C controller, spi > + controller, or some combination of aforementioned devices. > + > +properties: > + compatible: > + enum: > + - qcom,gsbi-v1.0.0 Only 1 entry? const. -Kuldeep
On 02/04/2022 22:29, Kuldeep Singh wrote: > On Sat, Apr 02, 2022 at 08:40:11PM +0200, Krzysztof Kozlowski wrote: >> Convert the Qualcomm General Serial Bus Interface (GSBI) to DT >> Schema. >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> --- >> .../bindings/soc/qcom/qcom,gsbi.txt | 87 ------------ >> .../bindings/soc/qcom/qcom,gsbi.yaml | 133 ++++++++++++++++++ >> 2 files changed, 133 insertions(+), 87 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt >> create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml > > Great initiative to convert everything in one go! > > [...] > >> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml >> new file mode 100644 >> index 000000000000..b97e359f3f90 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml >> @@ -0,0 +1,133 @@ >> +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/soc/qcom/qcom,gsbi.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm General Serial Bus Interface (GSBI) >> + >> +maintainers: >> + - Andy Gross <agross@kernel.org> >> + - Bjorn Andersson <bjorn.andersson@linaro.org> >> + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> + >> +description: >> + The GSBI controller is modeled as a node with zero or more child nodes, each >> + representing a serial sub-node device that is mux'd as part of the GSBI >> + configuration settings. The mode setting will govern the input/output mode >> + of the 4 GSBI IOs. >> + >> + A GSBI controller node can contain 0 or more child nodes representing serial >> + devices. These serial devices can be a QCOM UART, I2C controller, spi >> + controller, or some combination of aforementioned devices. >> + >> +properties: >> + compatible: >> + enum: >> + - qcom,gsbi-v1.0.0 > > Only 1 entry? const. v1.0.0 looks like there could be some more, although they did not reach mainline. The GSBI seems to be replaced by different blocks, so maybe there will be no new entries here. Best regards, Krzysztof
On Sat, Apr 02, 2022 at 10:38:23PM +0200, Krzysztof Kozlowski wrote: > On 02/04/2022 22:29, Kuldeep Singh wrote: > > On Sat, Apr 02, 2022 at 08:40:11PM +0200, Krzysztof Kozlowski wrote: > >> Convert the Qualcomm General Serial Bus Interface (GSBI) to DT > >> Schema. > >> > >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > >> --- > >> .../bindings/soc/qcom/qcom,gsbi.txt | 87 ------------ > >> .../bindings/soc/qcom/qcom,gsbi.yaml | 133 ++++++++++++++++++ > >> 2 files changed, 133 insertions(+), 87 deletions(-) > >> delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt > >> create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml > > > > Great initiative to convert everything in one go! > > > > [...] > > > >> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml > >> new file mode 100644 > >> index 000000000000..b97e359f3f90 > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml > >> @@ -0,0 +1,133 @@ > >> +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause > >> +%YAML 1.2 > >> +--- > >> +$id: http://devicetree.org/schemas/soc/qcom/qcom,gsbi.yaml# > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >> + > >> +title: Qualcomm General Serial Bus Interface (GSBI) > >> + > >> +maintainers: > >> + - Andy Gross <agross@kernel.org> > >> + - Bjorn Andersson <bjorn.andersson@linaro.org> > >> + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > >> + > >> +description: > >> + The GSBI controller is modeled as a node with zero or more child nodes, each > >> + representing a serial sub-node device that is mux'd as part of the GSBI > >> + configuration settings. The mode setting will govern the input/output mode > >> + of the 4 GSBI IOs. > >> + > >> + A GSBI controller node can contain 0 or more child nodes representing serial > >> + devices. These serial devices can be a QCOM UART, I2C controller, spi > >> + controller, or some combination of aforementioned devices. > >> + > >> +properties: > >> + compatible: > >> + enum: > >> + - qcom,gsbi-v1.0.0 > > > > Only 1 entry? const. > > v1.0.0 looks like there could be some more, although they did not reach > mainline. The GSBI seems to be replaced by different blocks, so maybe > there will be no new entries here. Yes, GSBI seems pretty old and only v1 rolled out. Don't think there are more revisions on the cards. Still can't say so.
On Sat, 02 Apr 2022 20:40:11 +0200, Krzysztof Kozlowski wrote: > Convert the Qualcomm General Serial Bus Interface (GSBI) to DT > Schema. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/soc/qcom/qcom,gsbi.txt | 87 ------------ > .../bindings/soc/qcom/qcom,gsbi.yaml | 133 ++++++++++++++++++ > 2 files changed, 133 insertions(+), 87 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt > create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt deleted file mode 100644 index fe1855f09dcc..000000000000 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt +++ /dev/null @@ -1,87 +0,0 @@ -QCOM GSBI (General Serial Bus Interface) Driver - -The GSBI controller is modeled as a node with zero or more child nodes, each -representing a serial sub-node device that is mux'd as part of the GSBI -configuration settings. The mode setting will govern the input/output mode of -the 4 GSBI IOs. - -Required properties: -- compatible: Should contain "qcom,gsbi-v1.0.0" -- cell-index: Should contain the GSBI index -- reg: Address range for GSBI registers -- clocks: required clock -- clock-names: must contain "iface" entry -- qcom,mode : indicates MUX value for configuration of the serial interface. - Please reference dt-bindings/soc/qcom,gsbi.h for valid mux values. - -Optional properties: -- qcom,crci : indicates CRCI MUX value for QUP CRCI ports. Please reference - dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values. -- syscon-tcsr: indicates phandle of TCSR syscon node. Required if child uses - dma. - -Required properties if child node exists: -- #address-cells: Must be 1 -- #size-cells: Must be 1 -- ranges: Must be present - -Properties for children: - -A GSBI controller node can contain 0 or more child nodes representing serial -devices. These serial devices can be a QCOM UART, I2C controller, spi -controller, or some combination of aforementioned devices. - -See the following for child node definitions: -Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt -Documentation/devicetree/bindings/spi/qcom,spi-qup.txt -Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt - -Example for APQ8064: - -#include <dt-bindings/soc/qcom,gsbi.h> - - gsbi4@16300000 { - compatible = "qcom,gsbi-v1.0.0"; - cell-index = <4>; - reg = <0x16300000 0x100>; - clocks = <&gcc GSBI4_H_CLK>; - clock-names = "iface"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - qcom,mode = <GSBI_PROT_I2C_UART>; - qcom,crci = <GSBI_CRCI_QUP>; - - syscon-tcsr = <&tcsr>; - - /* child nodes go under here */ - - i2c_qup4: i2c@16380000 { - compatible = "qcom,i2c-qup-v1.1.1"; - reg = <0x16380000 0x1000>; - interrupts = <0 153 0>; - - clocks = <&gcc GSBI4_QUP_CLK>, <&gcc GSBI4_H_CLK>; - clock-names = "core", "iface"; - - clock-frequency = <200000>; - - #address-cells = <1>; - #size-cells = <0>; - - }; - - uart4: serial@16340000 { - compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; - reg = <0x16340000 0x1000>, - <0x16300000 0x1000>; - interrupts = <0 152 0x0>; - clocks = <&gcc GSBI4_UART_CLK>, <&gcc GSBI4_H_CLK>; - clock-names = "core", "iface"; - }; - }; - - tcsr: syscon@1a400000 { - compatible = "qcom,apq8064-tcsr", "syscon"; - reg = <0x1a400000 0x100>; - }; diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml new file mode 100644 index 000000000000..b97e359f3f90 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,gsbi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm General Serial Bus Interface (GSBI) + +maintainers: + - Andy Gross <agross@kernel.org> + - Bjorn Andersson <bjorn.andersson@linaro.org> + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + +description: + The GSBI controller is modeled as a node with zero or more child nodes, each + representing a serial sub-node device that is mux'd as part of the GSBI + configuration settings. The mode setting will govern the input/output mode + of the 4 GSBI IOs. + + A GSBI controller node can contain 0 or more child nodes representing serial + devices. These serial devices can be a QCOM UART, I2C controller, spi + controller, or some combination of aforementioned devices. + +properties: + compatible: + enum: + - qcom,gsbi-v1.0.0 + + '#address-cells': + const: 1 + + cell-index: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The GSBI index. + + clocks: + maxItems: 1 + + clock-names: + const: iface + + qcom,crci: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + CRCI MUX value for QUP CRCI ports. Please reference + include/dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values. + + qcom,mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + MUX value for configuration of the serial interface. Please reference + include/dt-bindings/soc/qcom,gsbi.h for valid mux values. + + '#size-cells': + const: 1 + + syscon-tcsr: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle of TCSR syscon node.Required if child uses dma. + + ranges: true + + reg: + maxItems: 1 + +patternProperties: + "spi@[0-9a-f]+$": + type: object + $ref: /schemas/spi/qcom,spi-qup.yaml# + + "i2c@[0-9a-f]+$": + type: object + $ref: /schemas/i2c/qcom,i2c-qup.yaml# + + "serial@[0-9a-f]+$": + type: object + $ref: /schemas/serial/qcom,msm-uartdm.yaml# + +required: + - compatible + - cell-index + - clocks + - clock-names + - qcom,mode + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-msm8960.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/soc/qcom,gsbi.h> + + gsbi@12440000 { + compatible = "qcom,gsbi-v1.0.0"; + reg = <0x12440000 0x100>; + cell-index = <1>; + clocks = <&gcc GSBI1_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + syscon-tcsr = <&tcsr>; + qcom,mode = <GSBI_PROT_I2C_UART>; + + serial@12450000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x12450000 0x100>, + <0x12400000 0x03>; + interrupts = <0 193 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>; + clock-names = "core", "iface"; + }; + + i2c@12460000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x12460000 0x1000>; + pinctrl-0 = <&i2c1_pins>; + pinctrl-1 = <&i2c1_pins_sleep>; + pinctrl-names = "default", "sleep"; + interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>; + clock-names = "core", "iface"; + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; /* UART chosen */ + }; + };
Convert the Qualcomm General Serial Bus Interface (GSBI) to DT Schema. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- .../bindings/soc/qcom/qcom,gsbi.txt | 87 ------------ .../bindings/soc/qcom/qcom,gsbi.yaml | 133 ++++++++++++++++++ 2 files changed, 133 insertions(+), 87 deletions(-) delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml