| Message ID | 20220131151346.45792-1-andriy.shevchenko@linux.intel.com |
|---|---|
| Headers | show |
| Series | platform/x86: introduce p2sb_bar() helper | expand |
Am Mon, 31 Jan 2022 17:13:38 +0200 schrieb Andy Shevchenko <andriy.shevchenko@linux.intel.com>: > There are a few users and at least one more is coming (*) that would > like to utilize P2SB mechanism of hiding and unhiding a device from > the PCI configuration space. > > Here is the series to consolidate p2sb handling code for existing > users and provide a generic way for new comer(s). > > It also includes a patch to enable GPIO controllers on Apollo Lake > when it's used with ABL bootloader w/o ACPI support. > > The patch that bring the helper ("platform/x86/intel: Add Primary > to Sideband (P2SB) bridge support") has a commit message that > sheds a light on what the P2SB is and why this is needed. > > The changes made in v2 do not change the main idea and the > functionality in a big scale. What we need is probably one more > (RE-)test done by Henning. Just actually read all this the first time, sorry for that! Will take care of testing on a few of those Simatic IPCs and write patches to switch to P2SB ... possibly pinctrl where that might pop up without ACPI. I guess p5 will make pinctrl show up on what i would call a 127E ... apollo lake. > I hope to have it merged to v5.18-rc1 that > Siemens can develop their changes based on this series. Will do. Sorry for the delay after having passed you i now seem to slow you down. Henning > I have tested this on Apollo Lake platform (I'm able to see SPI NOR > and since we have an ACPI device for GPIO I do not see any attempts > to recreate one). > > *) One in this series, and one is a due after merge in the Simatic > IPC drivers > > The series may be routed either via MFD (and I guess Lee would prefer > that) or via PDx86, whichever seems better for you, folks. As of > today patches are ACKed by the respective maintainers, but I2C one > and one of the MFD. > > Wolfram, can you ACK the patch against i2c-i801 driver, if you have no > objections? > > Changes in v4: > - added tag to the entire series (Hans) > - added tag to pin control patch (Mika) > - dropped PCI core changes (PCI core doesn't want modifications to be > made) > - as a consequence of the above merged necessary bits into p2sb.c > - added a check that p2sb is really hidden (Hans) > - added EDAC patches (reviewed by maintainer internally) > > Changes in v3: > - resent with cover letter > > Changes in v2: > - added parentheses around bus in macros (Joe) > - added tag (Jean) > - fixed indentation and wrapping in the header (Christoph) > - moved out of PCI realm to PDx86 as the best common denominator > (Bjorn) > - added a verbose commit message to explain P2SB thingy (Bjorn) > - converted first parameter from pci_dev to pci_bus > - made first two parameters (bus and devfn) optional (Henning, Lee) > - added Intel pin control patch to the series (Henning, Mika) > - fixed English style in the commit message of one of MFD patch (Lee) > - added tags to my MFD LPC ICH patches (Lee) > - used consistently (c) (Lee) > - made indexing for MFD cell and resource arrays (Lee) > - fixed the resource size in i801 (Jean) > > Andy Shevchenko (6): > pinctrl: intel: Check against matching data instead of ACPI > companion mfd: lpc_ich: Factor out lpc_ich_enable_spi_write() > mfd: lpc_ich: Switch to generic p2sb_bar() > i2c: i801: convert to use common P2SB accessor > EDAC, pnd2: Use proper I/O accessors and address space annotation > EDAC, pnd2: convert to use common P2SB accessor > > Jonathan Yong (1): > platform/x86/intel: Add Primary to Sideband (P2SB) bridge support > > Tan Jui Nee (1): > mfd: lpc_ich: Add support for pinctrl in non-ACPI system > > drivers/edac/Kconfig | 1 + > drivers/edac/pnd2_edac.c | 62 ++--- > drivers/i2c/busses/Kconfig | 1 + > drivers/i2c/busses/i2c-i801.c | 39 +--- > drivers/mfd/Kconfig | 1 + > drivers/mfd/lpc_ich.c | 136 +++++++++-- > drivers/pinctrl/intel/pinctrl-intel.c | 14 +- > drivers/platform/x86/intel/Kconfig | 12 + > drivers/platform/x86/intel/Makefile | 1 + > drivers/platform/x86/intel/p2sb.c | 305 > +++++++++++++++++++++++++ include/linux/platform_data/x86/p2sb.h | > 27 +++ 11 files changed, 500 insertions(+), 99 deletions(-) > create mode 100644 drivers/platform/x86/intel/p2sb.c > create mode 100644 include/linux/platform_data/x86/p2sb.h >
Am Mon, 31 Jan 2022 17:13:38 +0200 schrieb Andy Shevchenko <andriy.shevchenko@linux.intel.com>: > There are a few users and at least one more is coming (*) that would > like to utilize P2SB mechanism of hiding and unhiding a device from > the PCI configuration space. > > Here is the series to consolidate p2sb handling code for existing > users and provide a generic way for new comer(s). > > It also includes a patch to enable GPIO controllers on Apollo Lake > when it's used with ABL bootloader w/o ACPI support. > > The patch that bring the helper ("platform/x86/intel: Add Primary > to Sideband (P2SB) bridge support") has a commit message that > sheds a light on what the P2SB is and why this is needed. > > The changes made in v2 do not change the main idea and the > functionality in a big scale. What we need is probably one more > (RE-)test done by Henning. I hope to have it merged to v5.18-rc1 that > Siemens can develop their changes based on this series. I did test this series and it works as expected. Only problem is that the leds driver will not work together with the pinctrl. Because two "in tree drivers" will try to reserve the same memory region when both are enabled. Who wins is a matter of probing order ... If you can take my changes into your series we will not have a problem. Otherwise we might need to create sort of a conflict which my series would revert when switching apl lake to gpio. I would not know the process, let us see what the reviews bring and how to continue here. Thanks so much for taking care, especially the pinctrl coming up without ACPI really improves the simatic leds on the apl lake. In fact i will have to double check if i really need the p2sb for the 427E wdt ... but until i have an answer, p2sb works just fine. regards, Henning > I have tested this on Apollo Lake platform (I'm able to see SPI NOR > and since we have an ACPI device for GPIO I do not see any attempts > to recreate one). > > *) One in this series, and one is a due after merge in the Simatic > IPC drivers > > The series may be routed either via MFD (and I guess Lee would prefer > that) or via PDx86, whichever seems better for you, folks. As of > today patches are ACKed by the respective maintainers, but I2C one > and one of the MFD. > > Wolfram, can you ACK the patch against i2c-i801 driver, if you have no > objections? > > Changes in v4: > - added tag to the entire series (Hans) > - added tag to pin control patch (Mika) > - dropped PCI core changes (PCI core doesn't want modifications to be > made) > - as a consequence of the above merged necessary bits into p2sb.c > - added a check that p2sb is really hidden (Hans) > - added EDAC patches (reviewed by maintainer internally) > > Changes in v3: > - resent with cover letter > > Changes in v2: > - added parentheses around bus in macros (Joe) > - added tag (Jean) > - fixed indentation and wrapping in the header (Christoph) > - moved out of PCI realm to PDx86 as the best common denominator > (Bjorn) > - added a verbose commit message to explain P2SB thingy (Bjorn) > - converted first parameter from pci_dev to pci_bus > - made first two parameters (bus and devfn) optional (Henning, Lee) > - added Intel pin control patch to the series (Henning, Mika) > - fixed English style in the commit message of one of MFD patch (Lee) > - added tags to my MFD LPC ICH patches (Lee) > - used consistently (c) (Lee) > - made indexing for MFD cell and resource arrays (Lee) > - fixed the resource size in i801 (Jean) > > Andy Shevchenko (6): > pinctrl: intel: Check against matching data instead of ACPI > companion mfd: lpc_ich: Factor out lpc_ich_enable_spi_write() > mfd: lpc_ich: Switch to generic p2sb_bar() > i2c: i801: convert to use common P2SB accessor > EDAC, pnd2: Use proper I/O accessors and address space annotation > EDAC, pnd2: convert to use common P2SB accessor > > Jonathan Yong (1): > platform/x86/intel: Add Primary to Sideband (P2SB) bridge support > > Tan Jui Nee (1): > mfd: lpc_ich: Add support for pinctrl in non-ACPI system > > drivers/edac/Kconfig | 1 + > drivers/edac/pnd2_edac.c | 62 ++--- > drivers/i2c/busses/Kconfig | 1 + > drivers/i2c/busses/i2c-i801.c | 39 +--- > drivers/mfd/Kconfig | 1 + > drivers/mfd/lpc_ich.c | 136 +++++++++-- > drivers/pinctrl/intel/pinctrl-intel.c | 14 +- > drivers/platform/x86/intel/Kconfig | 12 + > drivers/platform/x86/intel/Makefile | 1 + > drivers/platform/x86/intel/p2sb.c | 305 > +++++++++++++++++++++++++ include/linux/platform_data/x86/p2sb.h | > 27 +++ 11 files changed, 500 insertions(+), 99 deletions(-) > create mode 100644 drivers/platform/x86/intel/p2sb.c > create mode 100644 include/linux/platform_data/x86/p2sb.h >
On Tue, Mar 08, 2022 at 08:50:16PM +0100, Henning Schild wrote: > Am Mon, 31 Jan 2022 17:13:38 +0200 > schrieb Andy Shevchenko <andriy.shevchenko@linux.intel.com>: > > > There are a few users and at least one more is coming (*) that would > > like to utilize P2SB mechanism of hiding and unhiding a device from > > the PCI configuration space. > > > > Here is the series to consolidate p2sb handling code for existing > > users and provide a generic way for new comer(s). > > > > It also includes a patch to enable GPIO controllers on Apollo Lake > > when it's used with ABL bootloader w/o ACPI support. > > > > The patch that bring the helper ("platform/x86/intel: Add Primary > > to Sideband (P2SB) bridge support") has a commit message that > > sheds a light on what the P2SB is and why this is needed. > > > > The changes made in v2 do not change the main idea and the > > functionality in a big scale. What we need is probably one more > > (RE-)test done by Henning. I hope to have it merged to v5.18-rc1 that > > Siemens can develop their changes based on this series. > > I did test this series and it works as expected. Only problem is that > the leds driver will not work together with the pinctrl. Because two > "in tree drivers" will try to reserve the same memory region when both > are enabled. Who wins is a matter of probing order ... Can we have your formal Tested-by tag? > If you can take my changes into your series we will not have a problem. Yes, that's the plan, but your patches needs a bit of work I believe. > Otherwise we might need to create sort of a conflict which my series > would revert when switching apl lake to gpio. > > I would not know the process, let us see what the reviews bring and how > to continue here. I'm about to comment on the patches. > Thanks so much for taking care, especially the pinctrl coming up > without ACPI really improves the simatic leds on the apl lake. You are welcome! > In fact i will have to double check if i really need the p2sb for the > 427E wdt ... but until i have an answer, p2sb works just fine. Thanks! > > I have tested this on Apollo Lake platform (I'm able to see SPI NOR > > and since we have an ACPI device for GPIO I do not see any attempts > > to recreate one). > > > > *) One in this series, and one is a due after merge in the Simatic > > IPC drivers > > > > The series may be routed either via MFD (and I guess Lee would prefer > > that) or via PDx86, whichever seems better for you, folks. As of > > today patches are ACKed by the respective maintainers, but I2C one > > and one of the MFD. > > > > Wolfram, can you ACK the patch against i2c-i801 driver, if you have no > > objections? > > > > Changes in v4: > > - added tag to the entire series (Hans) > > - added tag to pin control patch (Mika) > > - dropped PCI core changes (PCI core doesn't want modifications to be > > made) > > - as a consequence of the above merged necessary bits into p2sb.c > > - added a check that p2sb is really hidden (Hans) > > - added EDAC patches (reviewed by maintainer internally) > > > > Changes in v3: > > - resent with cover letter > > > > Changes in v2: > > - added parentheses around bus in macros (Joe) > > - added tag (Jean) > > - fixed indentation and wrapping in the header (Christoph) > > - moved out of PCI realm to PDx86 as the best common denominator > > (Bjorn) > > - added a verbose commit message to explain P2SB thingy (Bjorn) > > - converted first parameter from pci_dev to pci_bus > > - made first two parameters (bus and devfn) optional (Henning, Lee) > > - added Intel pin control patch to the series (Henning, Mika) > > - fixed English style in the commit message of one of MFD patch (Lee) > > - added tags to my MFD LPC ICH patches (Lee) > > - used consistently (c) (Lee) > > - made indexing for MFD cell and resource arrays (Lee) > > - fixed the resource size in i801 (Jean) > > > > Andy Shevchenko (6): > > pinctrl: intel: Check against matching data instead of ACPI > > companion mfd: lpc_ich: Factor out lpc_ich_enable_spi_write() > > mfd: lpc_ich: Switch to generic p2sb_bar() > > i2c: i801: convert to use common P2SB accessor > > EDAC, pnd2: Use proper I/O accessors and address space annotation > > EDAC, pnd2: convert to use common P2SB accessor > > > > Jonathan Yong (1): > > platform/x86/intel: Add Primary to Sideband (P2SB) bridge support > > > > Tan Jui Nee (1): > > mfd: lpc_ich: Add support for pinctrl in non-ACPI system > > > > drivers/edac/Kconfig | 1 + > > drivers/edac/pnd2_edac.c | 62 ++--- > > drivers/i2c/busses/Kconfig | 1 + > > drivers/i2c/busses/i2c-i801.c | 39 +--- > > drivers/mfd/Kconfig | 1 + > > drivers/mfd/lpc_ich.c | 136 +++++++++-- > > drivers/pinctrl/intel/pinctrl-intel.c | 14 +- > > drivers/platform/x86/intel/Kconfig | 12 + > > drivers/platform/x86/intel/Makefile | 1 + > > drivers/platform/x86/intel/p2sb.c | 305 > > +++++++++++++++++++++++++ include/linux/platform_data/x86/p2sb.h | > > 27 +++ 11 files changed, 500 insertions(+), 99 deletions(-) > > create mode 100644 drivers/platform/x86/intel/p2sb.c > > create mode 100644 include/linux/platform_data/x86/p2sb.h > > >
Am Wed, 4 May 2022 15:42:29 +0300 schrieb Andy Shevchenko <andriy.shevchenko@linux.intel.com>: > On Tue, Mar 08, 2022 at 08:50:16PM +0100, Henning Schild wrote: > > Am Mon, 31 Jan 2022 17:13:38 +0200 > > schrieb Andy Shevchenko <andriy.shevchenko@linux.intel.com>: > > > > > There are a few users and at least one more is coming (*) that > > > would like to utilize P2SB mechanism of hiding and unhiding a > > > device from the PCI configuration space. > > > > > > Here is the series to consolidate p2sb handling code for existing > > > users and provide a generic way for new comer(s). > > > > > > It also includes a patch to enable GPIO controllers on Apollo Lake > > > when it's used with ABL bootloader w/o ACPI support. > > > > > > The patch that bring the helper ("platform/x86/intel: Add Primary > > > to Sideband (P2SB) bridge support") has a commit message that > > > sheds a light on what the P2SB is and why this is needed. > > > > > > The changes made in v2 do not change the main idea and the > > > functionality in a big scale. What we need is probably one more > > > (RE-)test done by Henning. I hope to have it merged to v5.18-rc1 > > > that Siemens can develop their changes based on this series. > > > > I did test this series and it works as expected. Only problem is > > that the leds driver will not work together with the pinctrl. > > Because two "in tree drivers" will try to reserve the same memory > > region when both are enabled. Who wins is a matter of probing order > > ... > > Can we have your formal Tested-by tag? Sure. I will just put it here for you to take. Tested-by: Henning Schild <henning.schild@siemens.com> Let me know if you need it in another shape or form. Henning > > > If you can take my changes into your series we will not have a > > problem. > > Yes, that's the plan, but your patches needs a bit of work I believe. > > > Otherwise we might need to create sort of a conflict which my series > > would revert when switching apl lake to gpio. > > > > I would not know the process, let us see what the reviews bring and > > how to continue here. > > I'm about to comment on the patches. > > > Thanks so much for taking care, especially the pinctrl coming up > > without ACPI really improves the simatic leds on the apl lake. > > You are welcome! > > > In fact i will have to double check if i really need the p2sb for > > the 427E wdt ... but until i have an answer, p2sb works just fine. > > Thanks! > > > > I have tested this on Apollo Lake platform (I'm able to see SPI > > > NOR and since we have an ACPI device for GPIO I do not see any > > > attempts to recreate one). > > > > > > *) One in this series, and one is a due after merge in the Simatic > > > IPC drivers > > > > > > The series may be routed either via MFD (and I guess Lee would > > > prefer that) or via PDx86, whichever seems better for you, folks. > > > As of today patches are ACKed by the respective maintainers, but > > > I2C one and one of the MFD. > > > > > > Wolfram, can you ACK the patch against i2c-i801 driver, if you > > > have no objections? > > > > > > Changes in v4: > > > - added tag to the entire series (Hans) > > > - added tag to pin control patch (Mika) > > > - dropped PCI core changes (PCI core doesn't want modifications > > > to be made) > > > - as a consequence of the above merged necessary bits into p2sb.c > > > - added a check that p2sb is really hidden (Hans) > > > - added EDAC patches (reviewed by maintainer internally) > > > > > > Changes in v3: > > > - resent with cover letter > > > > > > Changes in v2: > > > - added parentheses around bus in macros (Joe) > > > - added tag (Jean) > > > - fixed indentation and wrapping in the header (Christoph) > > > - moved out of PCI realm to PDx86 as the best common denominator > > > (Bjorn) > > > - added a verbose commit message to explain P2SB thingy (Bjorn) > > > - converted first parameter from pci_dev to pci_bus > > > - made first two parameters (bus and devfn) optional (Henning, > > > Lee) > > > - added Intel pin control patch to the series (Henning, Mika) > > > - fixed English style in the commit message of one of MFD patch > > > (Lee) > > > - added tags to my MFD LPC ICH patches (Lee) > > > - used consistently (c) (Lee) > > > - made indexing for MFD cell and resource arrays (Lee) > > > - fixed the resource size in i801 (Jean) > > > > > > Andy Shevchenko (6): > > > pinctrl: intel: Check against matching data instead of ACPI > > > companion mfd: lpc_ich: Factor out lpc_ich_enable_spi_write() > > > mfd: lpc_ich: Switch to generic p2sb_bar() > > > i2c: i801: convert to use common P2SB accessor > > > EDAC, pnd2: Use proper I/O accessors and address space > > > annotation EDAC, pnd2: convert to use common P2SB accessor > > > > > > Jonathan Yong (1): > > > platform/x86/intel: Add Primary to Sideband (P2SB) bridge > > > support > > > > > > Tan Jui Nee (1): > > > mfd: lpc_ich: Add support for pinctrl in non-ACPI system > > > > > > drivers/edac/Kconfig | 1 + > > > drivers/edac/pnd2_edac.c | 62 ++--- > > > drivers/i2c/busses/Kconfig | 1 + > > > drivers/i2c/busses/i2c-i801.c | 39 +--- > > > drivers/mfd/Kconfig | 1 + > > > drivers/mfd/lpc_ich.c | 136 +++++++++-- > > > drivers/pinctrl/intel/pinctrl-intel.c | 14 +- > > > drivers/platform/x86/intel/Kconfig | 12 + > > > drivers/platform/x86/intel/Makefile | 1 + > > > drivers/platform/x86/intel/p2sb.c | 305 > > > +++++++++++++++++++++++++ include/linux/platform_data/x86/p2sb.h | > > > 27 +++ 11 files changed, 500 insertions(+), 99 deletions(-) > > > create mode 100644 drivers/platform/x86/intel/p2sb.c > > > create mode 100644 include/linux/platform_data/x86/p2sb.h > > > > > >
On Wed, May 4, 2022 at 5:10 PM Henning Schild <henning.schild@siemens.com> wrote: > Am Wed, 4 May 2022 15:42:29 +0300 > schrieb Andy Shevchenko <andriy.shevchenko@linux.intel.com>: > > On Tue, Mar 08, 2022 at 08:50:16PM +0100, Henning Schild wrote: ... > > Can we have your formal Tested-by tag? > > Sure. I will just put it here for you to take. > > Tested-by: Henning Schild <henning.schild@siemens.com> Thank you! > Let me know if you need it in another shape or form. Form is okay, just would be nice if you can retest what I have in the branch as an updated version. -- With Best Regards, Andy Shevchenko
On Wed, May 04, 2022 at 05:55:26PM +0200, Andy Shevchenko wrote: > On Wed, May 4, 2022 at 5:10 PM Henning Schild > <henning.schild@siemens.com> wrote: > > Am Wed, 4 May 2022 15:42:29 +0300 > > schrieb Andy Shevchenko <andriy.shevchenko@linux.intel.com>: > ... > > Let me know if you need it in another shape or form. > > Form is okay, just would be nice if you can retest what I have in the > branch as an updated version. Is there any news? I would like to send a new version sooner than later. We may also apply the patches from this series and when you will be ready apply yours.
There are a few users and at least one more is coming (*) that would like to utilize P2SB mechanism of hiding and unhiding a device from the PCI configuration space. Here is the series to consolidate p2sb handling code for existing users and provide a generic way for new comer(s). It also includes a patch to enable GPIO controllers on Apollo Lake when it's used with ABL bootloader w/o ACPI support. The patch that bring the helper ("platform/x86/intel: Add Primary to Sideband (P2SB) bridge support") has a commit message that sheds a light on what the P2SB is and why this is needed. The changes made in v2 do not change the main idea and the functionality in a big scale. What we need is probably one more (RE-)test done by Henning. I hope to have it merged to v5.18-rc1 that Siemens can develop their changes based on this series. I have tested this on Apollo Lake platform (I'm able to see SPI NOR and since we have an ACPI device for GPIO I do not see any attempts to recreate one). *) One in this series, and one is a due after merge in the Simatic IPC drivers The series may be routed either via MFD (and I guess Lee would prefer that) or via PDx86, whichever seems better for you, folks. As of today patches are ACKed by the respective maintainers, but I2C one and one of the MFD. Wolfram, can you ACK the patch against i2c-i801 driver, if you have no objections? Changes in v4: - added tag to the entire series (Hans) - added tag to pin control patch (Mika) - dropped PCI core changes (PCI core doesn't want modifications to be made) - as a consequence of the above merged necessary bits into p2sb.c - added a check that p2sb is really hidden (Hans) - added EDAC patches (reviewed by maintainer internally) Changes in v3: - resent with cover letter Changes in v2: - added parentheses around bus in macros (Joe) - added tag (Jean) - fixed indentation and wrapping in the header (Christoph) - moved out of PCI realm to PDx86 as the best common denominator (Bjorn) - added a verbose commit message to explain P2SB thingy (Bjorn) - converted first parameter from pci_dev to pci_bus - made first two parameters (bus and devfn) optional (Henning, Lee) - added Intel pin control patch to the series (Henning, Mika) - fixed English style in the commit message of one of MFD patch (Lee) - added tags to my MFD LPC ICH patches (Lee) - used consistently (c) (Lee) - made indexing for MFD cell and resource arrays (Lee) - fixed the resource size in i801 (Jean) Andy Shevchenko (6): pinctrl: intel: Check against matching data instead of ACPI companion mfd: lpc_ich: Factor out lpc_ich_enable_spi_write() mfd: lpc_ich: Switch to generic p2sb_bar() i2c: i801: convert to use common P2SB accessor EDAC, pnd2: Use proper I/O accessors and address space annotation EDAC, pnd2: convert to use common P2SB accessor Jonathan Yong (1): platform/x86/intel: Add Primary to Sideband (P2SB) bridge support Tan Jui Nee (1): mfd: lpc_ich: Add support for pinctrl in non-ACPI system drivers/edac/Kconfig | 1 + drivers/edac/pnd2_edac.c | 62 ++--- drivers/i2c/busses/Kconfig | 1 + drivers/i2c/busses/i2c-i801.c | 39 +--- drivers/mfd/Kconfig | 1 + drivers/mfd/lpc_ich.c | 136 +++++++++-- drivers/pinctrl/intel/pinctrl-intel.c | 14 +- drivers/platform/x86/intel/Kconfig | 12 + drivers/platform/x86/intel/Makefile | 1 + drivers/platform/x86/intel/p2sb.c | 305 +++++++++++++++++++++++++ include/linux/platform_data/x86/p2sb.h | 27 +++ 11 files changed, 500 insertions(+), 99 deletions(-) create mode 100644 drivers/platform/x86/intel/p2sb.c create mode 100644 include/linux/platform_data/x86/p2sb.h