| Message ID | 20220804184908.470216-3-shenwei.wang@nxp.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add IMX8 SCU GPIO support | expand |
On 04/08/2022 20:49, Shenwei Wang wrote: > Add the description for imx-scu gpio subnode. > > Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> > --- > Documentation/devicetree/bindings/firmware/fsl,scu.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml > index b40b0ef56978..080955b6edd8 100644 > --- a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml > +++ b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml > @@ -30,6 +30,11 @@ properties: > Clock controller node that provides the clocks controlled by the SCU > $ref: /schemas/clock/fsl,scu-clk.yaml > > + gpio: > + description: > + GPIO control over the SCU firmware APIs I don't understand this description. How GPIO can control some API? Best regards, Krzysztof
> -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Sent: Friday, August 5, 2022 1:56 AM > To: Shenwei Wang <shenwei.wang@nxp.com>; robh+dt@kernel.org; > krzysztof.kozlowski+dt@linaro.org; linus.walleij@linaro.org; brgl@bgdev.pl; > shawnguo@kernel.org; s.hauer@pengutronix.de; kernel@pengutronix.de; > festevam@gmail.com; dl-linux-imx <linux-imx@nxp.com> > Cc: devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux- > gpio@vger.kernel.org; linux-arm-kernel@lists.infradead.org > Subject: [EXT] Re: [PATCH v1 2/3] dt-bindings: firmware: imx: Add imx-scu gpio > node > > Caution: EXT Email > > On 04/08/2022 20:49, Shenwei Wang wrote: > > Add the description for imx-scu gpio subnode. > > > > Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> > > --- > > Documentation/devicetree/bindings/firmware/fsl,scu.yaml | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml > b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml > > index b40b0ef56978..080955b6edd8 100644 > > --- a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml > > +++ b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml > > @@ -30,6 +30,11 @@ properties: > > Clock controller node that provides the clocks controlled by the SCU > > $ref: /schemas/clock/fsl,scu-clk.yaml > > > > + gpio: > > + description: > > + GPIO control over the SCU firmware APIs > > I don't understand this description. How GPIO can control some API? How about change to "Control the GPIO PINs on SCU domain over the firmware APIs"? Thanks, Shenwei > > Best regards, > Krzysztof
diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml index b40b0ef56978..080955b6edd8 100644 --- a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml +++ b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml @@ -30,6 +30,11 @@ properties: Clock controller node that provides the clocks controlled by the SCU $ref: /schemas/clock/fsl,scu-clk.yaml + gpio: + description: + GPIO control over the SCU firmware APIs + $ref: /schemas/gpio/fsl,imx8-scu-gpio.yaml + ocotp: description: OCOTP controller node provided by the SCU
Add the description for imx-scu gpio subnode. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> --- Documentation/devicetree/bindings/firmware/fsl,scu.yaml | 5 +++++ 1 file changed, 5 insertions(+)