| Message ID | 20220705215213.1802496-1-mail@conchuod.ie |
|---|---|
| Headers | show |
| Series | Canaan devicetree fixes | expand |
On Tue, 05 Jul 2022 14:52:01 PDT (-0700), mail@conchuod.ie wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > Hey all, > This series should rid us of dtbs_check errors for the RISC-V Canaan k210 > based boards. To make keeping it that way a little easier, I changed the > Canaan devicetree Makefile so that it would build all of the devicetrees > in the directory if SOC_CANAAN. > > I *DO NOT* have any Canaan hardware so I have not tested any of this in > action. Since I sent v1, I tried to buy some since it's cheap - but could > out of the limited stockists none seemed to want to deliver to Ireland :( > I based the series on next-20220617. > > Thanks, > Conor. > > Changes since v4: > - add Rob's tags from v3 > - sram: rephrase the binding description > - ASoC: dropped the applied binding > > Changes since v3: > - dts: drop the bogus "regs" property pointed out by Niklas > - dma/timer: add Serge's reviews (and expand on the dma interrupt > description) > - dts: add Niklas' T-b where I felt it was suitable. lmk if you think it > applies more broadly > - spi: drop the applied spi dt-binding change. Thanks Mark. > > Changes since v2: > - i2s: added clocks maxItems > - dma: unconditionally extended the interrupts & dropped canaan > compatible > - timer: as per Sergey, split the timer dts nodes in 2 & drop the > binding patch > - ili9341: add a canaan specific compatible to the binding and dts > > Changes since v1: > - I added a new dt node & compatible for the SRAM memory controller due > Damien's wish to preserve the inter-op with U-Boot. > - The dw-apb-ssi binding now uses the default rx/tx widths > - A new patch fixes bus {ranges,reg} warnings > - Rearranged the patches in a slightly more logical order > > Conor Dooley (13): > dt-bindings: display: convert ilitek,ili9341.txt to dt-schema > dt-bindings: display: ili9341: document canaan kd233's lcd > dt-bindings: dma: dw-axi-dmac: extend the number of interrupts > dt-bindings: memory-controllers: add canaan k210 sram controller > riscv: dts: canaan: fix the k210's memory node > riscv: dts: canaan: fix the k210's timer nodes > riscv: dts: canaan: fix mmc node names > riscv: dts: canaan: fix kd233 display spi frequency > riscv: dts: canaan: use custom compatible for k210 i2s > riscv: dts: canaan: remove spi-max-frequency from controllers > riscv: dts: canaan: fix bus {ranges,reg} warnings > riscv: dts: canaan: add specific compatible for kd233's LCD > riscv: dts: canaan: build all devicetress if SOC_CANAAN > > .../bindings/display/ilitek,ili9341.txt | 27 ------- > .../display/panel/ilitek,ili9341.yaml | 49 +++++++++---- > .../bindings/dma/snps,dw-axi-dmac.yaml | 7 +- > .../memory-controllers/canaan,k210-sram.yaml | 52 +++++++++++++ > arch/riscv/boot/dts/canaan/Makefile | 10 ++- > arch/riscv/boot/dts/canaan/canaan_kd233.dts | 6 +- > arch/riscv/boot/dts/canaan/k210.dtsi | 73 +++++++++++++------ > .../riscv/boot/dts/canaan/sipeed_maix_bit.dts | 2 +- > .../boot/dts/canaan/sipeed_maix_dock.dts | 2 +- > arch/riscv/boot/dts/canaan/sipeed_maix_go.dts | 2 +- > .../boot/dts/canaan/sipeed_maixduino.dts | 2 +- > 11 files changed, 159 insertions(+), 73 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/display/ilitek,ili9341.txt > create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml I'm trying to sort out how to merge this one. I'm not opposed to taking it through the RISC-V tree as Rob's reviewed/acked the bindings, but just figured I'd say something before putting anything on for-next to try and minimize confusion. Unless I'm missing something it's just patch 3 that's been taken so far, via Vinod's tree. I've dropped that one and put the rest on palmer/riscv-canaan_dt_schema, if that looks good then I'll take it into riscv/for-next when this loops back to the top of my queue. Thanks!
On 14/07/2022 23:11, Conor Dooley - M52691 wrote: > On 14/07/2022 23:04, Palmer Dabbelt wrote: >> I'm trying to sort out how to merge this one. I'm not opposed to taking it through the RISC-V tree as Rob's reviewed/acked the bindings, but just figured I'd say something before putting anything on for-next to try and minimize confusion. >> >> Unless I'm missing something it's just patch 3 that's been taken so far, via Vinod's tree. I've dropped that one and put the rest on palmer/riscv-canaan_dt_schema, if that looks good then I'll take it into riscv/for-next when this loops back to the top of my queue. >> >> Thanks! > > Patches 1 & 2 never got review from the DRM side and patch 12 > depends on those. If it comes to it, you could drop those three > (and patch 3 that Vinod took). The only other one is patch 4, > which has Krzysztof's ack as memory-controller maintainer, so > that one should be okay. Hey Palmer, These fixes have been sitting on palmer/riscv-canaan_dt_schema for a few weeks now, without an autobuilder complaint etc. Could you move it onto for-next? Would be nice to clear these up for 6.0 :) Thanks, Conor.
On Fri, 05 Aug 2022 10:51:00 PDT (-0700), Conor.Dooley@microchip.com wrote: > On 14/07/2022 23:11, Conor Dooley - M52691 wrote: >> On 14/07/2022 23:04, Palmer Dabbelt wrote: >>> I'm trying to sort out how to merge this one. I'm not opposed to taking it through the RISC-V tree as Rob's reviewed/acked the bindings, but just figured I'd say something before putting anything on for-next to try and minimize confusion. >>> >>> Unless I'm missing something it's just patch 3 that's been taken so far, via Vinod's tree. I've dropped that one and put the rest on palmer/riscv-canaan_dt_schema, if that looks good then I'll take it into riscv/for-next when this loops back to the top of my queue. >>> >>> Thanks! >> >> Patches 1 & 2 never got review from the DRM side and patch 12 >> depends on those. If it comes to it, you could drop those three >> (and patch 3 that Vinod took). The only other one is patch 4, >> which has Krzysztof's ack as memory-controller maintainer, so >> that one should be okay. > > Hey Palmer, > These fixes have been sitting on palmer/riscv-canaan_dt_schema for > a few weeks now, without an autobuilder complaint etc. Could you > move it onto for-next? These are on for-next.
On 10/08/2022 23:01, Palmer Dabbelt wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On Fri, 05 Aug 2022 10:51:00 PDT (-0700), Conor.Dooley@microchip.com wrote: >> On 14/07/2022 23:11, Conor Dooley - M52691 wrote: >>> On 14/07/2022 23:04, Palmer Dabbelt wrote: >>>> I'm trying to sort out how to merge this one. I'm not opposed to taking it through the RISC-V tree as Rob's reviewed/acked the bindings, but just figured I'd say something before putting anything on for-next to try and minimize confusion. >>>> >>>> Unless I'm missing something it's just patch 3 that's been taken so far, via Vinod's tree. I've dropped that one and put the rest on palmer/riscv-canaan_dt_schema, if that looks good then I'll take it into riscv/for-next when this loops back to the top of my queue. >>>> >>>> Thanks! >>> >>> Patches 1 & 2 never got review from the DRM side and patch 12 >>> depends on those. If it comes to it, you could drop those three >>> (and patch 3 that Vinod took). The only other one is patch 4, >>> which has Krzysztof's ack as memory-controller maintainer, so >>> that one should be okay. >> >> Hey Palmer, >> These fixes have been sitting on palmer/riscv-canaan_dt_schema for >> a few weeks now, without an autobuilder complaint etc. Could you >> move it onto for-next? > > These are on for-next. Sweet, nearly clear of dtbs_check problems now :) Thanks!
From: Conor Dooley <conor.dooley@microchip.com> Hey all, This series should rid us of dtbs_check errors for the RISC-V Canaan k210 based boards. To make keeping it that way a little easier, I changed the Canaan devicetree Makefile so that it would build all of the devicetrees in the directory if SOC_CANAAN. I *DO NOT* have any Canaan hardware so I have not tested any of this in action. Since I sent v1, I tried to buy some since it's cheap - but could out of the limited stockists none seemed to want to deliver to Ireland :( I based the series on next-20220617. Thanks, Conor. Changes since v4: - add Rob's tags from v3 - sram: rephrase the binding description - ASoC: dropped the applied binding Changes since v3: - dts: drop the bogus "regs" property pointed out by Niklas - dma/timer: add Serge's reviews (and expand on the dma interrupt description) - dts: add Niklas' T-b where I felt it was suitable. lmk if you think it applies more broadly - spi: drop the applied spi dt-binding change. Thanks Mark. Changes since v2: - i2s: added clocks maxItems - dma: unconditionally extended the interrupts & dropped canaan compatible - timer: as per Sergey, split the timer dts nodes in 2 & drop the binding patch - ili9341: add a canaan specific compatible to the binding and dts Changes since v1: - I added a new dt node & compatible for the SRAM memory controller due Damien's wish to preserve the inter-op with U-Boot. - The dw-apb-ssi binding now uses the default rx/tx widths - A new patch fixes bus {ranges,reg} warnings - Rearranged the patches in a slightly more logical order Conor Dooley (13): dt-bindings: display: convert ilitek,ili9341.txt to dt-schema dt-bindings: display: ili9341: document canaan kd233's lcd dt-bindings: dma: dw-axi-dmac: extend the number of interrupts dt-bindings: memory-controllers: add canaan k210 sram controller riscv: dts: canaan: fix the k210's memory node riscv: dts: canaan: fix the k210's timer nodes riscv: dts: canaan: fix mmc node names riscv: dts: canaan: fix kd233 display spi frequency riscv: dts: canaan: use custom compatible for k210 i2s riscv: dts: canaan: remove spi-max-frequency from controllers riscv: dts: canaan: fix bus {ranges,reg} warnings riscv: dts: canaan: add specific compatible for kd233's LCD riscv: dts: canaan: build all devicetress if SOC_CANAAN .../bindings/display/ilitek,ili9341.txt | 27 ------- .../display/panel/ilitek,ili9341.yaml | 49 +++++++++---- .../bindings/dma/snps,dw-axi-dmac.yaml | 7 +- .../memory-controllers/canaan,k210-sram.yaml | 52 +++++++++++++ arch/riscv/boot/dts/canaan/Makefile | 10 ++- arch/riscv/boot/dts/canaan/canaan_kd233.dts | 6 +- arch/riscv/boot/dts/canaan/k210.dtsi | 73 +++++++++++++------ .../riscv/boot/dts/canaan/sipeed_maix_bit.dts | 2 +- .../boot/dts/canaan/sipeed_maix_dock.dts | 2 +- arch/riscv/boot/dts/canaan/sipeed_maix_go.dts | 2 +- .../boot/dts/canaan/sipeed_maixduino.dts | 2 +- 11 files changed, 159 insertions(+), 73 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/ilitek,ili9341.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml base-commit: b6f1f2fa2bddd69ff46a190b8120bd440fd50563