| Message ID | 20220901203422.217-3-quic_jesszhan@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add support for HDR color formats | expand |
On Thu, Sep 1, 2022 at 1:34 PM Jessica Zhang <quic_jesszhan@quicinc.com> wrote: > > Add support for P010 color format. This adds support for both linear and > compressed formats. > > Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Rob Clark <robdclark@gmail.com> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 17 ++++++++++++++++- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 + > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 1 + > 3 files changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c > index 57971c08f57c..d95540309d4d 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c > @@ -434,6 +434,12 @@ static const struct dpu_format dpu_format_map[] = { > DPU_CHROMA_H2V1, DPU_FORMAT_FLAG_YUV, > DPU_FETCH_LINEAR, 2), > > + PSEUDO_YUV_FMT_LOOSE(P010, > + 0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, > + C1_B_Cb, C2_R_Cr, > + DPU_CHROMA_420, DPU_FORMAT_FLAG_DX | DPU_FORMAT_FLAG_YUV, > + DPU_FETCH_LINEAR, 2), > + > INTERLEAVED_YUV_FMT(VYUY, > 0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, > C2_R_Cr, C0_G_Y, C1_B_Cb, C0_G_Y, > @@ -536,6 +542,14 @@ static const struct dpu_format dpu_format_map_ubwc[] = { > DPU_CHROMA_420, DPU_FORMAT_FLAG_YUV | > DPU_FORMAT_FLAG_COMPRESSED, > DPU_FETCH_UBWC, 4, DPU_TILE_HEIGHT_NV12), > + > + PSEUDO_YUV_FMT_TILED(P010, > + 0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, > + C1_B_Cb, C2_R_Cr, > + DPU_CHROMA_420, DPU_FORMAT_FLAG_DX | > + DPU_FORMAT_FLAG_YUV | > + DPU_FORMAT_FLAG_COMPRESSED, > + DPU_FETCH_UBWC, 4, DPU_TILE_HEIGHT_UBWC), > }; > > /* _dpu_get_v_h_subsample_rate - Get subsample rates for all formats we support > @@ -584,7 +598,8 @@ static int _dpu_format_get_media_color_ubwc(const struct dpu_format *fmt) > int color_fmt = -1; > int i; > > - if (fmt->base.pixel_format == DRM_FORMAT_NV12) { > + if (fmt->base.pixel_format == DRM_FORMAT_NV12 || > + fmt->base.pixel_format == DRM_FORMAT_P010) { > if (DPU_FORMAT_IS_DX(fmt)) { > if (fmt->unpack_tight) > color_fmt = COLOR_FMT_NV12_BPP10_UBWC; > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > index 53b6edb2f563..199a2f755db4 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > @@ -210,6 +210,7 @@ static const uint32_t plane_formats_yuv[] = { > DRM_FORMAT_RGBX4444, > DRM_FORMAT_BGRX4444, > > + DRM_FORMAT_P010, > DRM_FORMAT_NV12, > DRM_FORMAT_NV21, > DRM_FORMAT_NV16, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > index 60ea834dc8d6..f130bf783081 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > @@ -73,6 +73,7 @@ static const uint32_t qcom_compressed_supported_formats[] = { > DRM_FORMAT_BGR565, > > DRM_FORMAT_NV12, > + DRM_FORMAT_P010, > }; > > /** > -- > 2.35.1 >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c index 57971c08f57c..d95540309d4d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c @@ -434,6 +434,12 @@ static const struct dpu_format dpu_format_map[] = { DPU_CHROMA_H2V1, DPU_FORMAT_FLAG_YUV, DPU_FETCH_LINEAR, 2), + PSEUDO_YUV_FMT_LOOSE(P010, + 0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, + C1_B_Cb, C2_R_Cr, + DPU_CHROMA_420, DPU_FORMAT_FLAG_DX | DPU_FORMAT_FLAG_YUV, + DPU_FETCH_LINEAR, 2), + INTERLEAVED_YUV_FMT(VYUY, 0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, C2_R_Cr, C0_G_Y, C1_B_Cb, C0_G_Y, @@ -536,6 +542,14 @@ static const struct dpu_format dpu_format_map_ubwc[] = { DPU_CHROMA_420, DPU_FORMAT_FLAG_YUV | DPU_FORMAT_FLAG_COMPRESSED, DPU_FETCH_UBWC, 4, DPU_TILE_HEIGHT_NV12), + + PSEUDO_YUV_FMT_TILED(P010, + 0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, + C1_B_Cb, C2_R_Cr, + DPU_CHROMA_420, DPU_FORMAT_FLAG_DX | + DPU_FORMAT_FLAG_YUV | + DPU_FORMAT_FLAG_COMPRESSED, + DPU_FETCH_UBWC, 4, DPU_TILE_HEIGHT_UBWC), }; /* _dpu_get_v_h_subsample_rate - Get subsample rates for all formats we support @@ -584,7 +598,8 @@ static int _dpu_format_get_media_color_ubwc(const struct dpu_format *fmt) int color_fmt = -1; int i; - if (fmt->base.pixel_format == DRM_FORMAT_NV12) { + if (fmt->base.pixel_format == DRM_FORMAT_NV12 || + fmt->base.pixel_format == DRM_FORMAT_P010) { if (DPU_FORMAT_IS_DX(fmt)) { if (fmt->unpack_tight) color_fmt = COLOR_FMT_NV12_BPP10_UBWC; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 53b6edb2f563..199a2f755db4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -210,6 +210,7 @@ static const uint32_t plane_formats_yuv[] = { DRM_FORMAT_RGBX4444, DRM_FORMAT_BGRX4444, + DRM_FORMAT_P010, DRM_FORMAT_NV12, DRM_FORMAT_NV21, DRM_FORMAT_NV16, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 60ea834dc8d6..f130bf783081 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -73,6 +73,7 @@ static const uint32_t qcom_compressed_supported_formats[] = { DRM_FORMAT_BGR565, DRM_FORMAT_NV12, + DRM_FORMAT_P010, }; /**
Add support for P010 color format. This adds support for both linear and compressed formats. Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 17 ++++++++++++++++- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 1 + 3 files changed, 18 insertions(+), 1 deletion(-)