| Message ID | 20221216233408.1283581-4-marijn.suijten@somainline.org |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: qcom: sm6125: QUPs, SPI and Seine I2C buses | expand |
On 17.12.2022 00:34, Marijn Suijten wrote: > Enable I2C Serial Engines 1, 2 and 3 which are known to have hardware > connected to them, leaving the rest disabled to save on power. For > this, only GPI DMA 0 and QUP 0 need to be enabled, as nothing seems to > be connected to Serial Engines on GPU DMA 1 / QUP 1. Beyond this > downstream only defines a UART console available on Serial Engine 4 > which also resides on QUP 0. > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > .../qcom/sm6125-sony-xperia-seine-pdx201.dts | 29 +++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts > index 1b9e40d3d269..b1de85d8f1c8 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts > +++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts > @@ -141,10 +141,35 @@ active-config0 { > }; > }; > > +&gpi_dma0 { > + status = "okay"; > +}; > + > &hsusb_phy1 { > status = "okay"; > }; > > +&i2c1 { > + clock-frequency = <400000>; > + status = "okay"; > + > + /* NXP PN553 NFC @ 28 */ > +}; > + > +&i2c2 { > + clock-frequency = <400000>; > + status = "okay"; > + > + /* Samsung touchscreen @ 48 */ > +}; > + > +&i2c3 { > + clock-frequency = <1000000>; > + status = "okay"; > + > + /* Cirrus Logic CS35L41 boosted audio amplifier @ 40 */ > +}; > + > &pm6125_adc { > pinctrl-names = "default"; > pinctrl-0 = <&camera_flash_therm &emmc_ufs_therm &rf_pa1_therm>; > @@ -246,6 +271,10 @@ &pon_resin { > linux,code = <KEY_VOLUMEUP>; > }; > > +&qupv3_id_0 { > + status = "okay"; > +}; > + > &sdc2_off_state { > sd-cd-pins { > pins = "gpio98";
On Sat, Dec 17 2022 at 12:34:08 AM +01:00:00, Marijn Suijten <marijn.suijten@somainline.org> wrote: > Enable I2C Serial Engines 1, 2 and 3 which are known to have hardware > connected to them, leaving the rest disabled to save on power. For > this, only GPI DMA 0 and QUP 0 need to be enabled, as nothing seems to > be connected to Serial Engines on GPU DMA 1 / QUP 1. Beyond this > downstream only defines a UART console available on Serial Engine 4 > which also resides on QUP 0. > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > .../qcom/sm6125-sony-xperia-seine-pdx201.dts | 29 > +++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git > a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts > b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts > index 1b9e40d3d269..b1de85d8f1c8 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts > +++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts > @@ -141,10 +141,35 @@ active-config0 { > }; > }; > > +&gpi_dma0 { > + status = "okay"; > +}; > + > &hsusb_phy1 { > status = "okay"; > }; > > +&i2c1 { > + clock-frequency = <400000>; > + status = "okay"; > + > + /* NXP PN553 NFC @ 28 */ > +}; > + > +&i2c2 { > + clock-frequency = <400000>; > + status = "okay"; > + > + /* Samsung touchscreen @ 48 */ > +}; > + > +&i2c3 { > + clock-frequency = <1000000>; > + status = "okay"; > + > + /* Cirrus Logic CS35L41 boosted audio amplifier @ 40 */ > +}; > + > &pm6125_adc { > pinctrl-names = "default"; > pinctrl-0 = <&camera_flash_therm &emmc_ufs_therm &rf_pa1_therm>; > @@ -246,6 +271,10 @@ &pon_resin { > linux,code = <KEY_VOLUMEUP>; > }; > > +&qupv3_id_0 { > + status = "okay"; > +}; > + > &sdc2_off_state { > sd-cd-pins { > pins = "gpio98"; > -- > 2.39.0 > Reviewed-by: Martin Botka <martin.botka@somainline.org> -Martin
diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts index 1b9e40d3d269..b1de85d8f1c8 100644 --- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts +++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts @@ -141,10 +141,35 @@ active-config0 { }; }; +&gpi_dma0 { + status = "okay"; +}; + &hsusb_phy1 { status = "okay"; }; +&i2c1 { + clock-frequency = <400000>; + status = "okay"; + + /* NXP PN553 NFC @ 28 */ +}; + +&i2c2 { + clock-frequency = <400000>; + status = "okay"; + + /* Samsung touchscreen @ 48 */ +}; + +&i2c3 { + clock-frequency = <1000000>; + status = "okay"; + + /* Cirrus Logic CS35L41 boosted audio amplifier @ 40 */ +}; + &pm6125_adc { pinctrl-names = "default"; pinctrl-0 = <&camera_flash_therm &emmc_ufs_therm &rf_pa1_therm>; @@ -246,6 +271,10 @@ &pon_resin { linux,code = <KEY_VOLUMEUP>; }; +&qupv3_id_0 { + status = "okay"; +}; + &sdc2_off_state { sd-cd-pins { pins = "gpio98";
Enable I2C Serial Engines 1, 2 and 3 which are known to have hardware connected to them, leaving the rest disabled to save on power. For this, only GPI DMA 0 and QUP 0 need to be enabled, as nothing seems to be connected to Serial Engines on GPU DMA 1 / QUP 1. Beyond this downstream only defines a UART console available on Serial Engine 4 which also resides on QUP 0. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> --- .../qcom/sm6125-sony-xperia-seine-pdx201.dts | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+)