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[v4,0/8] SM6(11|12|37)5 GPUCC

Message ID 20230130235926.2419776-1-konrad.dybcio@linaro.org
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Series SM6(11|12|37)5 GPUCC | expand

Message

Konrad Dybcio Jan. 30, 2023, 11:59 p.m. UTC 
This series brings GPUCC support and the correlated bindings for
three midrange SoCs, all of which host a GMU-less A6xx GPU.

v4 only brings a tiny bindings amend to [7/8].. I thought I could
fix it without running dt_binding_check but oh was I humbled again..

v3: https://lore.kernel.org/linux-arm-msm/20230130153252.2310882-1-konrad.dybcio@linaro.org/T/#t

Konrad Dybcio (8):
  clk: qcom: branch: Add helper functions for setting retain bits
  clk: qcom: branch: Add SLEEP/WAKE fields definitions
  dt-bindings: clock: Add Qcom SM6125 GPUCC
  clk: qcom: Add GPU clock controller driver for SM6125
  dt-bindings: clock: Add Qcom SM6375 GPUCC
  clk: qcom: Add GPU clock controller driver for SM6375
  dt-bindings: clock: Add Qcom SM6115 GPUCC
  clk: qcom: Add GPU clock controller driver for SM6115

 .../bindings/clock/qcom,sm6115-gpucc.yaml     |  58 ++
 .../bindings/clock/qcom,sm6125-gpucc.yaml     |  64 +++
 .../bindings/clock/qcom,sm6375-gpucc.yaml     |  60 ++
 drivers/clk/qcom/Kconfig                      |  27 +
 drivers/clk/qcom/Makefile                     |   3 +
 drivers/clk/qcom/clk-branch.h                 |  25 +
 drivers/clk/qcom/gpucc-sm6115.c               | 512 ++++++++++++++++++
 drivers/clk/qcom/gpucc-sm6125.c               | 424 +++++++++++++++
 drivers/clk/qcom/gpucc-sm6375.c               | 469 ++++++++++++++++
 include/dt-bindings/clock/qcom,sm6115-gpucc.h |  36 ++
 include/dt-bindings/clock/qcom,sm6125-gpucc.h |  31 ++
 include/dt-bindings/clock/qcom,sm6375-gpucc.h |  36 ++
 12 files changed, 1745 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml
 create mode 100644 drivers/clk/qcom/gpucc-sm6115.c
 create mode 100644 drivers/clk/qcom/gpucc-sm6125.c
 create mode 100644 drivers/clk/qcom/gpucc-sm6375.c
 create mode 100644 include/dt-bindings/clock/qcom,sm6115-gpucc.h
 create mode 100644 include/dt-bindings/clock/qcom,sm6125-gpucc.h
 create mode 100644 include/dt-bindings/clock/qcom,sm6375-gpucc.h

Comments

Konrad Dybcio Jan. 31, 2023, 12:37 p.m. UTC | #1 
On 31.01.2023 10:00, Dmitry Baryshkov wrote:
> On 31/01/2023 01:59, Konrad Dybcio wrote:
>> Add support for the GPU clock controller found on SM6125.
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> ---
[...]

>> +    /* Set recommended WAKEUP/SLEEP settings for the gpu_cc_cx_gmu_clk */
>> +    regmap_update_bits(regmap, gpu_cc_cx_gmu_clk.clkr.enable_reg, CBCR_WAKEUP, 0xf);
>> +    regmap_update_bits(regmap, gpu_cc_cx_gmu_clk.clkr.enable_reg, CBCR_SLEEP, 0xf);
> 
> I think you have to use FIELD_PREP here. regmap_update_bits doesn't shift the value according to the mask, does it?
> 
You're right.

Konrad
>> +
>> +    qcom_branch_set_force_mem_core(regmap, gpu_cc_gx_gfx3d_clk.halt_reg, true);
>> +    qcom_branch_set_force_periph_on(regmap, gpu_cc_gx_gfx3d_clk.halt_reg, true);
>> +
>> +    return qcom_cc_really_probe(pdev, &gpu_cc_sm6125_desc, regmap);
>> +}
>> +
>> +static struct platform_driver gpu_cc_sm6125_driver = {
>> +    .probe = gpu_cc_sm6125_probe,
>> +    .driver = {
>> +        .name = "gpucc-sm6125",
>> +        .of_match_table = gpu_cc_sm6125_match_table,
>> +    },
>> +};
>> +module_platform_driver(gpu_cc_sm6125_driver);
>> +
>> +MODULE_DESCRIPTION("QTI GPUCC SM6125 Driver");
>> +MODULE_LICENSE("GPL");
>