mbox series

[V4,0/9] Added Standard mode and SMBus support.

Message ID 1675330898-563-1-git-send-email-manikanta.guntupalli@amd.com
Headers show
Series Added Standard mode and SMBus support. | expand

Message

Manikanta Guntupalli Feb. 2, 2023, 9:41 a.m. UTC 
-Added standard mode for AXI I2C controller.
-Added Smbus block read support to xiic driver.
-Added 'xlnx,axi-iic-2.1' new IP version support.
-Added dynamic SCL frequency configuration support.
-Removed 'local_irq_save/restore' calls as discussed
 here: https://www.spinics.net/lists/linux-i2c/msg46483.html.

Raviteja Narayanam (9):
  i2c: xiic: Add standard mode support for > 255 byte
  i2c: xiic: Fix Rx and Tx paths in standard mode
  i2c: xiic: Switch to Xiic standard mode for i2c-read
  i2c: xiic: Add wait for FIFO empty in send_tx
  i2c: xiic: Add smbus_block_read functionality
  i2c: xiic: Remove interrupt enable/disable in Rx path
  dt-bindings: i2c: xiic: Add 'xlnx,axi-iic-2.1' to
  i2c: xiic: Update compatible with new IP version
  i2c: xiic: Add SCL frequency configuration support
---
Changes for V2:
Updated in changelog of respective patch
Changes for V3:
Acked-by michal
Changes for V4:
Added description for clock-frequency in xlnx,xps-iic-2.00.a.yaml

 .../bindings/i2c/xlnx,xps-iic-2.00.a.yaml     |   8 +-
 drivers/i2c/busses/i2c-xiic.c                 | 582 ++++++++++++++++--
 2 files changed, 538 insertions(+), 52 deletions(-)

Comments

Wolfram Sang Feb. 3, 2023, 4:35 p.m. UTC | #1 
On Thu, Feb 02, 2023 at 03:11:30PM +0530, Manikanta Guntupalli wrote:
> From: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
> 
> read transfers
> 
> Added standard mode for AXI I2C controller to enable read transfers
> of size more than 255 bytes. The driver selects standard mode in the
> following scenarios.
> 
> 1. If a single message request comes from user space, requesting a
> read of more than 255 bytes
> 
> 2. If a message set request comes from user space consisting of many
> messages and if any one of them is a read operation, irrespective
> of the size of transfer. (This is done because it is observed that
> repeated start operation is not happening in dynamic mode read as
> expected in a message set request from user space.)
> 
> Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
> Acked-by: Michal Simek <michal.simek@amd.com>

Applied to for-next, thanks!
Wolfram Sang Feb. 3, 2023, 4:35 p.m. UTC | #2 
On Thu, Feb 02, 2023 at 03:11:32PM +0530, Manikanta Guntupalli wrote:
> From: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
> 
> Xilinx I2C IP has two modes of operation, both of which implement
> I2C transactions. The only difference from sw perspective is the
> programming sequence for these modes.
> Dynamic mode  -> Simple to program, less number of steps in sequence.
> Standard mode -> Gives flexibility, more number of steps in sequence.
> 
> In dynamic mode, during the i2c-read transactions, if there is a
> delay(> 200us) between the register writes (address & byte count),
> read transaction fails. On a system with load, this scenario is
> occurring frequently.
> To avoid this, switch to standard mode if there is a read request.
> 
> Added a quirk to identify the IP version effected by this and follow
> the standard mode.
> 
> Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
> Acked-by: Michal Simek <michal.simek@amd.com>

Applied to for-next, thanks!