mbox series

[v4,0/4] Reserve DSPPs based on user request

Message ID 1676286704-818-1-git-send-email-quic_kalyant@quicinc.com
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Series Reserve DSPPs based on user request | expand

Message

Kalyan Thota Feb. 13, 2023, 11:11 a.m. UTC
This series will enable color features on sc7280 target which has 
primary panel as eDP

The series removes DSPP allocation based on encoder type and allows 
the DSPP reservation based on user request via CTM.

The series will release/reserve the dpu resources whenever there is 
a CTM enable/disable change so that DSPPs are allocated appropriately.

Kalyan Thota (4):
  drm/msm/dpu: clear DSPP reservations in rm release
  drm/msm/dpu: add DSPPs into reservation upon a CTM request
  drm/msm/dpu: avoid unnecessary check in DPU reservations
  drm/msm/dpu: manage DPU resources if CTM is requested

 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 38 ++++++++++++-----------------
 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c      |  2 ++
 drivers/gpu/drm/msm/msm_atomic.c            | 18 ++++++++++++++
 drivers/gpu/drm/msm/msm_drv.c               |  2 +-
 drivers/gpu/drm/msm/msm_drv.h               |  1 +
 5 files changed, 38 insertions(+), 23 deletions(-)

Comments

Dmitry Baryshkov Feb. 17, 2023, 10:26 p.m. UTC | #1
On 13/02/2023 13:11, Kalyan Thota wrote:
> Allow modeset to be triggered during CTM enable/disable.
> In the modeset callbacks, DPU resources required for the
> CTM feature are managed appropriately.
> 
> Signed-off-by: Kalyan Thota <quic_kalyant@quicinc.com>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

> ---
>   drivers/gpu/drm/msm/msm_atomic.c | 18 ++++++++++++++++++
>   drivers/gpu/drm/msm/msm_drv.c    |  2 +-
>   drivers/gpu/drm/msm/msm_drv.h    |  1 +
>   3 files changed, 20 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
> index 1686fbb..e3e607c 100644
> --- a/drivers/gpu/drm/msm/msm_atomic.c
> +++ b/drivers/gpu/drm/msm/msm_atomic.c
> @@ -179,6 +179,24 @@ static unsigned get_crtc_mask(struct drm_atomic_state *state)
>   	return mask;
>   }
>   
> +int msm_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
> +{
> +	struct drm_crtc_state *old_crtc_state, *new_crtc_state;
> +	struct drm_crtc *crtc;
> +	int i;
> +

I hope this can be gone for good if at some point we have CRTC resource 
allocation split from encoder resource alloc.

> +	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
> +				      new_crtc_state, i) {
> +		if ((old_crtc_state->ctm && !new_crtc_state->ctm) ||
> +		    (!old_crtc_state->ctm && new_crtc_state->ctm)) {
> +			new_crtc_state->mode_changed = true;
> +			state->allow_modeset = true;
> +		}
> +	}
> +
> +	return drm_atomic_helper_check(dev, state);
> +}
> +
>   void msm_atomic_commit_tail(struct drm_atomic_state *state)
>   {
>   	struct drm_device *dev = state->dev;
> diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
> index 0759e2d..3221284 100644
> --- a/drivers/gpu/drm/msm/msm_drv.c
> +++ b/drivers/gpu/drm/msm/msm_drv.c
> @@ -52,7 +52,7 @@
>   static const struct drm_mode_config_funcs mode_config_funcs = {
>   	.fb_create = msm_framebuffer_create,
>   	.output_poll_changed = drm_fb_helper_output_poll_changed,
> -	.atomic_check = drm_atomic_helper_check,
> +	.atomic_check = msm_atomic_check,
>   	.atomic_commit = drm_atomic_helper_commit,
>   };
>   
> diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
> index ea80846..7d0243a 100644
> --- a/drivers/gpu/drm/msm/msm_drv.h
> +++ b/drivers/gpu/drm/msm/msm_drv.h
> @@ -209,6 +209,7 @@ int msm_atomic_init_pending_timer(struct msm_pending_timer *timer,
>   		struct msm_kms *kms, int crtc_idx);
>   void msm_atomic_destroy_pending_timer(struct msm_pending_timer *timer);
>   void msm_atomic_commit_tail(struct drm_atomic_state *state);
> +int msm_atomic_check(struct drm_device *dev, struct drm_atomic_state *state);
>   struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
>   void msm_atomic_state_clear(struct drm_atomic_state *state);
>   void msm_atomic_state_free(struct drm_atomic_state *state);