| Message ID | 20230815141908.1084893-2-robimarko@gmail.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/2] dt-bindings: watchdog: qcom-wdt: document IPQ5018 | expand |
On Tue, 15 Aug 2023 at 16:40, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 15/08/2023 16:17, Robert Marko wrote: > > Add the required DT node for WDT operation. > > > > Signed-off-by: Robert Marko <robimarko@gmail.com> > > --- > > arch/arm64/boot/dts/qcom/ipq5018.dtsi | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi > > index 3285c86824cf..168322bfb11c 100644 > > --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi > > +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi > > @@ -182,6 +182,13 @@ v2m1: v2m@1000 { > > }; > > }; > > > > + watchdog: watchdog@b017000 { > > + compatible = "qcom,apss-wdt-ipq5018", "qcom,kpss-wdt"; > > + interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>; > > I think all GIC_SPI interrupts are level high. They are most probably using GIC-500 which supports rising edge or active high interrupts. Both the older GIC-400 and newer GIC-600 also support the same. Vendor DTS indicates this level, IPQ8074 and IPQ6018 which use the same core, and it seems the same WDT IP use the rising edge IRQ. > > > + reg = <0x0b017000 0x40>; > > Keep the reg as second property. Ok, will do. Regards, Robert > > > + clocks = <&sleep_clk>; > > + }; > > Best regards, > Krzysztof >
On 15/08/2023 17:38, Robert Marko wrote: > On Tue, 15 Aug 2023 at 16:40, Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org> wrote: >> >> On 15/08/2023 16:17, Robert Marko wrote: >>> Add the required DT node for WDT operation. >>> >>> Signed-off-by: Robert Marko <robimarko@gmail.com> >>> --- >>> arch/arm64/boot/dts/qcom/ipq5018.dtsi | 7 +++++++ >>> 1 file changed, 7 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi >>> index 3285c86824cf..168322bfb11c 100644 >>> --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi >>> @@ -182,6 +182,13 @@ v2m1: v2m@1000 { >>> }; >>> }; >>> >>> + watchdog: watchdog@b017000 { >>> + compatible = "qcom,apss-wdt-ipq5018", "qcom,kpss-wdt"; >>> + interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>; >> >> I think all GIC_SPI interrupts are level high. > > They are most probably using GIC-500 which supports rising edge or > active high interrupts. > Both the older GIC-400 and newer GIC-600 also support the same. > > Vendor DTS indicates this level, IPQ8074 and IPQ6018 which use the > same core, and it > seems the same WDT IP use the rising edge IRQ. > That's ok, but now I see missing Cc to DT, so standard message goes: Please use scripts/get_maintainers.pl to get a list of necessary people and lists to CC. It might happen, that command when run on an older kernel, gives you outdated entries. Therefore please be sure you base your patches on recent Linux kernel. You missed at least DT list (maybe more), so this won't be tested by automated tooling. Performing review on untested code might be a waste of time, thus I will skip this patch entirely till you follow the process allowing the patch to be tested. Please kindly resend and include all necessary To/Cc entries. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi index 3285c86824cf..168322bfb11c 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -182,6 +182,13 @@ v2m1: v2m@1000 { }; }; + watchdog: watchdog@b017000 { + compatible = "qcom,apss-wdt-ipq5018", "qcom,kpss-wdt"; + interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>; + reg = <0x0b017000 0x40>; + clocks = <&sleep_clk>; + }; + timer@b120000 { compatible = "arm,armv7-timer-mem"; reg = <0x0b120000 0x1000>;
Add the required DT node for WDT operation. Signed-off-by: Robert Marko <robimarko@gmail.com> --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)