| Message ID | 20231018153357.343142-1-macroalpha82@gmail.com |
|---|---|
| Headers | show |
| Series | Fixes for RGB30 | expand |
On Wed, 18 Oct 2023 10:33:54 -0500, Chris Morgan wrote: > From: Chris Morgan <macromorgan@hotmail.com> > > After preliminary testing, a few users requested that I see if I can > make the panel run at precisely 60hz. As the device is typically used > for retro gaming, getting the panel to refresh as close to 60hz as > possible is important. > > [...] Applied, thanks! [1/3] clk: rockchip: rk3568: Add PLL rate for 292.5MHz commit: bb8ab7335bd2f55706fd09f5ce431207a746d99a [2/3] arm64: dts: rockchip: Update VPLL Frequency for RGB30 commit: 793e0d8988bc0e6bf2ff5c6df7fc81ec8c53a93e [3/3] arm64: dts: rockchip: Remove UART2 from RGB30 commit: efa1d1c6c8e4f89eedef9035d1f74fe98861eb30 Best regards,
From: Chris Morgan <macromorgan@hotmail.com> After preliminary testing, a few users requested that I see if I can make the panel run at precisely 60hz. As the device is typically used for retro gaming, getting the panel to refresh as close to 60hz as possible is important. Additionally, I accidentially left the UART2 enabled, even though this device does not have an exposed serial port on the board. Disable the UART in the device tree. This patch series applies on top of the already applied commit here: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/commit/?h=for-next&id=1e9ac3e8a6a9d4da9efbad2d8e95cc1140e0e23f Chris Morgan (3): clk: rockchip: rk3568: Add PLL rate for 292.5MHz arm64: dts: rockchip: Update VPLL Frequency for RGB30 arm64: dts: rockchip: Remove UART2 from RGB30 .../arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts | 11 ++++++++++- drivers/clk/rockchip/clk-rk3568.c | 1 + 2 files changed, 11 insertions(+), 1 deletion(-)