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[00/17] RISU misc updates

Message ID 20240511115400.7587-1-richard.henderson@linaro.org
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Series RISU misc updates | expand

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Richard Henderson May 11, 2024, 11:53 a.m. UTC 
Some of these have been sitting on a branch for a couple of years.
Except perhaps the first, which I assume to be some sort of odd
build error from the time, they still seem reasonable.

There are some updates for SME1, but not yet the ZT register for SME2.
I'll get to that later after I've done the qemu linux-user work.

Finally, let's start phasing out raw binary test cases.  We can
make it much easier for ourselves if we package test cases in ELF,
which "objdump -d" can parse directly, without having to be given
all sorts of "-b binary -m some-arch-flags" etc.

For future work, I plan to make changes to risugen so that it writes
out asm files and invokes the assembler and linker to produce the
final output file.


r~


Richard Henderson (17):
  ppc64: Fix <sys/user.h> include order
  Fix load_image error check for mmap
  Standardize reginfo_dump_mismatch printing
  Add --fulldump and --diffdup options
  Remove return value from reginfo_dump
  ppc64: Clean register values in reginfo_init
  ppc64: Compare all bits of CCR
  ppc64: Simplify reginfo_is_eq
  ppc64: Clean up reginfo_dump
  aarch64: Tidy reginfo dumping ahead of ZA state
  aarch64: Add support for ZA storage
  aarch64: Trivial SME test
  Use bool for reginfo_is_eq
  aarch64: Use bool for sve_{z,p}reg_is_eq
  risu: Allow use of ELF test files
  configure: Enable loongarch64
  Build elf test cases instead of raw binaries

 Makefile                   |  19 ++--
 risu.h                     |  12 +-
 risu_reginfo_aarch64.h     |  52 ++++++++-
 risu.c                     | 178 ++++++++++++++++++++++++++----
 risu_ppc64.c               |   3 +-
 risu_reginfo_aarch64.c     | 218 +++++++++++++++++++++++++++++--------
 risu_reginfo_arm.c         |  28 +++--
 risu_reginfo_i386.c        |  16 +--
 risu_reginfo_loongarch64.c |  21 ++--
 risu_reginfo_m68k.c        |  45 +++-----
 risu_reginfo_ppc64.c       | 134 ++++++++---------------
 risu_reginfo_s390x.c       |  28 ++---
 configure                  |   4 +-
 test.ld                    |  12 ++
 test_aarch64.s             |   4 +-
 test_arm.s                 |  16 ++-
 test_i386.S                |   4 +-
 test_sme_aarch64.s         |  63 +++++++++++
 18 files changed, 588 insertions(+), 269 deletions(-)
 create mode 100644 test.ld
 create mode 100644 test_sme_aarch64.s

Comments

Peter Maydell May 21, 2024, 12:46 p.m. UTC | #1 
On Sat, 11 May 2024 at 12:54, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Some of these have been sitting on a branch for a couple of years.
> Except perhaps the first, which I assume to be some sort of odd
> build error from the time, they still seem reasonable.
>
> There are some updates for SME1, but not yet the ZT register for SME2.
> I'll get to that later after I've done the qemu linux-user work.
>
> Finally, let's start phasing out raw binary test cases.  We can
> make it much easier for ourselves if we package test cases in ELF,
> which "objdump -d" can parse directly, without having to be given
> all sorts of "-b binary -m some-arch-flags" etc.
>
> For future work, I plan to make changes to risugen so that it writes
> out asm files and invokes the assembler and linker to produce the
> final output file.

Commits 1-14 and 16 applied to the risu git repo (with the
commit message nits for patches 1 and 3 fixed).

(This isn't a "nope" for the elf related stuff, just to be clear:
I saw Philippe had a comment on patch 15 and figured it would be
best to take all the easy cleanup patches immediately so any
respin is just elf bits.)

thanks
-- PMM