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[2/5] arm: mach-snapdragon: gpio: introduce msm_special_pin_data

Message ID 20240528-topic-sm8x50-pinctrl-pinconf-v1-2-54d1e9ad7dfa@linaro.org
State Accepted
Commit 8daee349e5aaa7363a0248e7830978b6f7946d9a
Headers show
Series pinctrl: qcom: allow setting pins configuration for sepcial pins | expand

Commit Message

Neil Armstrong May 28, 2024, 8:31 a.m. UTC
In order to help setup pin configuration for special pins (UFS, SDCard),
introduce the msm_special_pin_data struct largely inspired from the
Linux conterpart but with only U-Boot required fields.

This struct is added to the pins_data to allow specifying the special
pins data for each SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm/mach-snapdragon/include/mach/gpio.h | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

Comments

Sumit Garg May 29, 2024, 6:44 a.m. UTC | #1
On Tue, 28 May 2024 at 14:02, Neil Armstrong <neil.armstrong@linaro.org> wrote:
>
> In order to help setup pin configuration for special pins (UFS, SDCard),
> introduce the msm_special_pin_data struct largely inspired from the
> Linux conterpart but with only U-Boot required fields.
>
> This struct is added to the pins_data to allow specifying the special
> pins data for each SoC.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm/mach-snapdragon/include/mach/gpio.h | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
>

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>

-Sumit

> diff --git a/arch/arm/mach-snapdragon/include/mach/gpio.h b/arch/arm/mach-snapdragon/include/mach/gpio.h
> index 53c6ae06490..cc8f405e20b 100644
> --- a/arch/arm/mach-snapdragon/include/mach/gpio.h
> +++ b/arch/arm/mach-snapdragon/include/mach/gpio.h
> @@ -10,11 +10,25 @@
>  #include <asm/types.h>
>  #include <stdbool.h>
>
> +struct msm_special_pin_data {
> +       char *name;
> +
> +       u32 ctl_reg;
> +       u32 io_reg;
> +
> +       unsigned pull_bit:5;
> +       unsigned drv_bit:5;
> +
> +       unsigned oe_bit:5;
> +       unsigned in_bit:5;
> +       unsigned out_bit:5;
> +};
> +
>  struct msm_pin_data {
>         int pin_count;
>         const unsigned int *pin_offsets;
> -       /* Index of first special pin, these are ignored for now */
>         unsigned int special_pins_start;
> +       const struct msm_special_pin_data *special_pins_data;
>  };
>
>  static inline u32 qcom_pin_offset(const unsigned int *offs, unsigned int selector)
>
> --
> 2.34.1
>
diff mbox series

Patch

diff --git a/arch/arm/mach-snapdragon/include/mach/gpio.h b/arch/arm/mach-snapdragon/include/mach/gpio.h
index 53c6ae06490..cc8f405e20b 100644
--- a/arch/arm/mach-snapdragon/include/mach/gpio.h
+++ b/arch/arm/mach-snapdragon/include/mach/gpio.h
@@ -10,11 +10,25 @@ 
 #include <asm/types.h>
 #include <stdbool.h>
 
+struct msm_special_pin_data {
+	char *name;
+
+	u32 ctl_reg;
+	u32 io_reg;
+
+	unsigned pull_bit:5;
+	unsigned drv_bit:5;
+
+	unsigned oe_bit:5;
+	unsigned in_bit:5;
+	unsigned out_bit:5;
+};
+
 struct msm_pin_data {
 	int pin_count;
 	const unsigned int *pin_offsets;
-	/* Index of first special pin, these are ignored for now */
 	unsigned int special_pins_start;
+	const struct msm_special_pin_data *special_pins_data;
 };
 
 static inline u32 qcom_pin_offset(const unsigned int *offs, unsigned int selector)