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[v5,0/3] pinctrl: pinctrl-zynqmp: Add Versal platform support

Message ID 20240906110113.3154327-1-sai.krishna.potthuri@amd.com
Headers show
Series pinctrl: pinctrl-zynqmp: Add Versal platform support | expand

Message

Sai Krishna Potthuri Sept. 6, 2024, 11:01 a.m. UTC 
Update the binding and pinctrl-zynqmp driver to add Versal platform
support.
Add Get Attribute ID in the Xilinx firmware driver to get the pin
information from Xilinx Platform Management Firmware.

Changes in v5:
-> 1/3 - Used the pins and groups properties references available in $defs
         for properties in "mux" (suggested by Rob).

Changes in v4:
-> 1/3 - Defined minItems for the properties, dropped the blank lines,
         dropped unused labels and unrelated nodes in example node, used
         correct email address (suggested by Krzysztof).

Changes in v3:
-> 1/3 - Mentioned all group names in conf node and also defined the
         conf node properties in $defs (suggested by Rob).

Changes in v2:
-> 1/3 - Created new binding doc for Versal platform (suggested by Rob).
-> 1/3 - Update regex for pins properties to make sure it always starts
         with "LPD" or "PMC" string.
-> 3/3 - Used firmware API to get platform information to differentiate
         platform specific code (suggested by Jay).

Sai Krishna Potthuri (3):
  dt-bindings: pinctrl: Add support for Xilinx Versal platform
  firmware: xilinx: Add Pinctrl Get Attribute ID
  pinctrl: pinctrl-zynqmp: Add support for Versal platform

 .../bindings/pinctrl/xlnx,versal-pinctrl.yaml | 278 ++++++++++++++++++
 drivers/pinctrl/pinctrl-zynqmp.c              |  97 +++++-
 include/linux/firmware/xlnx-zynqmp.h          |   1 +
 3 files changed, 371 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/xlnx,versal-pinctrl.yaml

Comments

Rob Herring Sept. 9, 2024, 3:19 p.m. UTC | #1 
On Fri, 06 Sep 2024 16:31:11 +0530, Sai Krishna Potthuri wrote:
> Add Xilinx Versal compatible string and corresponding groups, function and
> pins properties to support pin controller features on Versal platform.
> 
> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> ---
>  .../bindings/pinctrl/xlnx,versal-pinctrl.yaml | 278 ++++++++++++++++++
>  1 file changed, 278 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/xlnx,versal-pinctrl.yaml
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Linus Walleij Sept. 23, 2024, 8:42 a.m. UTC | #2 
On Fri, Sep 6, 2024 at 1:01 PM Sai Krishna Potthuri
<sai.krishna.potthuri@amd.com> wrote:

> Update the binding and pinctrl-zynqmp driver to add Versal platform
> support.
> Add Get Attribute ID in the Xilinx firmware driver to get the pin
> information from Xilinx Platform Management Firmware.
>
> Changes in v5:
> -> 1/3 - Used the pins and groups properties references available in $defs
>          for properties in "mux" (suggested by Rob).

Patches applied!

Yours,
Linus Walleij