| Message ID | 20241022-x1e80100-ps8830-v3-0-68a95f351e99@linaro.org |
|---|---|
| Headers | show |
| Series | usb: typec: Add new driver for Parade PS8830 Type-C Retimer | expand |
On Tue, Oct 22, 2024 at 01:26:54PM +0300, Abel Vesa wrote: > Document bindings for the Parade PS8830 Type-C retimer. This retimer is > currently found on all boards featuring Qualcomm Snapdragon X Elite SoCs > and it is needed to provide altmode muxing between DP and USB, but also > connector orientation handling between. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > .../devicetree/bindings/usb/parade,ps8830.yaml | 129 +++++++++++++++++++++ > 1 file changed, 129 insertions(+) > > diff --git a/Documentation/devicetree/bindings/usb/parade,ps8830.yaml b/Documentation/devicetree/bindings/usb/parade,ps8830.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..ee4c69eca6066e4da0373fad6c25d6e9fff83366 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/parade,ps8830.yaml > @@ -0,0 +1,129 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/usb/parade,ps8830.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Parade PS8830 USB and DisplayPort Retimer > + > +maintainers: > + - Abel Vesa <abel.vesa@linaro.org> > + > +properties: > + compatible: > + enum: > + - parade,ps8830 > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: XO Clock > + > + clock-names: > + items: > + - const: xo > + > + ps8830,boot-on: The prefix here should be the vendor, not the model. How come whether or not it is enabled at boot cannot be detected at runtime?
On Tue, Oct 22, 2024 at 01:26:56PM GMT, Abel Vesa wrote: > Add nodes for all 3 Parade PS8830 Type-C retimers found on Qualcomm > X Elite CRD board, along with all of their voltage regulators. These > retimers sit between the Type-C connectors and the PHYs, so describe the > pmic glink graph accordingly. On this board, these retimers might be left ^ Here would be a good point to split this hunk into two paragraphs. > enabled and configured by the bootloader, so make sure the retimers don't > reset their configuration on driver probe. It would be nice if there was a hint here about how this statement manifest itself in the patch. Hint: https://docs.kernel.org/process/submitting-patches.html#describe-your-changes is a good read for how to structure ones commit message - with a problem description, then a technical description of the change (i.e. probably not something starting with the word "Add"...) Regards, Bjorn > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 448 +++++++++++++++++++++++++++++- > 1 file changed, 442 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > index f5f2659690915f9ba50d15a27c54e3c0f504a14b..7cc45a5cd7eb7e70915d04ea7e181b56f693f768 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > @@ -99,7 +99,15 @@ port@1 { > reg = <1>; > > pmic_glink_ss0_ss_in: endpoint { > - remote-endpoint = <&usb_1_ss0_qmpphy_out>; > + remote-endpoint = <&retimer_ss0_ss_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + pmic_glink_ss0_con_sbu_in: endpoint { > + remote-endpoint = <&retimer_ss0_con_sbu_out>; > }; > }; > }; > @@ -128,7 +136,15 @@ port@1 { > reg = <1>; > > pmic_glink_ss1_ss_in: endpoint { > - remote-endpoint = <&usb_1_ss1_qmpphy_out>; > + remote-endpoint = <&retimer_ss1_ss_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + pmic_glink_ss1_con_sbu_in: endpoint { > + remote-endpoint = <&retimer_ss1_con_sbu_out>; > }; > }; > }; > @@ -157,7 +173,15 @@ port@1 { > reg = <1>; > > pmic_glink_ss2_ss_in: endpoint { > - remote-endpoint = <&usb_1_ss2_qmpphy_out>; > + remote-endpoint = <&retimer_ss2_ss_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + pmic_glink_ss2_con_sbu_in: endpoint { > + remote-endpoint = <&retimer_ss2_con_sbu_out>; > }; > }; > }; > @@ -291,6 +315,150 @@ vreg_nvme: regulator-nvme { > pinctrl-0 = <&nvme_reg_en>; > }; > > + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_RTMR0_1P15"; > + regulator-min-microvolt = <1150000>; > + regulator-max-microvolt = <1150000>; > + > + gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&rtmr0_1p15_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_RTMR0_1P8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&rtmr0_1p8_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_RTMR0_3P3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&rtmr0_3p3_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_RTMR1_1P15"; > + regulator-min-microvolt = <1150000>; > + regulator-max-microvolt = <1150000>; > + > + gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&rtmr1_1p15_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_RTMR1_1P8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&rtmr1_1p8_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_RTMR1_3P3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&rtmr1_3p3_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > + vreg_rtmr2_1p15: regulator-rtmr2-1p15 { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_RTMR2_1P15"; > + regulator-min-microvolt = <1150000>; > + regulator-max-microvolt = <1150000>; > + > + gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&rtmr2_1p15_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > + vreg_rtmr2_1p8: regulator-rtmr2-1p8 { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_RTMR2_1P8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&rtmr2_1p8_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > + vreg_rtmr2_3p3: regulator-rtmr2-3p3 { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_RTMR2_3P3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-0 = <&rtmr2_3p3_reg_en>; > + pinctrl-names = "default"; > + > + regulator-boot-on; > + }; > + > vph_pwr: regulator-vph-pwr { > compatible = "regulator-fixed"; > > @@ -709,6 +877,187 @@ keyboard@3a { > }; > }; > > +&i2c1 { > + clock-frequency = <400000>; > + > + status = "okay"; > + > + typec-mux@8 { > + compatible = "parade,ps8830"; > + reg = <0x08>; > + > + clocks = <&rpmhcc RPMH_RF_CLK5>; > + clock-names = "xo"; > + > + vdd-supply = <&vreg_rtmr2_1p15>; > + vdd33-supply = <&vreg_rtmr2_3p3>; > + vdd33-cap-supply = <&vreg_rtmr2_3p3>; > + vddar-supply = <&vreg_rtmr2_1p15>; > + vddat-supply = <&vreg_rtmr2_1p15>; > + vddio-supply = <&vreg_rtmr2_1p8>; > + > + reset-gpios = <&tlmm 185 GPIO_ACTIVE_LOW>; > + > + pinctrl-0 = <&rtmr2_default>; > + pinctrl-names = "default"; > + > + orientation-switch; > + retimer-switch; > + > + ps8830,boot-on; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + retimer_ss2_ss_out: endpoint { > + remote-endpoint = <&pmic_glink_ss2_ss_in>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + retimer_ss2_ss_in: endpoint { > + remote-endpoint = <&usb_1_ss2_qmpphy_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + retimer_ss2_con_sbu_out: endpoint { > + remote-endpoint = <&pmic_glink_ss2_con_sbu_in>; > + }; > + }; > + }; > + }; > +}; > + > +&i2c3 { > + clock-frequency = <400000>; > + > + status = "okay"; > + > + typec-mux@8 { > + compatible = "parade,ps8830"; > + reg = <0x08>; > + > + clocks = <&rpmhcc RPMH_RF_CLK3>; > + clock-names = "xo"; > + > + vdd-supply = <&vreg_rtmr0_1p15>; > + vdd33-supply = <&vreg_rtmr0_3p3>; > + vdd33-cap-supply = <&vreg_rtmr0_3p3>; > + vddar-supply = <&vreg_rtmr0_1p15>; > + vddat-supply = <&vreg_rtmr0_1p15>; > + vddio-supply = <&vreg_rtmr0_1p8>; > + > + reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>; > + > + pinctrl-0 = <&rtmr0_default>; > + pinctrl-names = "default"; > + > + retimer-switch; > + orientation-switch; > + > + ps8830,boot-on; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + retimer_ss0_ss_out: endpoint { > + remote-endpoint = <&pmic_glink_ss0_ss_in>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + retimer_ss0_ss_in: endpoint { > + remote-endpoint = <&usb_1_ss0_qmpphy_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + retimer_ss0_con_sbu_out: endpoint { > + remote-endpoint = <&pmic_glink_ss0_con_sbu_in>; > + }; > + }; > + }; > + }; > +}; > + > +&i2c7 { > + clock-frequency = <400000>; > + > + status = "okay"; > + > + typec-mux@8 { > + compatible = "parade,ps8830"; > + reg = <0x8>; > + > + clocks = <&rpmhcc RPMH_RF_CLK4>; > + clock-names = "xo"; > + > + vdd-supply = <&vreg_rtmr1_1p15>; > + vdd33-supply = <&vreg_rtmr1_3p3>; > + vdd33-cap-supply = <&vreg_rtmr1_3p3>; > + vddar-supply = <&vreg_rtmr1_1p15>; > + vddat-supply = <&vreg_rtmr1_1p15>; > + vddio-supply = <&vreg_rtmr1_1p8>; > + > + reset-gpios = <&tlmm 176 GPIO_ACTIVE_LOW>; > + > + pinctrl-0 = <&rtmr1_default>; > + pinctrl-names = "default"; > + > + retimer-switch; > + orientation-switch; > + > + ps8830,boot-on; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + retimer_ss1_ss_out: endpoint { > + remote-endpoint = <&pmic_glink_ss1_ss_in>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + retimer_ss1_ss_in: endpoint { > + remote-endpoint = <&usb_1_ss1_qmpphy_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + retimer_ss1_con_sbu_out: endpoint { > + remote-endpoint = <&pmic_glink_ss1_con_sbu_in>; > + }; > + }; > + > + }; > + }; > +}; > + > &i2c8 { > clock-frequency = <400000>; > > @@ -854,6 +1203,37 @@ &pcie6a_phy { > status = "okay"; > }; > > +&pm8550_gpios { > + rtmr0_default: rtmr0-reset-n-active-state { > + pins = "gpio10"; > + function = "normal"; > + power-source = <1>; /* 1.8V */ > + }; > + > + rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state { > + pins = "gpio11"; > + function = "normal"; > + power-source = <1>; /* 1.8V */ > + }; > +}; > + > +&pmc8380_5_gpios { > + rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state { > + pins = "gpio8"; > + function = "normal"; > + power-source = <1>; /* 1.8V */ > + bias-disable; > + }; > +}; > + > +&pm8550ve_9_gpios { > + rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state { > + pins = "gpio8"; > + function = "normal"; > + power-source = <1>; /* 1.8V */ > + }; > +}; > + > &pmc8380_3_gpios { > edp_bl_en: edp-bl-en-state { > pins = "gpio4"; > @@ -1093,6 +1473,62 @@ wake-n-pins { > }; > }; > > + rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state { > + pins = "gpio188"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state { > + pins = "gpio175"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state { > + pins = "gpio186"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + rtmr1_default: rtmr1-reset-n-active-state { > + pins = "gpio176"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + rtmr2_1p15_reg_en: rtmr2-1p15-reg-en-state { > + pins = "gpio189"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + rtmr2_1p8_reg_en: rtmr2-1p8-reg-en-state { > + pins = "gpio126"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + rtmr2_3p3_reg_en: rtmr2-3p3-reg-en-state { > + pins = "gpio187"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + rtmr2_default: rtmr2-reset-n-active-state { > + pins = "gpio185"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > tpad_default: tpad-default-state { > pins = "gpio3"; > function = "gpio"; > @@ -1160,7 +1596,7 @@ &usb_1_ss0_dwc3_hs { > }; > > &usb_1_ss0_qmpphy_out { > - remote-endpoint = <&pmic_glink_ss0_ss_in>; > + remote-endpoint = <&retimer_ss0_ss_in>; > }; > > &usb_1_ss1_hsphy { > @@ -1188,7 +1624,7 @@ &usb_1_ss1_dwc3_hs { > }; > > &usb_1_ss1_qmpphy_out { > - remote-endpoint = <&pmic_glink_ss1_ss_in>; > + remote-endpoint = <&retimer_ss1_ss_in>; > }; > > &usb_1_ss2_hsphy { > @@ -1216,5 +1652,5 @@ &usb_1_ss2_dwc3_hs { > }; > > &usb_1_ss2_qmpphy_out { > - remote-endpoint = <&pmic_glink_ss2_ss_in>; > + remote-endpoint = <&retimer_ss2_ss_in>; > }; > > -- > 2.34.1 >
On Tue, Oct 22, 2024 at 01:26:54PM GMT, Abel Vesa wrote: > Document bindings for the Parade PS8830 Type-C retimer. This retimer is > currently found on all boards featuring Qualcomm Snapdragon X Elite SoCs > and it is needed to provide altmode muxing between DP and USB, but also > connector orientation handling between. This sentence ends a bit weird to me, please polish it (although preferably, rewrite it according to "describe your changes") > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > .../devicetree/bindings/usb/parade,ps8830.yaml | 129 +++++++++++++++++++++ > 1 file changed, 129 insertions(+) > > diff --git a/Documentation/devicetree/bindings/usb/parade,ps8830.yaml b/Documentation/devicetree/bindings/usb/parade,ps8830.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..ee4c69eca6066e4da0373fad6c25d6e9fff83366 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/parade,ps8830.yaml > @@ -0,0 +1,129 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/usb/parade,ps8830.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Parade PS8830 USB and DisplayPort Retimer > + > +maintainers: > + - Abel Vesa <abel.vesa@linaro.org> > + > +properties: > + compatible: > + enum: > + - parade,ps8830 > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: XO Clock > + > + clock-names: > + items: > + - const: xo Don't know if the guidelines has changed on this, but for a single clock we used to omit clock-names, as it doesn't add any/much value. Regards, Bjorn > + > + ps8830,boot-on: > + description: Left enabled at boot, so skip resetting > + type: boolean > + > + reset-gpios: > + maxItems: 1 > + > + vdd-supply: > + description: power supply (1.07V) > + > + vdd33-supply: > + description: power supply (3.3V) > + > + vdd33-cap-supply: > + description: power supply (3.3V) > + > + vddar-supply: > + description: power supply (1.07V) > + > + vddat-supply: > + description: power supply (1.07V) > + > + vddio-supply: > + description: power supply (1.2V or 1.8V) > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - reset-gpios > + - vdd-supply > + - vdd33-supply > + - vdd33-cap-supply > + - vddat-supply > + - vddio-supply > + - orientation-switch > + - retimer-switch > + > +allOf: > + - $ref: usb-switch.yaml# > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/gpio/gpio.h> > + > + i2c { > + #address-cells = <1>; > + #size-cells = <0>; > + > + typec-mux@8 { > + compatible = "parade,ps8830"; > + reg = <0x8>; > + > + clocks = <&clk_rtmr_xo>; > + clock-names = "xo"; > + > + vdd-supply = <&vreg_rtmr_1p15>; > + vdd33-supply = <&vreg_rtmr_3p3>; > + vdd33-cap-supply = <&vreg_rtmr_3p3>; > + vddar-supply = <&vreg_rtmr_1p15>; > + vddat-supply = <&vreg_rtmr_1p15>; > + vddio-supply = <&vreg_rtmr_1p8>; > + > + reset-gpios = <&tlmm 10 GPIO_ACTIVE_LOW>; > + > + retimer-switch; > + orientation-switch; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + endpoint { > + remote-endpoint = <&typec_con_ss>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + endpoint { > + remote-endpoint = <&usb_phy_ss>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + endpoint { > + remote-endpoint = <&typec_dp_aux>; > + }; > + }; > + }; > + }; > + }; > +... > > -- > 2.34.1 >
On 24-10-22 19:24:19, Bjorn Andersson wrote: > On Tue, Oct 22, 2024 at 01:26:56PM GMT, Abel Vesa wrote: > > Add nodes for all 3 Parade PS8830 Type-C retimers found on Qualcomm > > X Elite CRD board, along with all of their voltage regulators. These > > retimers sit between the Type-C connectors and the PHYs, so describe the > > pmic glink graph accordingly. On this board, these retimers might be left > ^ Here would be a good point to split this hunk into two paragraphs. Will do. > > > enabled and configured by the bootloader, so make sure the retimers don't > > reset their configuration on driver probe. > > It would be nice if there was a hint here about how this statement > manifest itself in the patch. I'll add the property in the phrasing. > > > Hint: > https://docs.kernel.org/process/submitting-patches.html#describe-your-changes > is a good read for how to structure ones commit message - with a problem > description, then a technical description of the change (i.e. probably > not something starting with the word "Add"...) Sure, will reword with "Describe all 3 Parade ...". > > Regards, > Bjorn Thanks for reviewing. Abel > > > > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 448 +++++++++++++++++++++++++++++- > > 1 file changed, 442 insertions(+), 6 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > > index f5f2659690915f9ba50d15a27c54e3c0f504a14b..7cc45a5cd7eb7e70915d04ea7e181b56f693f768 100644 > > --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > > +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > > @@ -99,7 +99,15 @@ port@1 { > > reg = <1>; > > > > pmic_glink_ss0_ss_in: endpoint { > > - remote-endpoint = <&usb_1_ss0_qmpphy_out>; > > + remote-endpoint = <&retimer_ss0_ss_out>; > > + }; > > + }; > > + > > + port@2 { > > + reg = <2>; > > + > > + pmic_glink_ss0_con_sbu_in: endpoint { > > + remote-endpoint = <&retimer_ss0_con_sbu_out>; > > }; > > }; > > }; > > @@ -128,7 +136,15 @@ port@1 { > > reg = <1>; > > > > pmic_glink_ss1_ss_in: endpoint { > > - remote-endpoint = <&usb_1_ss1_qmpphy_out>; > > + remote-endpoint = <&retimer_ss1_ss_out>; > > + }; > > + }; > > + > > + port@2 { > > + reg = <2>; > > + > > + pmic_glink_ss1_con_sbu_in: endpoint { > > + remote-endpoint = <&retimer_ss1_con_sbu_out>; > > }; > > }; > > }; > > @@ -157,7 +173,15 @@ port@1 { > > reg = <1>; > > > > pmic_glink_ss2_ss_in: endpoint { > > - remote-endpoint = <&usb_1_ss2_qmpphy_out>; > > + remote-endpoint = <&retimer_ss2_ss_out>; > > + }; > > + }; > > + > > + port@2 { > > + reg = <2>; > > + > > + pmic_glink_ss2_con_sbu_in: endpoint { > > + remote-endpoint = <&retimer_ss2_con_sbu_out>; > > }; > > }; > > }; > > @@ -291,6 +315,150 @@ vreg_nvme: regulator-nvme { > > pinctrl-0 = <&nvme_reg_en>; > > }; > > > > + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { > > + compatible = "regulator-fixed"; > > + > > + regulator-name = "VREG_RTMR0_1P15"; > > + regulator-min-microvolt = <1150000>; > > + regulator-max-microvolt = <1150000>; > > + > > + gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + > > + pinctrl-0 = <&rtmr0_1p15_reg_en>; > > + pinctrl-names = "default"; > > + > > + regulator-boot-on; > > + }; > > + > > + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { > > + compatible = "regulator-fixed"; > > + > > + regulator-name = "VREG_RTMR0_1P8"; > > + regulator-min-microvolt = <1800000>; > > + regulator-max-microvolt = <1800000>; > > + > > + gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + > > + pinctrl-0 = <&rtmr0_1p8_reg_en>; > > + pinctrl-names = "default"; > > + > > + regulator-boot-on; > > + }; > > + > > + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { > > + compatible = "regulator-fixed"; > > + > > + regulator-name = "VREG_RTMR0_3P3"; > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + > > + gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + > > + pinctrl-0 = <&rtmr0_3p3_reg_en>; > > + pinctrl-names = "default"; > > + > > + regulator-boot-on; > > + }; > > + > > + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { > > + compatible = "regulator-fixed"; > > + > > + regulator-name = "VREG_RTMR1_1P15"; > > + regulator-min-microvolt = <1150000>; > > + regulator-max-microvolt = <1150000>; > > + > > + gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + > > + pinctrl-0 = <&rtmr1_1p15_reg_en>; > > + pinctrl-names = "default"; > > + > > + regulator-boot-on; > > + }; > > + > > + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { > > + compatible = "regulator-fixed"; > > + > > + regulator-name = "VREG_RTMR1_1P8"; > > + regulator-min-microvolt = <1800000>; > > + regulator-max-microvolt = <1800000>; > > + > > + gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + > > + pinctrl-0 = <&rtmr1_1p8_reg_en>; > > + pinctrl-names = "default"; > > + > > + regulator-boot-on; > > + }; > > + > > + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { > > + compatible = "regulator-fixed"; > > + > > + regulator-name = "VREG_RTMR1_3P3"; > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + > > + gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + > > + pinctrl-0 = <&rtmr1_3p3_reg_en>; > > + pinctrl-names = "default"; > > + > > + regulator-boot-on; > > + }; > > + > > + vreg_rtmr2_1p15: regulator-rtmr2-1p15 { > > + compatible = "regulator-fixed"; > > + > > + regulator-name = "VREG_RTMR2_1P15"; > > + regulator-min-microvolt = <1150000>; > > + regulator-max-microvolt = <1150000>; > > + > > + gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + > > + pinctrl-0 = <&rtmr2_1p15_reg_en>; > > + pinctrl-names = "default"; > > + > > + regulator-boot-on; > > + }; > > + > > + vreg_rtmr2_1p8: regulator-rtmr2-1p8 { > > + compatible = "regulator-fixed"; > > + > > + regulator-name = "VREG_RTMR2_1P8"; > > + regulator-min-microvolt = <1800000>; > > + regulator-max-microvolt = <1800000>; > > + > > + gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + > > + pinctrl-0 = <&rtmr2_1p8_reg_en>; > > + pinctrl-names = "default"; > > + > > + regulator-boot-on; > > + }; > > + > > + vreg_rtmr2_3p3: regulator-rtmr2-3p3 { > > + compatible = "regulator-fixed"; > > + > > + regulator-name = "VREG_RTMR2_3P3"; > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + > > + gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + > > + pinctrl-0 = <&rtmr2_3p3_reg_en>; > > + pinctrl-names = "default"; > > + > > + regulator-boot-on; > > + }; > > + > > vph_pwr: regulator-vph-pwr { > > compatible = "regulator-fixed"; > > > > @@ -709,6 +877,187 @@ keyboard@3a { > > }; > > }; > > > > +&i2c1 { > > + clock-frequency = <400000>; > > + > > + status = "okay"; > > + > > + typec-mux@8 { > > + compatible = "parade,ps8830"; > > + reg = <0x08>; > > + > > + clocks = <&rpmhcc RPMH_RF_CLK5>; > > + clock-names = "xo"; > > + > > + vdd-supply = <&vreg_rtmr2_1p15>; > > + vdd33-supply = <&vreg_rtmr2_3p3>; > > + vdd33-cap-supply = <&vreg_rtmr2_3p3>; > > + vddar-supply = <&vreg_rtmr2_1p15>; > > + vddat-supply = <&vreg_rtmr2_1p15>; > > + vddio-supply = <&vreg_rtmr2_1p8>; > > + > > + reset-gpios = <&tlmm 185 GPIO_ACTIVE_LOW>; > > + > > + pinctrl-0 = <&rtmr2_default>; > > + pinctrl-names = "default"; > > + > > + orientation-switch; > > + retimer-switch; > > + > > + ps8830,boot-on; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + > > + retimer_ss2_ss_out: endpoint { > > + remote-endpoint = <&pmic_glink_ss2_ss_in>; > > + }; > > + }; > > + > > + port@1 { > > + reg = <1>; > > + > > + retimer_ss2_ss_in: endpoint { > > + remote-endpoint = <&usb_1_ss2_qmpphy_out>; > > + }; > > + }; > > + > > + port@2 { > > + reg = <2>; > > + > > + retimer_ss2_con_sbu_out: endpoint { > > + remote-endpoint = <&pmic_glink_ss2_con_sbu_in>; > > + }; > > + }; > > + }; > > + }; > > +}; > > + > > +&i2c3 { > > + clock-frequency = <400000>; > > + > > + status = "okay"; > > + > > + typec-mux@8 { > > + compatible = "parade,ps8830"; > > + reg = <0x08>; > > + > > + clocks = <&rpmhcc RPMH_RF_CLK3>; > > + clock-names = "xo"; > > + > > + vdd-supply = <&vreg_rtmr0_1p15>; > > + vdd33-supply = <&vreg_rtmr0_3p3>; > > + vdd33-cap-supply = <&vreg_rtmr0_3p3>; > > + vddar-supply = <&vreg_rtmr0_1p15>; > > + vddat-supply = <&vreg_rtmr0_1p15>; > > + vddio-supply = <&vreg_rtmr0_1p8>; > > + > > + reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>; > > + > > + pinctrl-0 = <&rtmr0_default>; > > + pinctrl-names = "default"; > > + > > + retimer-switch; > > + orientation-switch; > > + > > + ps8830,boot-on; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + > > + retimer_ss0_ss_out: endpoint { > > + remote-endpoint = <&pmic_glink_ss0_ss_in>; > > + }; > > + }; > > + > > + port@1 { > > + reg = <1>; > > + > > + retimer_ss0_ss_in: endpoint { > > + remote-endpoint = <&usb_1_ss0_qmpphy_out>; > > + }; > > + }; > > + > > + port@2 { > > + reg = <2>; > > + > > + retimer_ss0_con_sbu_out: endpoint { > > + remote-endpoint = <&pmic_glink_ss0_con_sbu_in>; > > + }; > > + }; > > + }; > > + }; > > +}; > > + > > +&i2c7 { > > + clock-frequency = <400000>; > > + > > + status = "okay"; > > + > > + typec-mux@8 { > > + compatible = "parade,ps8830"; > > + reg = <0x8>; > > + > > + clocks = <&rpmhcc RPMH_RF_CLK4>; > > + clock-names = "xo"; > > + > > + vdd-supply = <&vreg_rtmr1_1p15>; > > + vdd33-supply = <&vreg_rtmr1_3p3>; > > + vdd33-cap-supply = <&vreg_rtmr1_3p3>; > > + vddar-supply = <&vreg_rtmr1_1p15>; > > + vddat-supply = <&vreg_rtmr1_1p15>; > > + vddio-supply = <&vreg_rtmr1_1p8>; > > + > > + reset-gpios = <&tlmm 176 GPIO_ACTIVE_LOW>; > > + > > + pinctrl-0 = <&rtmr1_default>; > > + pinctrl-names = "default"; > > + > > + retimer-switch; > > + orientation-switch; > > + > > + ps8830,boot-on; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + > > + retimer_ss1_ss_out: endpoint { > > + remote-endpoint = <&pmic_glink_ss1_ss_in>; > > + }; > > + }; > > + > > + port@1 { > > + reg = <1>; > > + > > + retimer_ss1_ss_in: endpoint { > > + remote-endpoint = <&usb_1_ss1_qmpphy_out>; > > + }; > > + }; > > + > > + port@2 { > > + reg = <2>; > > + > > + retimer_ss1_con_sbu_out: endpoint { > > + remote-endpoint = <&pmic_glink_ss1_con_sbu_in>; > > + }; > > + }; > > + > > + }; > > + }; > > +}; > > + > > &i2c8 { > > clock-frequency = <400000>; > > > > @@ -854,6 +1203,37 @@ &pcie6a_phy { > > status = "okay"; > > }; > > > > +&pm8550_gpios { > > + rtmr0_default: rtmr0-reset-n-active-state { > > + pins = "gpio10"; > > + function = "normal"; > > + power-source = <1>; /* 1.8V */ > > + }; > > + > > + rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state { > > + pins = "gpio11"; > > + function = "normal"; > > + power-source = <1>; /* 1.8V */ > > + }; > > +}; > > + > > +&pmc8380_5_gpios { > > + rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state { > > + pins = "gpio8"; > > + function = "normal"; > > + power-source = <1>; /* 1.8V */ > > + bias-disable; > > + }; > > +}; > > + > > +&pm8550ve_9_gpios { > > + rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state { > > + pins = "gpio8"; > > + function = "normal"; > > + power-source = <1>; /* 1.8V */ > > + }; > > +}; > > + > > &pmc8380_3_gpios { > > edp_bl_en: edp-bl-en-state { > > pins = "gpio4"; > > @@ -1093,6 +1473,62 @@ wake-n-pins { > > }; > > }; > > > > + rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state { > > + pins = "gpio188"; > > + function = "gpio"; > > + drive-strength = <2>; > > + bias-disable; > > + }; > > + > > + rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state { > > + pins = "gpio175"; > > + function = "gpio"; > > + drive-strength = <2>; > > + bias-disable; > > + }; > > + > > + rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state { > > + pins = "gpio186"; > > + function = "gpio"; > > + drive-strength = <2>; > > + bias-disable; > > + }; > > + > > + rtmr1_default: rtmr1-reset-n-active-state { > > + pins = "gpio176"; > > + function = "gpio"; > > + drive-strength = <2>; > > + bias-disable; > > + }; > > + > > + rtmr2_1p15_reg_en: rtmr2-1p15-reg-en-state { > > + pins = "gpio189"; > > + function = "gpio"; > > + drive-strength = <2>; > > + bias-disable; > > + }; > > + > > + rtmr2_1p8_reg_en: rtmr2-1p8-reg-en-state { > > + pins = "gpio126"; > > + function = "gpio"; > > + drive-strength = <2>; > > + bias-disable; > > + }; > > + > > + rtmr2_3p3_reg_en: rtmr2-3p3-reg-en-state { > > + pins = "gpio187"; > > + function = "gpio"; > > + drive-strength = <2>; > > + bias-disable; > > + }; > > + > > + rtmr2_default: rtmr2-reset-n-active-state { > > + pins = "gpio185"; > > + function = "gpio"; > > + drive-strength = <2>; > > + bias-disable; > > + }; > > + > > tpad_default: tpad-default-state { > > pins = "gpio3"; > > function = "gpio"; > > @@ -1160,7 +1596,7 @@ &usb_1_ss0_dwc3_hs { > > }; > > > > &usb_1_ss0_qmpphy_out { > > - remote-endpoint = <&pmic_glink_ss0_ss_in>; > > + remote-endpoint = <&retimer_ss0_ss_in>; > > }; > > > > &usb_1_ss1_hsphy { > > @@ -1188,7 +1624,7 @@ &usb_1_ss1_dwc3_hs { > > }; > > > > &usb_1_ss1_qmpphy_out { > > - remote-endpoint = <&pmic_glink_ss1_ss_in>; > > + remote-endpoint = <&retimer_ss1_ss_in>; > > }; > > > > &usb_1_ss2_hsphy { > > @@ -1216,5 +1652,5 @@ &usb_1_ss2_dwc3_hs { > > }; > > > > &usb_1_ss2_qmpphy_out { > > - remote-endpoint = <&pmic_glink_ss2_ss_in>; > > + remote-endpoint = <&retimer_ss2_ss_in>; > > }; > > > > -- > > 2.34.1 > >
The Parade PS8830 is a Type-C multi-protocol retimer that is controlled via I2C. It provides altmode and orientation handling and usually sits between the Type-C port and the PHY. It is currently used alongside Qualcomm Snapdragon X Elite SoCs on quite a few laptops already. This new driver adds support for the following 3 modes: - DP 4lanes (pin assignments C and E) - DP 2lanes + USB3 (pin assignment D) - USB3 This retimer is a LTTPR (Link-Training Tunable PHY Repeater) which means it can support link training from source to itself. This means that the DP driver needs to be aware of the repeater presence and to handle the link training accordingly. This is currently missing from msm dp driver, but there is already effort going on to add it. Once done, full external DP will be working on all X1E laptops that make use of this retimer. NOTE: Currently, due to both LTTPR missing support in msm DP and a reported crash that can happen on DP unplug, the DP DT patch is not supposed to be merged yet. That patch is only shared for testing purposes. Once those 2 issues have been resolved, the MDSS DP 0-2 enablement patch will be respun. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- Changes in v3: - Reworked the schema binding by using the usb/usb-switch.yaml defined port graph and properties. Addressed all comments from Johan and Dmitry. - Dropped the manual caching of the config values on regmap write in the driver. - Reordered the DP pin assignment states within the switch clause, as Dmitry suggested. - Added SVID check to not allow any altmode other than DP. - Added DT patches (retimer for USB orientation handling and DP enablement). Did this in order to offer a full picture of how it all fits together. - Split the DP enablement in DT in a separate patchset so the USB handling can be merged separately. - Added ps8830,boot-on to let the driver know it is supposed to skip resetting the retimer on driver probe, as the bootloader might already let it in a pre-configured state. - Marked all retimer voltage regulators as boot-on since we want to maintain the state for coldplug orientation. - Added pinconf for all retimer0 gpios. - Didn't pick up Konrad's T-b tags and Krzysztof's R-b tag as the rework is quite extensive. Especially because of the ps8830,boot-on and what it does. - Link to v2: https://lore.kernel.org/r/20241004-x1e80100-ps8830-v2-0-5cd8008c8c40@linaro.org Changes in v2: - Addressed all comments from Johan and Konrad. - Reworked the handling of the vregs so it would be more cleaner. Dropped the usage of bulk regulators API and handled them separately. Also discribed all regulators according to data sheet. - Added all delays according to data sheet. - Fixed coldplug (on boot) orientation detection. - Didn't pick Krzysztof's R-b tag because the bindings changed w.r.t supplies. - Link to v1: https://lore.kernel.org/r/20240829-x1e80100-ps8830-v1-0-bcc4790b1d45@linaro.org --- Abel Vesa (4): dt-bindings: usb: Add Parade PS8830 Type-C retimer bindings usb: typec: Add support for Parade PS8830 Type-C Retimer arm64: dts: qcom: x1e80100-crd: Add Parade PS8830 related nodes arm64: dts: qcom: x1e80100-crd: Enable external DP .../devicetree/bindings/usb/parade,ps8830.yaml | 129 ++++++ arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 472 ++++++++++++++++++++- drivers/usb/typec/mux/Kconfig | 10 + drivers/usb/typec/mux/Makefile | 1 + drivers/usb/typec/mux/ps8830.c | 423 ++++++++++++++++++ 5 files changed, 1029 insertions(+), 6 deletions(-) --- base-commit: 63b3ff03d91ae8f875fe8747c781a521f78cde17 change-id: 20240521-x1e80100-ps8830-d5ccca95b557 Best regards,