| Message ID | 20241030-a663-gpu-support-v3-0-bdf1d9ce6021@quicinc.com |
|---|---|
| Headers | show |
| Series | DRM/MSM: Support for Adreno 663 GPU | expand |
On 30.10.2024 8:02 AM, Akhil P Oommen wrote: > From: Puranam V G Tejaswi <quic_pvgtejas@quicinc.com> > > Add gpu and gmu nodes for sa8775p chipset. As of now all > SKUs have the same GPU fmax, so there is no requirement of > speed bin support. > > Signed-off-by: Puranam V G Tejaswi <quic_pvgtejas@quicinc.com> > Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 94 +++++++++++++++++++++++++++++++++++ > 1 file changed, 94 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index e8dbc8d820a6..c6cb18193787 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -3072,6 +3072,100 @@ tcsr_mutex: hwlock@1f40000 { > #hwlock-cells = <1>; > }; > > + gpu: gpu@3d00000 { > + compatible = "qcom,adreno-663.0", "qcom,adreno"; Is the patchlevel zero for this SKU? > + reg = <0x0 0x03d00000 0x0 0x40000>, > + <0x0 0x03d9e000 0x0 0x1000>, > + <0x0 0x03d61000 0x0 0x800>; > + reg-names = "kgsl_3d0_reg_memory", > + "cx_mem", > + "cx_dbgc"; > + interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; > + iommus = <&adreno_smmu 0 0xc00>, > + <&adreno_smmu 1 0xc00>; > + operating-points-v2 = <&gpu_opp_table>; > + qcom,gmu = <&gmu>; > + interconnects = <&gem_noc MASTER_GFX3D QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "gfx-mem"; > + #cooling-cells = <2>; You might want to hook this up to a thermal-zone right away Konrad
On 11/1/2024 2:00 AM, Konrad Dybcio wrote: > On 30.10.2024 8:02 AM, Akhil P Oommen wrote: >> From: Puranam V G Tejaswi <quic_pvgtejas@quicinc.com> >> >> Add gpu and gmu nodes for sa8775p chipset. As of now all >> SKUs have the same GPU fmax, so there is no requirement of >> speed bin support. >> >> Signed-off-by: Puranam V G Tejaswi <quic_pvgtejas@quicinc.com> >> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> >> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >> --- >> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 94 +++++++++++++++++++++++++++++++++++ >> 1 file changed, 94 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> index e8dbc8d820a6..c6cb18193787 100644 >> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >> @@ -3072,6 +3072,100 @@ tcsr_mutex: hwlock@1f40000 { >> #hwlock-cells = <1>; >> }; >> >> + gpu: gpu@3d00000 { >> + compatible = "qcom,adreno-663.0", "qcom,adreno"; > > Is the patchlevel zero for this SKU? Yes. There is only a single revision implemented downstream. > > >> + reg = <0x0 0x03d00000 0x0 0x40000>, >> + <0x0 0x03d9e000 0x0 0x1000>, >> + <0x0 0x03d61000 0x0 0x800>; >> + reg-names = "kgsl_3d0_reg_memory", >> + "cx_mem", >> + "cx_dbgc"; >> + interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; >> + iommus = <&adreno_smmu 0 0xc00>, >> + <&adreno_smmu 1 0xc00>; >> + operating-points-v2 = <&gpu_opp_table>; >> + qcom,gmu = <&gmu>; >> + interconnects = <&gem_noc MASTER_GFX3D QCOM_ICC_TAG_ALWAYS >> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; >> + interconnect-names = "gfx-mem"; >> + #cooling-cells = <2>; > > You might want to hook this up to a thermal-zone right away I am checking with our Thermal team on this. Will get back shortly. -Akhil. > > Konrad
This series adds support for Adreno 663 gpu found in SA8775P chipsets. The closest gpu which is currently supported in drm-msm is A660. Following are the major differences with that: 1. gmu/zap firmwares 2. Recommended to disable Level2 swizzling Verified kmscube/weston/glmark2-es2 with the below Mesa change [1]. This series is rebased on top of msm-next. Since they are already picked up, I have dropped the patches for msm-next in this revision. Remaining 2 devicetree patches are for Bjorn. Devicetree changes have a runtime dependency on the Display DT change [2]. [1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31211 [2] https://patchwork.freedesktop.org/patch/620500/?series=140216 To: Rob Clark <robdclark@gmail.com> To: Sean Paul <sean@poorly.run> To: Konrad Dybcio <konradybcio@kernel.org> To: Abhinav Kumar <quic_abhinavk@quicinc.com> To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> To: Marijn Suijten <marijn.suijten@somainline.org> To: David Airlie <airlied@gmail.com> To: Simona Vetter <simona@ffwll.ch> To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> To: Maxime Ripard <mripard@kernel.org> To: Thomas Zimmermann <tzimmermann@suse.de> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> To: Bjorn Andersson <andersson@kernel.org> To: Connor Abbott <cwabbott0@gmail.com> Cc: linux-arm-msm@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org -Akhil --- Changes in v3: - Rebased on the latest msm-next tip - Added R-b tags from Dmitry - Dropped patch #1 and #2 from v2 revision since they are already picked up in msm-next - Link to v2: https://lore.kernel.org/r/20241022-a663-gpu-support-v2-0-38da38234697@quicinc.com Changes in v2: - Fixed ubwc configuration (dimtry) - Split out platform dt patch (dimtry) - Fix formatting in the dt patch (dimtry) - Updated Opp table to include all levels - Updated bw IB votes to match downstream - Rebased on top of msm-next tip - Link to v1: https://lore.kernel.org/r/20240918-a663-gpu-support-v1-0-25fea3f3d64d@quicinc.com --- Puranam V G Tejaswi (2): arm64: dts: qcom: sa8775p: Add gpu and gmu nodes arm64: dts: qcom: sa8775p-ride: Enable Adreno 663 GPU arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 8 +++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 94 ++++++++++++++++++++++++++++++ 2 files changed, 102 insertions(+) --- base-commit: d6d1ad32d00714ecf9f1996173c6f98e43c5b022 change-id: 20240917-a663-gpu-support-b1475c828606 Best regards,