Message ID | 20241113021819.2616961-3-quic_yrangana@quicinc.com |
---|---|
State | New |
Headers | show |
Series | Enable TRNG for QCS8300 | expand |
On 13.11.2024 3:18 AM, Yuvaraj Ranganathan wrote: > The qcs8300 SoC has a True Random Number Generator, add the node with > the correct compatible set. > > Reviewed-by: Krzysztof Kozlowski <krzk+dt@kernel.org> > Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qcs8300.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi > index 2c35f96c3f28..2a3862568da2 100644 > --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi > @@ -588,6 +588,11 @@ &clk_virt SLAVE_QUP_CORE_0 0>, > }; > }; > > + rng@10d2000 { > + compatible = "qcom,qcs8300-trng", "qcom,trng"; > + reg = <0 0x010d2000 0 0x1000>; > + }; > + > config_noc: interconnect@14c0000 { > compatible = "qcom,qcs8300-config-noc"; > reg = <0x0 0x014c0000 0x0 0x13080>; There's a jarring style difference visible looking just at this diff :/ Konrad
diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi index 2c35f96c3f28..2a3862568da2 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi @@ -588,6 +588,11 @@ &clk_virt SLAVE_QUP_CORE_0 0>, }; }; + rng@10d2000 { + compatible = "qcom,qcs8300-trng", "qcom,trng"; + reg = <0 0x010d2000 0 0x1000>; + }; + config_noc: interconnect@14c0000 { compatible = "qcom,qcs8300-config-noc"; reg = <0x0 0x014c0000 0x0 0x13080>;