mbox series

[v8,0/5] Add SDM670 camera subsystem

Message ID 20241216223019.70155-8-mailingradian@gmail.com
Headers show
Series Add SDM670 camera subsystem | expand

Message

Richard Acayan Dec. 16, 2024, 10:30 p.m. UTC
This adds support for the camera subsystem on the Snapdragon 670.

Changes since v7 (20241210233534.614520-7-mailingradian@gmail.com):
- move regulators to CSIPHY blocks (3/5)
- move clocks before interrupts (2/5, 5/5)
- sort clocks alphanumerically (2/5, 5/5)
- rename example node to generic node name (2/5)

Changes since v6 (20241011023724.614584-7-mailingradian@gmail.com):
- set unit address in node name to first address in regs (2/5, 5/5)

Changes since v5 (20241001023520.547271-9-mailingradian@gmail.com):
- sort reg and reg-names alphabetically (2/5, 5/5)
- drop CCI I2C patches since they are applied (formerly 2/7, 3/7)

Changes since v4 (20240904020448.52035-9-mailingradian@gmail.com):
- change camss interrupts to rising edge in dts (7/7)
- change IRQs to rising edge in camss dt-bindings example (4/7)
- move gcc and ahb clocks in camss dt-bindings example (4/7)
- add reviewed-by for camcc dt-bindings patch (1/7)

Changes since v3 (20240819221051.31489-7-mailingradian@gmail.com):
- add specific sdm670 compatible for camcc to dt schema and dts (1/7, 6/7)
- pick up patch from Bryan for CCI driver (3/7)
- stop assigning CCI frequency in dts (7/7)
- add maxItems for sdm670 cci clocks (2/7)
- remove empty line at top of camss dt schema (4/7)
- move regs and reg-names up in camss dt schema (4/7)
- move gcc and ahb clocks up in dts and dt schema (4/7, 7/7)
- add reviewed-by from Vladimir for CCI dt-bindings patch (2/7)
- add reviewed-by from Bryan for dts patch (7/7)
- add reviewed-by from Krzysztof for camss dt-bindings patch (4/7)
- add rewiew tags for camss driver patch (5/7)

Changes since v2 (20240813230037.84004-8-mailingradian@gmail.com):
- drop unnecessary assigned AXI clock frequency (5/5)
- drop src clocks from cci (5/5)
- add unit name, remove mmio properties from port in example dts (2/5)
- correct the reg-names order (2/5)
- add parent_dev_ops to csid (3/5)
- remove CSID clocks from VFE (3/5)
- remove AXI clock from CSIPHY (3/5)
- change subsystem part of the commit message summary (3/5)
- add reviewed-by (4/5)

Changes since v1 (20240806224219.71623-7-mailingradian@gmail.com):
- define dedicated resource structs/arrays for sdm670 (3/5)
- separate camcc device tree node into its own patch (4/5)
- specify correct dual license (2/5)
- add include directives in dt-bindings camss example (2/5)
- remove src clocks from dt-bindings (2/5)
- remove src clocks from dtsi (5/5)
- add power-domain-names to camss (5/5)
- specify power domain names (3/5)
- restrict cci-i2c clocks (1/5)
- populate a commit message with hw info (2/5)
- reword commit message (3/5)

Richard Acayan (5):
  dt-bindings: clock: qcom,sdm845-camcc: add sdm670 compatible
  dt-bindings: media: camss: Add qcom,sdm670-camss
  media: qcom: camss: add support for SDM670 camss
  arm64: dts: qcom: sdm670: add camcc
  arm64: dts: qcom: sdm670: add camss and cci

 .../bindings/clock/qcom,sdm845-camcc.yaml     |   6 +-
 .../bindings/media/qcom,sdm670-camss.yaml     | 318 ++++++++++++++++++
 arch/arm64/boot/dts/qcom/sdm670.dtsi          | 195 +++++++++++
 drivers/media/platform/qcom/camss/camss.c     | 191 +++++++++++
 4 files changed, 709 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml

Comments

Richard Acayan Dec. 17, 2024, 8:25 p.m. UTC | #1
On Tue, Dec 17, 2024 at 09:31:50AM +0200, Vladimir Zapolskiy wrote:
> Hi Richard.
> 
> On 12/17/24 00:30, Richard Acayan wrote:
> > Add the camera subsystem and CCI used to interface with cameras on the
> > Snapdragon 670.
> > 
> > Signed-off-by: Richard Acayan <mailingradian@gmail.com>
> > Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> > ---
> >   arch/arm64/boot/dts/qcom/sdm670.dtsi | 185 +++++++++++++++++++++++++++
> >   1 file changed, 185 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> > index 328096b91126..d4e1251ada04 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> > @@ -6,6 +6,7 @@
> >    * Copyright (c) 2022, Richard Acayan. All rights reserved.
> >    */
> > +#include <dt-bindings/clock/qcom,camcc-sdm845.h>
> >   #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
> >   #include <dt-bindings/clock/qcom,gcc-sdm845.h>
> >   #include <dt-bindings/clock/qcom,rpmh.h>
> > @@ -1168,6 +1169,34 @@ tlmm: pinctrl@3400000 {
> >   			gpio-ranges = <&tlmm 0 0 151>;
> >   			wakeup-parent = <&pdc>;
> > +			cci0_default: cci0-default-state {
> > +				pins = "gpio17", "gpio18";
> > +				function = "cci_i2c";
> > +				drive-strength = <2>;
> > +				bias-pull-up;
> > +			};
> > +
> > +			cci0_sleep: cci0-sleep-state {
> > +				pins = "gpio17", "gpio18";
> > +				function = "cci_i2c";
> > +				drive-strength = <2>;
> > +				bias-pull-down;
> > +			};
> > +
> > +			cci1_default: cci1-default-state {
> > +				pins = "gpio19", "gpio20";
> > +				function = "cci_i2c";
> > +				drive-strength = <2>;
> > +				bias-pull-up;
> > +			};
> > +
> > +			cci1_sleep: cci1-sleep-state {
> > +				pins = "gpio19", "gpio20";
> > +				function = "cci_i2c";
> > +				drive-strength = <2>;
> > +				bias-pull-down;
> > +			};
> > +
> >   			qup_i2c0_default: qup-i2c0-default-state {
> >   				pins = "gpio0", "gpio1";
> >   				function = "qup0";
> > @@ -1400,6 +1429,162 @@ spmi_bus: spmi@c440000 {
> >   			#interrupt-cells = <4>;
> >   		};
> > +		cci: cci@ac4a000 {
> > +			compatible = "qcom,sdm670-cci", "qcom,msm8996-cci";
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +
> > +			reg = <0 0x0ac4a000 0 0x4000>;
> > +			interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
> > +			power-domains = <&camcc TITAN_TOP_GDSC>;
> > +
> > +			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> > +				 <&camcc CAM_CC_SOC_AHB_CLK>,
> > +				 <&camcc CAM_CC_CPAS_AHB_CLK>,
> > +				 <&camcc CAM_CC_CCI_CLK>;
> > +			clock-names = "camnoc_axi",
> > +				      "soc_ahb",
> > +				      "cpas_ahb",
> > +				      "cci";
> > +
> > +			pinctrl-names = "default", "sleep";
> > +			pinctrl-0 = <&cci0_default &cci1_default>;
> > +			pinctrl-1 = <&cci0_sleep &cci1_sleep>;
> > +
> > +			status = "disabled";
> > +
> > +			cci_i2c0: i2c-bus@0 {
> > +				reg = <0>;
> > +				clock-frequency = <1000000>;
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +			};
> > +
> > +			cci_i2c1: i2c-bus@1 {
> > +				reg = <1>;
> > +				clock-frequency = <1000000>;
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +			};
> > +		};
> > +
> > +		camss: camera-controller@acb3000 {
> 
> Wasn't it agreed recently to have 'isp' as a generic device name for CAMSS IP?

Yeah, will change.

> 
> > +			compatible = "qcom,sdm670-camss";
> > +			reg = <0 0x0acb3000 0 0x1000>,
> > +			      <0 0x0acba000 0 0x1000>,
> > +			      <0 0x0acc8000 0 0x1000>,
> > +			      <0 0x0ac65000 0 0x1000>,
> > +			      <0 0x0ac66000 0 0x1000>,
> > +			      <0 0x0ac67000 0 0x1000>,
> > +			      <0 0x0acaf000 0 0x4000>,
> > +			      <0 0x0acb6000 0 0x4000>,
> > +			      <0 0x0acc4000 0 0x4000>;
> > +			reg-names = "csid0",
> > +				    "csid1",
> > +				    "csid2",
> > +				    "csiphy0",
> > +				    "csiphy1",
> > +				    "csiphy2",
> > +				    "vfe0",
> > +				    "vfe1",
> > +				    "vfe_lite";
> > +
> > +			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> > +				 <&camcc CAM_CC_CPAS_AHB_CLK>,
> > +				 <&camcc CAM_CC_IFE_0_CSID_CLK>,
> > +				 <&camcc CAM_CC_IFE_1_CSID_CLK>,
> > +				 <&camcc CAM_CC_IFE_LITE_CSID_CLK>,
> > +				 <&camcc CAM_CC_CSIPHY0_CLK>,
> > +				 <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
> > +				 <&camcc CAM_CC_CSIPHY1_CLK>,
> > +				 <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
> > +				 <&camcc CAM_CC_CSIPHY2_CLK>,
> > +				 <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
> > +				 <&gcc GCC_CAMERA_AHB_CLK>,
> > +				 <&gcc GCC_CAMERA_AXI_CLK>,
> > +				 <&camcc CAM_CC_SOC_AHB_CLK>,
> > +				 <&camcc CAM_CC_IFE_0_CLK>,
> > +				 <&camcc CAM_CC_IFE_0_AXI_CLK>,
> > +				 <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
> > +				 <&camcc CAM_CC_IFE_1_CLK>,
> > +				 <&camcc CAM_CC_IFE_1_AXI_CLK>,
> > +				 <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
> > +				 <&camcc CAM_CC_IFE_LITE_CLK>,
> > +				 <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>;
> > +			clock-names = "camnoc_axi",
> > +				      "cpas_ahb",
> > +				      "csi0",
> > +				      "csi1",
> > +				      "csi2",
> > +				      "csiphy0",
> > +				      "csiphy0_timer",
> > +				      "csiphy1",
> > +				      "csiphy1_timer",
> > +				      "csiphy2",
> > +				      "csiphy2_timer",
> > +				      "gcc_camera_ahb",
> > +				      "gcc_camera_axi",
> > +				      "soc_ahb",
> > +				      "vfe0",
> > +				      "vfe0_axi",
> > +				      "vfe0_cphy_rx",
> > +				      "vfe1",
> > +				      "vfe1_axi",
> > +				      "vfe1_cphy_rx",
> > +				      "vfe_lite",
> > +				      "vfe_lite_cphy_rx";
> > +
> > +			interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
> > +				     <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
> > +				     <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
> > +				     <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
> > +				     <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
> > +				     <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
> > +				     <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
> > +				     <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
> > +				     <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>;
> > +			interrupt-names = "csid0",
> > +					  "csid1",
> > +					  "csid2",
> > +					  "csiphy0",
> > +					  "csiphy1",
> > +					  "csiphy2",
> > +					  "vfe0",
> > +					  "vfe1",
> > +					  "vfe_lite";
> > +
> > +			iommus = <&apps_smmu 0x808 0x0>,
> > +				 <&apps_smmu 0x810 0x8>,
> > +				 <&apps_smmu 0xc08 0x0>,
> > +				 <&apps_smmu 0xc10 0x8>;
> > +
> > +			power-domains = <&camcc IFE_0_GDSC>,
> > +					<&camcc IFE_1_GDSC>,
> > +					<&camcc TITAN_TOP_GDSC>;
> > +			power-domain-names = "ife0",
> > +					     "ife1",
> > +					     "top";
> > +
> > +			status = "disabled";
> > +
> > +			ports {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +
> > +				camss_port0: port@0 {
> > +					reg = <0>;
> > +				};
> > +
> > +				camss_port1: port@1 {
> > +					reg = <1>;
> > +				};
> > +
> > +				camss_port2: port@2 {
> 
> Likely labels to ports are excessive here, please remove them.

How would you imagine connecting a camera to the ports, then? For MDSS,
there's a label for the endpoint (mdss_dsi0_out) which the device DTS
can then reference:

	&mdss_dsi0_out {
		remote-endpoint = <&panel_in>;
		data-lanes = <0 1 2 3>;
	};

For CAMSS, the port labels would be used like so:

	&camss_port1 {
		camss_endpoint1: endpoint {
			clock-lanes = <7>;
			data-lanes = <0 1 2 3>;
			remote-endpoint = <&cam_front_endpoint>;
		};
	};

Without the labels, the connection might look something like:

	&camss {
		status = "okay";

		// Modification of existing /soc/isp@acb3000/ports node
		ports {
			// Modification of existing /soc/isp@acb3000/ports/port@1 node
			port@1 {
				// New node
				camss_endpoint1: endpoint {
					clock-lanes = <7>;
					data-lanes = <0 1 2 3>;
					remote-endpoint = <&cam_front_endpoint>;
				};
			};
		};
	};

which I believe is not preferred.
Richard Acayan Dec. 17, 2024, 11:06 p.m. UTC | #2
On Tue, Dec 17, 2024 at 11:34:20PM +0200, Vladimir Zapolskiy wrote:
> On 12/17/24 22:25, Richard Acayan wrote:
> > On Tue, Dec 17, 2024 at 09:31:50AM +0200, Vladimir Zapolskiy wrote:
> > > Hi Richard.
> > > 
> > > On 12/17/24 00:30, Richard Acayan wrote:
> > > > Add the camera subsystem and CCI used to interface with cameras on the
> > > > Snapdragon 670.
> > > > 
> > > > Signed-off-by: Richard Acayan <mailingradian@gmail.com>
> > > > Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> > > > ---
> > > >    arch/arm64/boot/dts/qcom/sdm670.dtsi | 185 +++++++++++++++++++++++++++
> > > >    1 file changed, 185 insertions(+)
> > > > 
> > > > diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> > > > index 328096b91126..d4e1251ada04 100644
> > > > --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
> > > > +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> > > > @@ -6,6 +6,7 @@
> > > >     * Copyright (c) 2022, Richard Acayan. All rights reserved.
> > > >     */
> > > > +#include <dt-bindings/clock/qcom,camcc-sdm845.h>
> > > >    #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
> > > >    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
> > > >    #include <dt-bindings/clock/qcom,rpmh.h>
> > > > @@ -1168,6 +1169,34 @@ tlmm: pinctrl@3400000 {
> > > >    			gpio-ranges = <&tlmm 0 0 151>;
> > > >    			wakeup-parent = <&pdc>;
> > > > +			cci0_default: cci0-default-state {
> > > > +				pins = "gpio17", "gpio18";
> > > > +				function = "cci_i2c";
> > > > +				drive-strength = <2>;
> > > > +				bias-pull-up;
> > > > +			};
> > > > +
> > > > +			cci0_sleep: cci0-sleep-state {
> > > > +				pins = "gpio17", "gpio18";
> > > > +				function = "cci_i2c";
> > > > +				drive-strength = <2>;
> > > > +				bias-pull-down;
> > > > +			};
> > > > +
> > > > +			cci1_default: cci1-default-state {
> > > > +				pins = "gpio19", "gpio20";
> > > > +				function = "cci_i2c";
> > > > +				drive-strength = <2>;
> > > > +				bias-pull-up;
> > > > +			};
> > > > +
> > > > +			cci1_sleep: cci1-sleep-state {
> > > > +				pins = "gpio19", "gpio20";
> > > > +				function = "cci_i2c";
> > > > +				drive-strength = <2>;
> > > > +				bias-pull-down;
> > > > +			};
> > > > +
> > > >    			qup_i2c0_default: qup-i2c0-default-state {
> > > >    				pins = "gpio0", "gpio1";
> > > >    				function = "qup0";
> > > > @@ -1400,6 +1429,162 @@ spmi_bus: spmi@c440000 {
> > > >    			#interrupt-cells = <4>;
> > > >    		};
> > > > +		cci: cci@ac4a000 {
> > > > +			compatible = "qcom,sdm670-cci", "qcom,msm8996-cci";
> > > > +			#address-cells = <1>;
> > > > +			#size-cells = <0>;
> > > > +
> > > > +			reg = <0 0x0ac4a000 0 0x4000>;
> > > > +			interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
> > > > +			power-domains = <&camcc TITAN_TOP_GDSC>;
> > > > +
> > > > +			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> > > > +				 <&camcc CAM_CC_SOC_AHB_CLK>,
> > > > +				 <&camcc CAM_CC_CPAS_AHB_CLK>,
> > > > +				 <&camcc CAM_CC_CCI_CLK>;
> > > > +			clock-names = "camnoc_axi",
> > > > +				      "soc_ahb",
> > > > +				      "cpas_ahb",
> > > > +				      "cci";
> > > > +
> > > > +			pinctrl-names = "default", "sleep";
> > > > +			pinctrl-0 = <&cci0_default &cci1_default>;
> > > > +			pinctrl-1 = <&cci0_sleep &cci1_sleep>;
> > > > +
> > > > +			status = "disabled";
> > > > +
> > > > +			cci_i2c0: i2c-bus@0 {
> > > > +				reg = <0>;
> > > > +				clock-frequency = <1000000>;
> > > > +				#address-cells = <1>;
> > > > +				#size-cells = <0>;
> > > > +			};
> > > > +
> > > > +			cci_i2c1: i2c-bus@1 {
> > > > +				reg = <1>;
> > > > +				clock-frequency = <1000000>;
> > > > +				#address-cells = <1>;
> > > > +				#size-cells = <0>;
> > > > +			};
> > > > +		};
> > > > +
> > > > +		camss: camera-controller@acb3000 {
> > > 
> > > Wasn't it agreed recently to have 'isp' as a generic device name for CAMSS IP?
> > 
> > Yeah, will change.
> > 
> > > 
> > > > +			compatible = "qcom,sdm670-camss";
> > > > +			reg = <0 0x0acb3000 0 0x1000>,
> > > > +			      <0 0x0acba000 0 0x1000>,
> > > > +			      <0 0x0acc8000 0 0x1000>,
> > > > +			      <0 0x0ac65000 0 0x1000>,
> > > > +			      <0 0x0ac66000 0 0x1000>,
> > > > +			      <0 0x0ac67000 0 0x1000>,
> > > > +			      <0 0x0acaf000 0 0x4000>,
> > > > +			      <0 0x0acb6000 0 0x4000>,
> > > > +			      <0 0x0acc4000 0 0x4000>;
> > > > +			reg-names = "csid0",
> > > > +				    "csid1",
> > > > +				    "csid2",
> > > > +				    "csiphy0",
> > > > +				    "csiphy1",
> > > > +				    "csiphy2",
> > > > +				    "vfe0",
> > > > +				    "vfe1",
> > > > +				    "vfe_lite";
> > > > +
> > > > +			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> > > > +				 <&camcc CAM_CC_CPAS_AHB_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_0_CSID_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_1_CSID_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_LITE_CSID_CLK>,
> > > > +				 <&camcc CAM_CC_CSIPHY0_CLK>,
> > > > +				 <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
> > > > +				 <&camcc CAM_CC_CSIPHY1_CLK>,
> > > > +				 <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
> > > > +				 <&camcc CAM_CC_CSIPHY2_CLK>,
> > > > +				 <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
> > > > +				 <&gcc GCC_CAMERA_AHB_CLK>,
> > > > +				 <&gcc GCC_CAMERA_AXI_CLK>,
> > > > +				 <&camcc CAM_CC_SOC_AHB_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_0_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_0_AXI_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_1_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_1_AXI_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_LITE_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>;
> > > > +			clock-names = "camnoc_axi",
> > > > +				      "cpas_ahb",
> > > > +				      "csi0",
> > > > +				      "csi1",
> > > > +				      "csi2",
> > > > +				      "csiphy0",
> > > > +				      "csiphy0_timer",
> > > > +				      "csiphy1",
> > > > +				      "csiphy1_timer",
> > > > +				      "csiphy2",
> > > > +				      "csiphy2_timer",
> > > > +				      "gcc_camera_ahb",
> > > > +				      "gcc_camera_axi",
> > > > +				      "soc_ahb",
> > > > +				      "vfe0",
> > > > +				      "vfe0_axi",
> > > > +				      "vfe0_cphy_rx",
> > > > +				      "vfe1",
> > > > +				      "vfe1_axi",
> > > > +				      "vfe1_cphy_rx",
> > > > +				      "vfe_lite",
> > > > +				      "vfe_lite_cphy_rx";
> > > > +
> > > > +			interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>;
> > > > +			interrupt-names = "csid0",
> > > > +					  "csid1",
> > > > +					  "csid2",
> > > > +					  "csiphy0",
> > > > +					  "csiphy1",
> > > > +					  "csiphy2",
> > > > +					  "vfe0",
> > > > +					  "vfe1",
> > > > +					  "vfe_lite";
> > > > +
> > > > +			iommus = <&apps_smmu 0x808 0x0>,
> > > > +				 <&apps_smmu 0x810 0x8>,
> > > > +				 <&apps_smmu 0xc08 0x0>,
> > > > +				 <&apps_smmu 0xc10 0x8>;
> > > > +
> > > > +			power-domains = <&camcc IFE_0_GDSC>,
> > > > +					<&camcc IFE_1_GDSC>,
> > > > +					<&camcc TITAN_TOP_GDSC>;
> > > > +			power-domain-names = "ife0",
> > > > +					     "ife1",
> > > > +					     "top";
> > > > +
> > > > +			status = "disabled";
> > > > +
> > > > +			ports {
> > > > +				#address-cells = <1>;
> > > > +				#size-cells = <0>;
> > > > +
> > > > +				camss_port0: port@0 {
> > > > +					reg = <0>;
> > > > +				};
> > > > +
> > > > +				camss_port1: port@1 {
> > > > +					reg = <1>;
> > > > +				};
> > > > +
> > > > +				camss_port2: port@2 {
> > > 
> > > Likely labels to ports are excessive here, please remove them.
> > 
> > How would you imagine connecting a camera to the ports, then? For MDSS,
> > there's a label for the endpoint (mdss_dsi0_out) which the device DTS
> > can then reference:
> > 
> > 	&mdss_dsi0_out {
> > 		remote-endpoint = <&panel_in>;
> > 		data-lanes = <0 1 2 3>;
> > 	};
> > 
> > For CAMSS, the port labels would be used like so:
> > 
> > 	&camss_port1 {
> > 		camss_endpoint1: endpoint {
> > 			clock-lanes = <7>;
> > 			data-lanes = <0 1 2 3>;
> > 			remote-endpoint = <&cam_front_endpoint>;
> > 		};
> > 	};
> > 
> > Without the labels, the connection might look something like:
> > 
> 
> Even if you insist on moving endpoints out of &camss, then why do
> you add port labels? Unavoidably you do have endpoint labels, so
> it's non-obvious why the version above is better than the next one:
> 
> 	&camss_endpoint1 {
> 		clock-lanes = <7>;
> 		data-lanes = <0 1 2 3>;
> 		remote-endpoint = <&cam_front_endpoint>;
> 	};
> 
> Minus two lines of code, minus one label. Port labels are not needed.

Thanks for having me look into this.

In DTSI:

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		camss_port0: port@0 {
			reg = <0>;

			camss_endpoint0: endpoint {
			};
		};

		camss_port1: port@1 {
			reg = <1>;

			camss_endpoint1: endpoint {
			};
		};

		camss_port2: port@2 {
			reg = <2>;

			camss_endpoint2: endpoint {
			};
		};
	};

The example above doesn't work as-is.

	[   15.387215] qcom-camss acb3000.camera-controller: Cannot get remote parent
	[   15.387604] qcom-camss acb3000.camera-controller: probe with driver qcom-camss failed with error -22

However, the camss_of_parse_ports function has a way to make it work,
even if all endpoint nodes are present.

In DTSI:

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		camss_port0: port@0 {
			reg = <0>;

			camss_endpoint0: endpoint {
				status = "disabled";
			};
		};

		camss_port1: port@1 {
			reg = <1>;

			camss_endpoint1: endpoint {
				status = "disabled";
			};
		};

		camss_port2: port@2 {
			reg = <2>;

			camss_endpoint2: endpoint {
				status = "disabled";
			};
		};
	};

In DTS:

 	&camss_endpoint1 {
 		clock-lanes = <7>;
 		data-lanes = <0 1 2 3>;
 		remote-endpoint = <&cam_front_endpoint>;
		status = "okay";
 	};

I didn't know how to make the working example.