| Message ID | 20250129105810.1094359-1-quic_periyasa@quicinc.com |
|---|---|
| Headers | show |
| Series | wifi: ath12k: Add peer extended Rx statistics debugfs support | expand |
On 1/29/2025 4:28 PM, Karthikeyan Periyasamy wrote: > Currently, monitor is not enabled. However, in the future, the monitor > will be enabled. Therefore, add the necessary HAL_PHYRX_GENERIC_U_SIG TLV > parsing support in monitor Rx path, which help to populate the EHT > radiotap data. > > Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.3.1-00173-QCAHKSWPL_SILICONZ-1 > Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 > > Co-developed-by: P Praneesh <quic_ppranees@quicinc.com> > Signed-off-by: P Praneesh <quic_ppranees@quicinc.com> > Signed-off-by: Karthikeyan Periyasamy <quic_periyasa@quicinc.com> > --- > drivers/net/wireless/ath/ath12k/dp_mon.c | 205 ++++++++++++++++++++++- > drivers/net/wireless/ath/ath12k/hal_rx.h | 60 +++++++ > 2 files changed, 264 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/wireless/ath/ath12k/dp_mon.c b/drivers/net/wireless/ath/ath12k/dp_mon.c > index 4e9a60181c06..61fd481b7a3b 100644 > --- a/drivers/net/wireless/ath/ath12k/dp_mon.c > +++ b/drivers/net/wireless/ath/ath12k/dp_mon.c > @@ -10,6 +10,9 @@ > #include "dp_tx.h" > #include "peer.h" > > +#define ATH12K_LE32_DEC_ENC(value, dec_bits, enc_bits) \ > + u32_encode_bits(le32_get_bits(value, dec_bits), enc_bits) > + > static void > ath12k_dp_mon_rx_handle_ofdma_info(const struct hal_rx_ppdu_end_user_stats *ppdu_end_user, > struct hal_rx_user_status *rx_user_status) > @@ -562,6 +565,187 @@ static void ath12k_dp_mon_parse_he_sig_su(const struct hal_rx_he_sig_a_su_info * > ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_SU; > } > > +static void > +ath12k_dp_mon_hal_rx_parse_u_sig_cmn(const struct hal_mon_usig_cmn *cmn, > + struct hal_rx_mon_ppdu_info *ppdu_info) > +{ > + u32 common; > + u8 bw; > + > + bw = le32_get_bits(cmn->info0, HAL_RX_USIG_CMN_INFO0_BW); > + > + common = __le32_to_cpu(ppdu_info->usig.common); > + common |= IEEE80211_RADIOTAP_EHT_USIG_COMMON_PHY_VER_KNOWN | > + IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW_KNOWN | > + IEEE80211_RADIOTAP_EHT_USIG_COMMON_UL_DL_KNOWN | > + IEEE80211_RADIOTAP_EHT_USIG_COMMON_BSS_COLOR_KNOWN | > + IEEE80211_RADIOTAP_EHT_USIG_COMMON_TXOP_KNOWN | > + ATH12K_LE32_DEC_ENC(cmn->info0, > + HAL_RX_USIG_CMN_INFO0_PHY_VERSION, > + IEEE80211_RADIOTAP_EHT_USIG_COMMON_PHY_VER) | > + u32_encode_bits(bw, IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW) | > + ATH12K_LE32_DEC_ENC(cmn->info0, > + HAL_RX_USIG_CMN_INFO0_UL_DL, > + IEEE80211_RADIOTAP_EHT_USIG_COMMON_UL_DL) | > + ATH12K_LE32_DEC_ENC(cmn->info0, > + HAL_RX_USIG_CMN_INFO0_BSS_COLOR, > + IEEE80211_RADIOTAP_EHT_USIG_COMMON_BSS_COLOR) | > + ATH12K_LE32_DEC_ENC(cmn->info0, > + HAL_RX_USIG_CMN_INFO0_TXOP, > + IEEE80211_RADIOTAP_EHT_USIG_COMMON_TXOP); > + ppdu_info->usig.common = cpu_to_le32(common); > + > + switch (bw) { > + default: > + fallthrough; > + case HAL_EHT_BW_20: > + ppdu_info->bw = HAL_RX_BW_20MHZ; > + break; > + case HAL_EHT_BW_40: > + ppdu_info->bw = HAL_RX_BW_40MHZ; > + break; > + case HAL_EHT_BW_80: > + ppdu_info->bw = HAL_RX_BW_80MHZ; > + break; > + case HAL_EHT_BW_160: > + ppdu_info->bw = HAL_RX_BW_160MHZ; > + break; > + case HAL_EHT_BW_320_1: > + case HAL_EHT_BW_320_2: > + ppdu_info->bw = HAL_RX_BW_320MHZ; > + break; > + } > +} > + > +static void > +ath12k_dp_mon_hal_rx_parse_u_sig_tb(const struct hal_mon_usig_tb *usig_tb, > + struct hal_rx_mon_ppdu_info *ppdu_info) > +{ > + enum ieee80211_radiotap_eht_usig_tb spatial_reuse1, spatial_reuse2; > + u32 common, value, mask; > + > + spatial_reuse1 = IEEE80211_RADIOTAP_EHT_USIG2_TB_B3_B6_SPATIAL_REUSE_1; > + spatial_reuse2 = IEEE80211_RADIOTAP_EHT_USIG2_TB_B7_B10_SPATIAL_REUSE_2; > + > + common = __le32_to_cpu(ppdu_info->usig.common); > + value = __le32_to_cpu(ppdu_info->usig.value); > + mask = __le32_to_cpu(ppdu_info->usig.mask); > + > + common |= ATH12K_LE32_DEC_ENC(usig_tb->info0, > + HAL_RX_USIG_TB_INFO0_RX_INTEG_CHECK_PASS, > + IEEE80211_RADIOTAP_EHT_USIG_COMMON_BAD_USIG_CRC); > + > + value |= IEEE80211_RADIOTAP_EHT_USIG1_TB_B20_B25_DISREGARD | > + ATH12K_LE32_DEC_ENC(usig_tb->info0, > + HAL_RX_USIG_TB_INFO0_PPDU_TYPE_COMP_MODE, > + IEEE80211_RADIOTAP_EHT_USIG2_TB_B0_B1_PPDU_TYPE) | > + IEEE80211_RADIOTAP_EHT_USIG2_TB_B2_VALIDATE | > + ATH12K_LE32_DEC_ENC(usig_tb->info0, > + HAL_RX_USIG_TB_INFO0_SPATIAL_REUSE_1, > + spatial_reuse1) | > + ATH12K_LE32_DEC_ENC(usig_tb->info0, > + HAL_RX_USIG_TB_INFO0_SPATIAL_REUSE_2, > + spatial_reuse2) | > + IEEE80211_RADIOTAP_EHT_USIG2_TB_B11_B15_DISREGARD | > + ATH12K_LE32_DEC_ENC(usig_tb->info0, > + HAL_RX_USIG_TB_INFO0_CRC, > + IEEE80211_RADIOTAP_EHT_USIG2_TB_B16_B19_CRC) | > + ATH12K_LE32_DEC_ENC(usig_tb->info0, > + HAL_RX_USIG_TB_INFO0_TAIL, > + IEEE80211_RADIOTAP_EHT_USIG2_TB_B20_B25_TAIL); > + > + mask |= IEEE80211_RADIOTAP_EHT_USIG1_TB_B20_B25_DISREGARD | > + IEEE80211_RADIOTAP_EHT_USIG2_TB_B0_B1_PPDU_TYPE | > + IEEE80211_RADIOTAP_EHT_USIG2_TB_B2_VALIDATE | > + spatial_reuse1 | spatial_reuse2 | > + IEEE80211_RADIOTAP_EHT_USIG2_TB_B11_B15_DISREGARD | > + IEEE80211_RADIOTAP_EHT_USIG2_TB_B16_B19_CRC | > + IEEE80211_RADIOTAP_EHT_USIG2_TB_B20_B25_TAIL; > + > + ppdu_info->usig.common = cpu_to_le32(common); > + ppdu_info->usig.value = cpu_to_le32(value); > + ppdu_info->usig.mask = cpu_to_le32(mask); > +} > + > +static void > +ath12k_dp_mon_hal_rx_parse_u_sig_mu(const struct hal_mon_usig_mu *usig_mu, > + struct hal_rx_mon_ppdu_info *ppdu_info) > +{ > + enum ieee80211_radiotap_eht_usig_mu sig_symb, punc; > + u32 common, value, mask; > + > + sig_symb = IEEE80211_RADIOTAP_EHT_USIG2_MU_B11_B15_EHT_SIG_SYMBOLS; > + punc = IEEE80211_RADIOTAP_EHT_USIG2_MU_B3_B7_PUNCTURED_INFO; > + > + common = __le32_to_cpu(ppdu_info->usig.common); > + value = __le32_to_cpu(ppdu_info->usig.value); > + mask = __le32_to_cpu(ppdu_info->usig.mask); > + > + common |= ATH12K_LE32_DEC_ENC(usig_mu->info0, > + HAL_RX_USIG_MU_INFO0_RX_INTEG_CHECK_PASS, > + IEEE80211_RADIOTAP_EHT_USIG_COMMON_BAD_USIG_CRC); > + > + value |= IEEE80211_RADIOTAP_EHT_USIG1_MU_B20_B24_DISREGARD | > + IEEE80211_RADIOTAP_EHT_USIG1_MU_B25_VALIDATE | > + ATH12K_LE32_DEC_ENC(usig_mu->info0, > + HAL_RX_USIG_MU_INFO0_PPDU_TYPE_COMP_MODE, > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B0_B1_PPDU_TYPE) | > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B2_VALIDATE | > + ATH12K_LE32_DEC_ENC(usig_mu->info0, > + HAL_RX_USIG_MU_INFO0_PUNC_CH_INFO, > + punc) | > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B8_VALIDATE | > + ATH12K_LE32_DEC_ENC(usig_mu->info0, > + HAL_RX_USIG_MU_INFO0_EHT_SIG_MCS, > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B9_B10_SIG_MCS) | > + ATH12K_LE32_DEC_ENC(usig_mu->info0, > + HAL_RX_USIG_MU_INFO0_NUM_EHT_SIG_SYM, > + sig_symb) | > + ATH12K_LE32_DEC_ENC(usig_mu->info0, > + HAL_RX_USIG_MU_INFO0_CRC, > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B16_B19_CRC) | > + ATH12K_LE32_DEC_ENC(usig_mu->info0, > + HAL_RX_USIG_MU_INFO0_TAIL, > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B20_B25_TAIL); > + > + mask |= IEEE80211_RADIOTAP_EHT_USIG1_MU_B20_B24_DISREGARD | > + IEEE80211_RADIOTAP_EHT_USIG1_MU_B25_VALIDATE | > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B0_B1_PPDU_TYPE | > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B2_VALIDATE | > + punc | > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B8_VALIDATE | > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B9_B10_SIG_MCS | > + sig_symb | > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B16_B19_CRC | > + IEEE80211_RADIOTAP_EHT_USIG2_MU_B20_B25_TAIL; > + > + ppdu_info->usig.common = cpu_to_le32(common); > + ppdu_info->usig.value = cpu_to_le32(value); > + ppdu_info->usig.mask = cpu_to_le32(mask); > +} > + > +static void > +ath12k_dp_mon_hal_rx_parse_u_sig_hdr(const struct hal_mon_usig_hdr *usig, > + struct hal_rx_mon_ppdu_info *ppdu_info) > +{ > + const struct hal_mon_usig_cmn *usig_cmn = &usig->cmn; > + u8 comp_mode; > + bool ap_ppdu; > + > + ppdu_info->eht_usig = true; > + > + ath12k_dp_mon_hal_rx_parse_u_sig_cmn(&usig->cmn, ppdu_info); > + > + ap_ppdu = le32_get_bits(usig_cmn->info0, HAL_RX_USIG_CMN_INFO0_UL_DL); > + comp_mode = le32_get_bits(usig->non_cmn.mu.info0, > + HAL_RX_USIG_MU_INFO0_PPDU_TYPE_COMP_MODE); > + > + if (comp_mode == 0 && ap_ppdu) > + ath12k_dp_mon_hal_rx_parse_u_sig_tb(&usig->non_cmn.tb, ppdu_info); > + else > + ath12k_dp_mon_hal_rx_parse_u_sig_mu(&usig->non_cmn.mu, ppdu_info); > +} > + > static enum hal_rx_mon_status > ath12k_dp_mon_rx_parse_status_tlv(struct ath12k *ar, > struct ath12k_mon_data *pmon, > @@ -774,6 +958,9 @@ ath12k_dp_mon_rx_parse_status_tlv(struct ath12k *ar, > return HAL_RX_MON_STATUS_MSDU_END; > case HAL_RX_MPDU_END: > return HAL_RX_MON_STATUS_MPDU_END; > + case HAL_PHYRX_GENERIC_U_SIG: > + ath12k_dp_mon_hal_rx_parse_u_sig_hdr(tlv_data, ppdu_info); > + break; > case HAL_DUMMY: > return HAL_RX_MON_STATUS_BUF_DONE; > case HAL_RX_PPDU_END_STATUS_DONE: > @@ -971,7 +1158,23 @@ static void ath12k_dp_mon_update_radiotap(struct ath12k *ar, > rxs->ampdu_reference = ampdu_id; > } > > - if (ppduinfo->he_mu_flags) { > + if (ppduinfo->eht_usig) { > + struct ieee80211_radiotap_tlv *tlv; > + struct ieee80211_radiotap_eht_usig *usig; > + u16 len = sizeof(*usig); > + > + rxs->flag |= RX_FLAG_RADIOTAP_TLV_AT_END; > + rxs->encoding = RX_ENC_EHT; > + > + skb_reset_mac_header(mon_skb); > + > + tlv = skb_push(mon_skb, sizeof(*tlv) + len); > + tlv->type = cpu_to_le16(IEEE80211_RADIOTAP_EHT_USIG); > + tlv->len = cpu_to_le16(len); > + > + usig = (struct ieee80211_radiotap_eht_usig *)tlv->data; > + *usig = ppduinfo->usig; > + } else if (ppduinfo->he_mu_flags) { > rxs->flag |= RX_FLAG_RADIOTAP_HE_MU; > rxs->encoding = RX_ENC_HE; > ptr = skb_push(mon_skb, sizeof(struct ieee80211_radiotap_he_mu)); > diff --git a/drivers/net/wireless/ath/ath12k/hal_rx.h b/drivers/net/wireless/ath/ath12k/hal_rx.h > index 96954b2f7ca6..2da16f27e76c 100644 > --- a/drivers/net/wireless/ath/ath12k/hal_rx.h > +++ b/drivers/net/wireless/ath/ath12k/hal_rx.h > @@ -235,6 +235,8 @@ struct hal_rx_mon_ppdu_info { > bool is_ampdu; > u8 medium_prot_type; > bool ppdu_continuation; > + bool eht_usig; > + struct ieee80211_radiotap_eht_usig usig; > }; > > #define HAL_RX_PPDU_START_INFO0_PPDU_ID GENMASK(15, 0) > @@ -678,6 +680,64 @@ enum nl80211_he_ru_alloc ath12k_he_ru_tones_to_nl80211_he_ru_alloc(u16 ru_tones) > return ret; > } > > +enum hal_eht_bw { > + HAL_EHT_BW_20, > + HAL_EHT_BW_40, > + HAL_EHT_BW_80, > + HAL_EHT_BW_160, > + HAL_EHT_BW_320_1, > + HAL_EHT_BW_320_2, > +}; > + > +#define HAL_RX_USIG_CMN_INFO0_PHY_VERSION GENMASK(2, 0) > +#define HAL_RX_USIG_CMN_INFO0_BW GENMASK(5, 3) > +#define HAL_RX_USIG_CMN_INFO0_UL_DL BIT(6) > +#define HAL_RX_USIG_CMN_INFO0_BSS_COLOR GENMASK(12, 7) > +#define HAL_RX_USIG_CMN_INFO0_TXOP GENMASK(19, 13) > +#define HAL_RX_USIG_CMN_INFO0_DISREGARD GENMASK(25, 20) > +#define HAL_RX_USIG_CMN_INFO0_VALIDATE BIT(26) > + > +struct hal_mon_usig_cmn { > + __le32 info0; > +} __packed; > + > +#define HAL_RX_USIG_TB_INFO0_PPDU_TYPE_COMP_MODE GENMASK(1, 0) > +#define HAL_RX_USIG_TB_INFO0_VALIDATE BIT(2) > +#define HAL_RX_USIG_TB_INFO0_SPATIAL_REUSE_1 GENMASK(6, 3) > +#define HAL_RX_USIG_TB_INFO0_SPATIAL_REUSE_2 GENMASK(10, 7) > +#define HAL_RX_USIG_TB_INFO0_DISREGARD_1 GENMASK(15, 11) > +#define HAL_RX_USIG_TB_INFO0_CRC GENMASK(19, 16) > +#define HAL_RX_USIG_TB_INFO0_TAIL GENMASK(25, 20) > +#define HAL_RX_USIG_TB_INFO0_RX_INTEG_CHECK_PASS BIT(31) > + > +struct hal_mon_usig_tb { > + __le32 info0; > +} __packed; > + > +#define HAL_RX_USIG_MU_INFO0_PPDU_TYPE_COMP_MODE GENMASK(1, 0) > +#define HAL_RX_USIG_MU_INFO0_VALIDATE_1 BIT(2) > +#define HAL_RX_USIG_MU_INFO0_PUNC_CH_INFO GENMASK(7, 3) > +#define HAL_RX_USIG_MU_INFO0_VALIDATE_2 BIT(8) > +#define HAL_RX_USIG_MU_INFO0_EHT_SIG_MCS GENMASK(10, 9) > +#define HAL_RX_USIG_MU_INFO0_NUM_EHT_SIG_SYM GENMASK(15, 11) > +#define HAL_RX_USIG_MU_INFO0_CRC GENMASK(20, 16) > +#define HAL_RX_USIG_MU_INFO0_TAIL GENMASK(26, 21) > +#define HAL_RX_USIG_MU_INFO0_RX_INTEG_CHECK_PASS BIT(31) > + > +struct hal_mon_usig_mu { > + __le32 info0; > +} __packed; > + > +union hal_mon_usig_non_cmn { > + struct hal_mon_usig_tb tb; > + struct hal_mon_usig_mu mu; > +}; > + > +struct hal_mon_usig_hdr { > + struct hal_mon_usig_cmn cmn; > + union hal_mon_usig_non_cmn non_cmn; > +} __packed; > + > void ath12k_hal_reo_status_queue_stats(struct ath12k_base *ab, > struct hal_tlv_64_hdr *tlv, > struct hal_reo_status *status); Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com>
On 1/29/2025 4:28 PM, Karthikeyan Periyasamy wrote: > Currently, monitor is not enabled. However, in the future, the monitor > will be enabled. Therefore, add necessary HAL_RX_PPDU_START_USER_INFO TLV > parsing support in monitor Rx path, which help to populate the EHT radiotap > data. > > Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.3.1-00173-QCAHKSWPL_SILICONZ-1 > Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 > > Co-developed-by: P Praneesh <quic_ppranees@quicinc.com> > Signed-off-by: P Praneesh <quic_ppranees@quicinc.com> > Signed-off-by: Karthikeyan Periyasamy <quic_periyasa@quicinc.com> > --- > drivers/net/wireless/ath/ath12k/dp_mon.c | 307 +++++++++++++++++++++- > drivers/net/wireless/ath/ath12k/hal_rx.h | 291 +++++++++++++++++--- > drivers/net/wireless/ath/ath12k/rx_desc.h | 9 - > 3 files changed, 551 insertions(+), 56 deletions(-) > > diff --git a/drivers/net/wireless/ath/ath12k/dp_mon.c b/drivers/net/wireless/ath/ath12k/dp_mon.c > index dd17607d470d..96e9d68618d3 100644 > --- a/drivers/net/wireless/ath/ath12k/dp_mon.c > +++ b/drivers/net/wireless/ath/ath12k/dp_mon.c > @@ -81,7 +81,7 @@ ath12k_dp_mon_rx_populate_mu_user_info(const struct hal_rx_ppdu_end_user_stats * > static void ath12k_dp_mon_parse_vht_sig_a(const struct hal_rx_vht_sig_a_info *vht_sig, > struct hal_rx_mon_ppdu_info *ppdu_info) > { > - u32 nsts, group_id, info0, info1; > + u32 nsts, info0, info1; > u8 gi_setting; > > info0 = __le32_to_cpu(vht_sig->info0); > @@ -109,12 +109,8 @@ static void ath12k_dp_mon_parse_vht_sig_a(const struct hal_rx_vht_sig_a_info *vh > ppdu_info->bw = u32_get_bits(info0, HAL_RX_VHT_SIG_A_INFO_INFO0_BW); > ppdu_info->beamformed = u32_get_bits(info1, > HAL_RX_VHT_SIG_A_INFO_INFO1_BEAMFORMED); > - group_id = u32_get_bits(info0, HAL_RX_VHT_SIG_A_INFO_INFO0_GROUP_ID); > - if (group_id == 0 || group_id == 63) > - ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_SU; > - else > - ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_MIMO; > - ppdu_info->vht_flag_values5 = group_id; > + ppdu_info->vht_flag_values5 = u32_get_bits(info0, > + HAL_RX_VHT_SIG_A_INFO_INFO0_GROUP_ID); > ppdu_info->vht_flag_values3[0] = (((ppdu_info->mcs) << 4) | > ppdu_info->nss); > ppdu_info->vht_flag_values2 = ppdu_info->bw; > @@ -134,7 +130,6 @@ static void ath12k_dp_mon_parse_ht_sig(const struct hal_rx_ht_sig_info *ht_sig, > ppdu_info->ldpc = u32_get_bits(info1, HAL_RX_HT_SIG_INFO_INFO1_FEC_CODING); > ppdu_info->gi = u32_get_bits(info1, HAL_RX_HT_SIG_INFO_INFO1_GI); > ppdu_info->nss = (ppdu_info->mcs >> 3); > - ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_SU; > } > > static void ath12k_dp_mon_parse_l_sig_b(const struct hal_rx_lsig_b_info *lsigb, > @@ -166,7 +161,6 @@ static void ath12k_dp_mon_parse_l_sig_b(const struct hal_rx_lsig_b_info *lsigb, > > ppdu_info->rate = rate; > ppdu_info->cck_flag = 1; > - ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_SU; > } > > static void ath12k_dp_mon_parse_l_sig_a(const struct hal_rx_lsig_a_info *lsiga, > @@ -206,7 +200,6 @@ static void ath12k_dp_mon_parse_l_sig_a(const struct hal_rx_lsig_a_info *lsiga, > } > > ppdu_info->rate = rate; > - ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_SU; > } > > static void > @@ -243,7 +236,6 @@ ath12k_dp_mon_parse_he_sig_b2_ofdma(const struct hal_rx_he_sig_b2_ofdma_info *of > ppdu_info->nss = u32_get_bits(info0, HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_NSTS); > ppdu_info->beamformed = u32_get_bits(info0, > HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_TXBF); > - ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_OFDMA; > } > > static void > @@ -283,7 +275,6 @@ ath12k_dp_mon_parse_he_sig_b1_mu(const struct hal_rx_he_sig_b1_mu_info *he_sig_b > HAL_RX_HE_SIG_B1_MU_INFO_INFO0_RU_ALLOCATION); > ppdu_info->ru_alloc = ath12k_he_ru_tones_to_nl80211_he_ru_alloc(ru_tones); > ppdu_info->he_RU[0] = ru_tones; > - ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_MIMO; > } > > static void > @@ -417,7 +408,6 @@ ath12k_dp_mon_parse_he_sig_mu(const struct hal_rx_he_sig_a_mu_dl_info *he_sig_a_ > > ppdu_info->is_stbc = info1 & > HAL_RX_HE_SIG_A_MU_DL_INFO1_STBC; > - ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_MIMO; > } > > static void ath12k_dp_mon_parse_he_sig_su(const struct hal_rx_he_sig_a_su_info *he_sig_a, > @@ -565,7 +555,6 @@ static void ath12k_dp_mon_parse_he_sig_su(const struct hal_rx_he_sig_a_su_info * > dcm = u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_DCM); > ppdu_info->nss = u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_NSTS); > ppdu_info->dcm = dcm; > - ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_SU; > } > > static void > @@ -1141,6 +1130,292 @@ ath12k_dp_mon_parse_eht_sig_hdr(struct hal_rx_mon_ppdu_info *ppdu_info, > ath12k_dp_mon_hal_rx_parse_eht_sig_ofdma(tlv_data, ppdu_info); > } > > +static inline enum ath12k_eht_ru_size > +hal_rx_mon_hal_ru_size_to_ath12k_ru_size(u32 hal_ru_size) > +{ > + switch (hal_ru_size) { > + case HAL_EHT_RU_26: > + return ATH12K_EHT_RU_26; > + case HAL_EHT_RU_52: > + return ATH12K_EHT_RU_52; > + case HAL_EHT_RU_78: > + return ATH12K_EHT_RU_52_26; > + case HAL_EHT_RU_106: > + return ATH12K_EHT_RU_106; > + case HAL_EHT_RU_132: > + return ATH12K_EHT_RU_106_26; > + case HAL_EHT_RU_242: > + return ATH12K_EHT_RU_242; > + case HAL_EHT_RU_484: > + return ATH12K_EHT_RU_484; > + case HAL_EHT_RU_726: > + return ATH12K_EHT_RU_484_242; > + case HAL_EHT_RU_996: > + return ATH12K_EHT_RU_996; > + case HAL_EHT_RU_996x2: > + return ATH12K_EHT_RU_996x2; > + case HAL_EHT_RU_996x3: > + return ATH12K_EHT_RU_996x3; > + case HAL_EHT_RU_996x4: > + return ATH12K_EHT_RU_996x4; > + case HAL_EHT_RU_NONE: > + return ATH12K_EHT_RU_INVALID; > + case HAL_EHT_RU_996_484: > + return ATH12K_EHT_RU_996_484; > + case HAL_EHT_RU_996x2_484: > + return ATH12K_EHT_RU_996x2_484; > + case HAL_EHT_RU_996x3_484: > + return ATH12K_EHT_RU_996x3_484; > + case HAL_EHT_RU_996_484_242: > + return ATH12K_EHT_RU_996_484_242; > + default: > + return ATH12K_EHT_RU_INVALID; > + } > +} > + > +static inline u32 > +hal_rx_ul_ofdma_ru_size_to_width(enum ath12k_eht_ru_size ru_size) > +{ > + switch (ru_size) { > + case ATH12K_EHT_RU_26: > + return RU_26; > + case ATH12K_EHT_RU_52: > + return RU_52; > + case ATH12K_EHT_RU_52_26: > + return RU_52_26; > + case ATH12K_EHT_RU_106: > + return RU_106; > + case ATH12K_EHT_RU_106_26: > + return RU_106_26; > + case ATH12K_EHT_RU_242: > + return RU_242; > + case ATH12K_EHT_RU_484: > + return RU_484; > + case ATH12K_EHT_RU_484_242: > + return RU_484_242; > + case ATH12K_EHT_RU_996: > + return RU_996; > + case ATH12K_EHT_RU_996_484: > + return RU_996_484; > + case ATH12K_EHT_RU_996_484_242: > + return RU_996_484_242; > + case ATH12K_EHT_RU_996x2: > + return RU_2X996; > + case ATH12K_EHT_RU_996x2_484: > + return RU_2X996_484; > + case ATH12K_EHT_RU_996x3: > + return RU_3X996; > + case ATH12K_EHT_RU_996x3_484: > + return RU_3X996_484; > + case ATH12K_EHT_RU_996x4: > + return RU_4X996; > + default: > + return RU_INVALID; > + } > +} > + > +static void > +ath12k_dp_mon_hal_rx_parse_user_info(const struct hal_receive_user_info *rx_usr_info, > + u16 user_id, > + struct hal_rx_mon_ppdu_info *ppdu_info) > +{ > + struct hal_rx_user_status *mon_rx_user_status = NULL; > + struct hal_rx_radiotap_eht *eht = &ppdu_info->eht_info.eht; > + enum ath12k_eht_ru_size rtap_ru_size = ATH12K_EHT_RU_INVALID; > + u32 ru_width, reception_type, ru_index = HAL_EHT_RU_INVALID; > + u32 ru_type_80_0, ru_start_index_80_0; > + u32 ru_type_80_1, ru_start_index_80_1; > + u32 ru_type_80_2, ru_start_index_80_2; > + u32 ru_type_80_3, ru_start_index_80_3; > + u32 ru_size = 0, num_80mhz_with_ru = 0; > + u64 ru_index_320mhz = 0; > + u32 ru_index_per80mhz; > + > + reception_type = le32_get_bits(rx_usr_info->info0, > + HAL_RX_USR_INFO0_RECEPTION_TYPE); > + > + switch (reception_type) { > + case HAL_RECEPTION_TYPE_SU: > + ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_SU; > + break; > + case HAL_RECEPTION_TYPE_DL_MU_MIMO: > + case HAL_RECEPTION_TYPE_UL_MU_MIMO: > + ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_MIMO; > + break; > + case HAL_RECEPTION_TYPE_DL_MU_OFMA: > + case HAL_RECEPTION_TYPE_UL_MU_OFDMA: > + ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_OFDMA; > + break; > + case HAL_RECEPTION_TYPE_DL_MU_OFDMA_MIMO: > + case HAL_RECEPTION_TYPE_UL_MU_OFDMA_MIMO: > + ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_OFDMA_MIMO; > + } > + > + ppdu_info->is_stbc = le32_get_bits(rx_usr_info->info0, HAL_RX_USR_INFO0_STBC); > + ppdu_info->ldpc = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_LDPC); > + ppdu_info->dcm = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_STA_DCM); > + ppdu_info->bw = le32_get_bits(rx_usr_info->info1, HAL_RX_USR_INFO1_RX_BW); > + ppdu_info->mcs = le32_get_bits(rx_usr_info->info1, HAL_RX_USR_INFO1_MCS); > + ppdu_info->nss = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_NSS) + 1; > + > + if (user_id < HAL_MAX_UL_MU_USERS) { > + mon_rx_user_status = &ppdu_info->userstats[user_id]; > + mon_rx_user_status->mcs = ppdu_info->mcs; > + mon_rx_user_status->nss = ppdu_info->nss; > + } > + > + if (!(ppdu_info->reception_type == HAL_RX_RECEPTION_TYPE_MU_MIMO || > + ppdu_info->reception_type == HAL_RX_RECEPTION_TYPE_MU_OFDMA || > + ppdu_info->reception_type == HAL_RX_RECEPTION_TYPE_MU_OFDMA_MIMO)) > + return; > + > + /* RU allocation present only for OFDMA reception */ > + ru_type_80_0 = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_RU_TYPE_80_0); > + ru_start_index_80_0 = le32_get_bits(rx_usr_info->info3, > + HAL_RX_USR_INFO3_RU_START_IDX_80_0); > + if (ru_type_80_0 != HAL_EHT_RU_NONE) { > + ru_size += ru_type_80_0; > + ru_index_per80mhz = ru_start_index_80_0; > + ru_index = ru_index_per80mhz; > + ru_index_320mhz |= HAL_RU_PER80(ru_type_80_0, 0, ru_index_per80mhz); > + num_80mhz_with_ru++; > + } > + > + ru_type_80_1 = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_RU_TYPE_80_1); > + ru_start_index_80_1 = le32_get_bits(rx_usr_info->info3, > + HAL_RX_USR_INFO3_RU_START_IDX_80_1); > + if (ru_type_80_1 != HAL_EHT_RU_NONE) { > + ru_size += ru_type_80_1; > + ru_index_per80mhz = ru_start_index_80_1; > + ru_index = ru_index_per80mhz; > + ru_index_320mhz |= HAL_RU_PER80(ru_type_80_1, 1, ru_index_per80mhz); > + num_80mhz_with_ru++; > + } > + > + ru_type_80_2 = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_RU_TYPE_80_2); > + ru_start_index_80_2 = le32_get_bits(rx_usr_info->info3, > + HAL_RX_USR_INFO3_RU_START_IDX_80_2); > + if (ru_type_80_2 != HAL_EHT_RU_NONE) { > + ru_size += ru_type_80_2; > + ru_index_per80mhz = ru_start_index_80_2; > + ru_index = ru_index_per80mhz; > + ru_index_320mhz |= HAL_RU_PER80(ru_type_80_2, 2, ru_index_per80mhz); > + num_80mhz_with_ru++; > + } > + > + ru_type_80_3 = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_RU_TYPE_80_3); > + ru_start_index_80_3 = le32_get_bits(rx_usr_info->info2, > + HAL_RX_USR_INFO3_RU_START_IDX_80_3); > + if (ru_type_80_3 != HAL_EHT_RU_NONE) { > + ru_size += ru_type_80_3; > + ru_index_per80mhz = ru_start_index_80_3; > + ru_index = ru_index_per80mhz; > + ru_index_320mhz |= HAL_RU_PER80(ru_type_80_3, 3, ru_index_per80mhz); > + num_80mhz_with_ru++; > + } > + > + if (num_80mhz_with_ru > 1) { > + /* Calculate the MRU index */ > + switch (ru_index_320mhz) { > + case HAL_EHT_RU_996_484_0: > + case HAL_EHT_RU_996x2_484_0: > + case HAL_EHT_RU_996x3_484_0: > + ru_index = 0; > + break; > + case HAL_EHT_RU_996_484_1: > + case HAL_EHT_RU_996x2_484_1: > + case HAL_EHT_RU_996x3_484_1: > + ru_index = 1; > + break; > + case HAL_EHT_RU_996_484_2: > + case HAL_EHT_RU_996x2_484_2: > + case HAL_EHT_RU_996x3_484_2: > + ru_index = 2; > + break; > + case HAL_EHT_RU_996_484_3: > + case HAL_EHT_RU_996x2_484_3: > + case HAL_EHT_RU_996x3_484_3: > + ru_index = 3; > + break; > + case HAL_EHT_RU_996_484_4: > + case HAL_EHT_RU_996x2_484_4: > + case HAL_EHT_RU_996x3_484_4: > + ru_index = 4; > + break; > + case HAL_EHT_RU_996_484_5: > + case HAL_EHT_RU_996x2_484_5: > + case HAL_EHT_RU_996x3_484_5: > + ru_index = 5; > + break; > + case HAL_EHT_RU_996_484_6: > + case HAL_EHT_RU_996x2_484_6: > + case HAL_EHT_RU_996x3_484_6: > + ru_index = 6; > + break; > + case HAL_EHT_RU_996_484_7: > + case HAL_EHT_RU_996x2_484_7: > + case HAL_EHT_RU_996x3_484_7: > + ru_index = 7; > + break; > + case HAL_EHT_RU_996x2_484_8: > + ru_index = 8; > + break; > + case HAL_EHT_RU_996x2_484_9: > + ru_index = 9; > + break; > + case HAL_EHT_RU_996x2_484_10: > + ru_index = 10; > + break; > + case HAL_EHT_RU_996x2_484_11: > + ru_index = 11; > + break; > + default: > + ru_index = HAL_EHT_RU_INVALID; > + break; > + } > + > + ru_size += 4; > + } > + > + rtap_ru_size = hal_rx_mon_hal_ru_size_to_ath12k_ru_size(ru_size); > + if (rtap_ru_size != ATH12K_EHT_RU_INVALID) { > + u32 known, data; > + > + known = __le32_to_cpu(eht->known); > + known |= IEEE80211_RADIOTAP_EHT_KNOWN_RU_MRU_SIZE_OM; > + eht->known = cpu_to_le32(known); > + > + data = __le32_to_cpu(eht->data[1]); > + data |= u32_encode_bits(rtap_ru_size, > + IEEE80211_RADIOTAP_EHT_DATA1_RU_SIZE); > + eht->data[1] = cpu_to_le32(data); > + } > + > + if (ru_index != HAL_EHT_RU_INVALID) { > + u32 known, data; > + > + known = __le32_to_cpu(eht->known); > + known |= IEEE80211_RADIOTAP_EHT_KNOWN_RU_MRU_INDEX_OM; > + eht->known = cpu_to_le32(known); > + > + data = __le32_to_cpu(eht->data[1]); > + data |= u32_encode_bits(rtap_ru_size, > + IEEE80211_RADIOTAP_EHT_DATA1_RU_INDEX); > + eht->data[1] = cpu_to_le32(data); > + } > + > + if (mon_rx_user_status && ru_index != HAL_EHT_RU_INVALID && > + rtap_ru_size != ATH12K_EHT_RU_INVALID) { > + mon_rx_user_status->ul_ofdma_ru_start_index = ru_index; > + mon_rx_user_status->ul_ofdma_ru_size = rtap_ru_size; > + > + ru_width = hal_rx_ul_ofdma_ru_size_to_width(rtap_ru_size); > + > + mon_rx_user_status->ul_ofdma_ru_width = ru_width; > + mon_rx_user_status->ofdma_info_valid = 1; > + } > +} > + > static enum hal_rx_mon_status > ath12k_dp_mon_rx_parse_status_tlv(struct ath12k *ar, > struct ath12k_mon_data *pmon, > @@ -1324,6 +1599,10 @@ ath12k_dp_mon_rx_parse_status_tlv(struct ath12k *ar, > HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO0_RX_BW); > break; > } > + case HAL_RX_PPDU_START_USER_INFO: > + ath12k_dp_mon_hal_rx_parse_user_info(tlv_data, userid, ppdu_info); > + break; > + > case HAL_RXPCU_PPDU_END_INFO: { > const struct hal_rx_ppdu_end_duration *ppdu_rx_duration = tlv_data; > > diff --git a/drivers/net/wireless/ath/ath12k/hal_rx.h b/drivers/net/wireless/ath/ath12k/hal_rx.h > index 959f2283294c..765b53741861 100644 > --- a/drivers/net/wireless/ath/ath12k/hal_rx.h > +++ b/drivers/net/wireless/ath/ath12k/hal_rx.h > @@ -781,39 +781,6 @@ struct hal_eht_sig_ofdma_cmn_eb { > union hal_eht_sig_user_field user_field; > } __packed; > > -static inline > -enum nl80211_he_ru_alloc ath12k_he_ru_tones_to_nl80211_he_ru_alloc(u16 ru_tones) > -{ > - enum nl80211_he_ru_alloc ret; > - > - switch (ru_tones) { > - case RU_52: > - ret = NL80211_RATE_INFO_HE_RU_ALLOC_52; > - break; > - case RU_106: > - ret = NL80211_RATE_INFO_HE_RU_ALLOC_106; > - break; > - case RU_242: > - ret = NL80211_RATE_INFO_HE_RU_ALLOC_242; > - break; > - case RU_484: > - ret = NL80211_RATE_INFO_HE_RU_ALLOC_484; > - break; > - case RU_996: > - ret = NL80211_RATE_INFO_HE_RU_ALLOC_996; > - break; > - case RU_2X996: > - ret = NL80211_RATE_INFO_HE_RU_ALLOC_2x996; > - break; > - case RU_26: > - fallthrough; > - default: > - ret = NL80211_RATE_INFO_HE_RU_ALLOC_26; > - break; > - } > - return ret; > -} > - > enum hal_eht_bw { > HAL_EHT_BW_20, > HAL_EHT_BW_40, > @@ -872,6 +839,264 @@ struct hal_mon_usig_hdr { > union hal_mon_usig_non_cmn non_cmn; > } __packed; > > +#define HAL_RX_USR_INFO0_PHY_PPDU_ID GENMASK(15, 0) > +#define HAL_RX_USR_INFO0_USR_RSSI GENMASK(23, 16) > +#define HAL_RX_USR_INFO0_PKT_TYPE GENMASK(27, 24) > +#define HAL_RX_USR_INFO0_STBC BIT(28) > +#define HAL_RX_USR_INFO0_RECEPTION_TYPE GENMASK(31, 29) > + > +#define HAL_RX_USR_INFO1_MCS GENMASK(3, 0) > +#define HAL_RX_USR_INFO1_SGI GENMASK(5, 4) > +#define HAL_RX_USR_INFO1_HE_RANGING_NDP BIT(6) > +#define HAL_RX_USR_INFO1_MIMO_SS_BITMAP GENMASK(15, 8) > +#define HAL_RX_USR_INFO1_RX_BW GENMASK(18, 16) > +#define HAL_RX_USR_INFO1_DL_OFMDA_USR_IDX GENMASK(31, 24) > + > +#define HAL_RX_USR_INFO2_DL_OFDMA_CONTENT_CHAN BIT(0) > +#define HAL_RX_USR_INFO2_NSS GENMASK(10, 8) > +#define HAL_RX_USR_INFO2_STREAM_OFFSET GENMASK(13, 11) > +#define HAL_RX_USR_INFO2_STA_DCM BIT(14) > +#define HAL_RX_USR_INFO2_LDPC BIT(15) > +#define HAL_RX_USR_INFO2_RU_TYPE_80_0 GENMASK(19, 16) > +#define HAL_RX_USR_INFO2_RU_TYPE_80_1 GENMASK(23, 20) > +#define HAL_RX_USR_INFO2_RU_TYPE_80_2 GENMASK(27, 24) > +#define HAL_RX_USR_INFO2_RU_TYPE_80_3 GENMASK(31, 28) > + > +#define HAL_RX_USR_INFO3_RU_START_IDX_80_0 GENMASK(5, 0) > +#define HAL_RX_USR_INFO3_RU_START_IDX_80_1 GENMASK(13, 8) > +#define HAL_RX_USR_INFO3_RU_START_IDX_80_2 GENMASK(21, 16) > +#define HAL_RX_USR_INFO3_RU_START_IDX_80_3 GENMASK(29, 24) > + > +struct hal_receive_user_info { > + __le32 info0; > + __le32 info1; > + __le32 info2; > + __le32 info3; > + __le32 user_fd_rssi_seg0; > + __le32 user_fd_rssi_seg1; > + __le32 user_fd_rssi_seg2; > + __le32 user_fd_rssi_seg3; > +} __packed; > + > +enum hal_mon_reception_type { > + HAL_RECEPTION_TYPE_SU, > + HAL_RECEPTION_TYPE_DL_MU_MIMO, > + HAL_RECEPTION_TYPE_DL_MU_OFMA, > + HAL_RECEPTION_TYPE_DL_MU_OFDMA_MIMO, > + HAL_RECEPTION_TYPE_UL_MU_MIMO, > + HAL_RECEPTION_TYPE_UL_MU_OFDMA, > + HAL_RECEPTION_TYPE_UL_MU_OFDMA_MIMO, > +}; > + > +/* Different allowed RU in 11BE */ > +#define HAL_EHT_RU_26 0ULL > +#define HAL_EHT_RU_52 1ULL > +#define HAL_EHT_RU_78 2ULL > +#define HAL_EHT_RU_106 3ULL > +#define HAL_EHT_RU_132 4ULL > +#define HAL_EHT_RU_242 5ULL > +#define HAL_EHT_RU_484 6ULL > +#define HAL_EHT_RU_726 7ULL > +#define HAL_EHT_RU_996 8ULL > +#define HAL_EHT_RU_996x2 9ULL > +#define HAL_EHT_RU_996x3 10ULL > +#define HAL_EHT_RU_996x4 11ULL > +#define HAL_EHT_RU_NONE 15ULL > +#define HAL_EHT_RU_INVALID 31ULL > +/* MRUs spanning above 80Mhz > + * HAL_EHT_RU_996_484 = HAL_EHT_RU_484 + HAL_EHT_RU_996 + 4 (reserved) > + */ > +#define HAL_EHT_RU_996_484 18ULL > +#define HAL_EHT_RU_996x2_484 28ULL > +#define HAL_EHT_RU_996x3_484 40ULL > +#define HAL_EHT_RU_996_484_242 23ULL > + > +#define NUM_RU_BITS_PER80 16 > +#define NUM_RU_BITS_PER20 4 > + > +/* Different per_80Mhz band in 320Mhz bandwidth */ > +#define HAL_80_0 0 > +#define HAL_80_1 1 > +#define HAL_80_2 2 > +#define HAL_80_3 3 > + > +#define HAL_RU_80MHZ(num_band) ((num_band) * NUM_RU_BITS_PER80) > +#define HAL_RU_20MHZ(idx_per_80) ((idx_per_80) * NUM_RU_BITS_PER20) > + > +#define HAL_RU_SHIFT(num_band, idx_per_80) \ > + (HAL_RU_80MHZ(num_band) + HAL_RU_20MHZ(idx_per_80)) > + > +#define HAL_RU(ru, num_band, idx_per_80) \ > + ((u64)(ru) << HAL_RU_SHIFT(num_band, idx_per_80)) > + > +/* MRU-996+484 */ > +#define HAL_EHT_RU_996_484_0 (HAL_RU(HAL_EHT_RU_484, HAL_80_0, 1) | \ > + HAL_RU(HAL_EHT_RU_996, HAL_80_1, 0)) > +#define HAL_EHT_RU_996_484_1 (HAL_RU(HAL_EHT_RU_484, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_996, HAL_80_1, 0)) > +#define HAL_EHT_RU_996_484_2 (HAL_RU(HAL_EHT_RU_996, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_1, 1)) > +#define HAL_EHT_RU_996_484_3 (HAL_RU(HAL_EHT_RU_996, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_1, 0)) > +#define HAL_EHT_RU_996_484_4 (HAL_RU(HAL_EHT_RU_484, HAL_80_2, 1) | \ > + HAL_RU(HAL_EHT_RU_996, HAL_80_3, 0)) > +#define HAL_EHT_RU_996_484_5 (HAL_RU(HAL_EHT_RU_484, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_996, HAL_80_3, 0)) > +#define HAL_EHT_RU_996_484_6 (HAL_RU(HAL_EHT_RU_996, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_3, 1)) > +#define HAL_EHT_RU_996_484_7 (HAL_RU(HAL_EHT_RU_996, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_3, 0)) > + > +/* MRU-996x2+484 */ > +#define HAL_EHT_RU_996x2_484_0 (HAL_RU(HAL_EHT_RU_484, HAL_80_0, 1) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_2, 0)) > +#define HAL_EHT_RU_996x2_484_1 (HAL_RU(HAL_EHT_RU_484, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_2, 0)) > +#define HAL_EHT_RU_996x2_484_2 (HAL_RU(HAL_EHT_RU_996x2, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_1, 1) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_2, 0)) > +#define HAL_EHT_RU_996x2_484_3 (HAL_RU(HAL_EHT_RU_996x2, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_2, 0)) > +#define HAL_EHT_RU_996x2_484_4 (HAL_RU(HAL_EHT_RU_996x2, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_2, 1)) > +#define HAL_EHT_RU_996x2_484_5 (HAL_RU(HAL_EHT_RU_996x2, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_2, 0)) > +#define HAL_EHT_RU_996x2_484_6 (HAL_RU(HAL_EHT_RU_484, HAL_80_1, 1) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_3, 0)) > +#define HAL_EHT_RU_996x2_484_7 (HAL_RU(HAL_EHT_RU_484, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_3, 0)) > +#define HAL_EHT_RU_996x2_484_8 (HAL_RU(HAL_EHT_RU_996x2, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_2, 1) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_3, 0)) > +#define HAL_EHT_RU_996x2_484_9 (HAL_RU(HAL_EHT_RU_996x2, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_3, 0)) > +#define HAL_EHT_RU_996x2_484_10 (HAL_RU(HAL_EHT_RU_996x2, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_3, 1)) > +#define HAL_EHT_RU_996x2_484_11 (HAL_RU(HAL_EHT_RU_996x2, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_996x2, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_3, 0)) > + > +/* MRU-996x3+484 */ > +#define HAL_EHT_RU_996x3_484_0 (HAL_RU(HAL_EHT_RU_484, HAL_80_0, 1) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_3, 0)) > +#define HAL_EHT_RU_996x3_484_1 (HAL_RU(HAL_EHT_RU_484, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_3, 0)) > +#define HAL_EHT_RU_996x3_484_2 (HAL_RU(HAL_EHT_RU_996x3, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_1, 1) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_3, 0)) > +#define HAL_EHT_RU_996x3_484_3 (HAL_RU(HAL_EHT_RU_996x3, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_3, 0)) > +#define HAL_EHT_RU_996x3_484_4 (HAL_RU(HAL_EHT_RU_996x3, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_2, 1) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_3, 0)) > +#define HAL_EHT_RU_996x3_484_5 (HAL_RU(HAL_EHT_RU_996x3, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_3, 0)) > +#define HAL_EHT_RU_996x3_484_6 (HAL_RU(HAL_EHT_RU_996x3, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_3, 1)) > +#define HAL_EHT_RU_996x3_484_7 (HAL_RU(HAL_EHT_RU_996x3, HAL_80_0, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_1, 0) | \ > + HAL_RU(HAL_EHT_RU_996x3, HAL_80_2, 0) | \ > + HAL_RU(HAL_EHT_RU_484, HAL_80_3, 0)) > + > +#define HAL_RU_PER80(ru_per80, num_80mhz, ru_idx_per80mhz) \ > + (HAL_RU(ru_per80, num_80mhz, ru_idx_per80mhz)) > + > +#define RU_INVALID 0 > +#define RU_26 1 > +#define RU_52 2 > +#define RU_106 4 > +#define RU_242 9 > +#define RU_484 18 > +#define RU_996 37 > +#define RU_2X996 74 > +#define RU_3X996 111 > +#define RU_4X996 148 > +#define RU_52_26 (RU_52 + RU_26) > +#define RU_106_26 (RU_106 + RU_26) > +#define RU_484_242 (RU_484 + RU_242) > +#define RU_996_484 (RU_996 + RU_484) > +#define RU_996_484_242 (RU_996 + RU_484_242) > +#define RU_2X996_484 (RU_2X996 + RU_484) > +#define RU_3X996_484 (RU_3X996 + RU_484) > + > +enum ath12k_eht_ru_size { > + ATH12K_EHT_RU_26, > + ATH12K_EHT_RU_52, > + ATH12K_EHT_RU_106, > + ATH12K_EHT_RU_242, > + ATH12K_EHT_RU_484, > + ATH12K_EHT_RU_996, > + ATH12K_EHT_RU_996x2, > + ATH12K_EHT_RU_996x4, > + ATH12K_EHT_RU_52_26, > + ATH12K_EHT_RU_106_26, > + ATH12K_EHT_RU_484_242, > + ATH12K_EHT_RU_996_484, > + ATH12K_EHT_RU_996_484_242, > + ATH12K_EHT_RU_996x2_484, > + ATH12K_EHT_RU_996x3, > + ATH12K_EHT_RU_996x3_484, > + > + /* Keep last */ > + ATH12K_EHT_RU_INVALID, > +}; > + > +#define HAL_RX_RU_ALLOC_TYPE_MAX ATH12K_EHT_RU_INVALID > + > +static inline > +enum nl80211_he_ru_alloc ath12k_he_ru_tones_to_nl80211_he_ru_alloc(u16 ru_tones) > +{ > + enum nl80211_he_ru_alloc ret; > + > + switch (ru_tones) { > + case RU_52: > + ret = NL80211_RATE_INFO_HE_RU_ALLOC_52; > + break; > + case RU_106: > + ret = NL80211_RATE_INFO_HE_RU_ALLOC_106; > + break; > + case RU_242: > + ret = NL80211_RATE_INFO_HE_RU_ALLOC_242; > + break; > + case RU_484: > + ret = NL80211_RATE_INFO_HE_RU_ALLOC_484; > + break; > + case RU_996: > + ret = NL80211_RATE_INFO_HE_RU_ALLOC_996; > + break; > + case RU_2X996: > + ret = NL80211_RATE_INFO_HE_RU_ALLOC_2x996; > + break; > + case RU_26: > + fallthrough; > + default: > + ret = NL80211_RATE_INFO_HE_RU_ALLOC_26; > + break; > + } > + return ret; > +} > + > void ath12k_hal_reo_status_queue_stats(struct ath12k_base *ab, > struct hal_tlv_64_hdr *tlv, > struct hal_reo_status *status); > diff --git a/drivers/net/wireless/ath/ath12k/rx_desc.h b/drivers/net/wireless/ath/ath12k/rx_desc.h > index 7367935ee68b..6c600473b402 100644 > --- a/drivers/net/wireless/ath/ath12k/rx_desc.h > +++ b/drivers/net/wireless/ath/ath12k/rx_desc.h > @@ -1541,13 +1541,4 @@ struct hal_rx_desc { > #define MAX_MU_GROUP_SHOW 16 > #define MAX_MU_GROUP_LENGTH (6 * MAX_MU_GROUP_SHOW) > > -#define HAL_RX_RU_ALLOC_TYPE_MAX 6 > -#define RU_26 1 > -#define RU_52 2 > -#define RU_106 4 > -#define RU_242 9 > -#define RU_484 18 > -#define RU_996 37 > -#define RU_2X996 74 > - > #endif /* ATH12K_RX_DESC_H */ Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com>
On 1/29/2025 2:58 AM, Karthikeyan Periyasamy wrote: > Currently, peer extended Rx statistics are not supported. Peer extended Rx > statistics are collected form the TLV data reported in the monitor status > Rx path. Therefore, add support for TLV tag parser handling and debugfs > to configure and dump the collected information. Additionally, this series > does not impact the WCN7850. > > v6: > wifi: ath12k: Add HAL_PHYRX_GENERIC_U_SIG TLV parsing support > wifi: ath12k: Add HAL_PHYRX_GENERIC_EHT_SIG TLV parsing support > wifi: ath12k: Add HAL_RX_PPDU_START_USER_INFO TLV parsing support > - modified the return type as void > v5: > Removed the patch "wifi: ath12k: Add EHT rate statistics support" since it > is already merged > v4: > wifi: ath12k: Add peer extended Rx statistics debugfs support > - fixed the kernel test robot noticed build errors > v3: > wifi: ath12k: Add peer extended Rx statistics debugfs support > - avoid ext_rx_stats filter overwrite in default filter setting > v2: > wifi: ath12k: Add HAL_PHYRX_GENERIC_U_SIG TLV parsing support > wifi: ath12k: Add HAL_PHYRX_GENERIC_EHT_SIG TLV parsing support > - fixed the length calculation in the EHT radiotap procedure > > Balamurugan Mahalingam (2): > wifi: ath12k: Add EHT MCS support in Extended Rx statistics > wifi: ath12k: Refactor the format of peer rate table information > > Karthikeyan Periyasamy (6): > wifi: ath12k: Add HAL_PHYRX_GENERIC_U_SIG TLV parsing support > wifi: ath12k: Add HAL_PHYRX_GENERIC_EHT_SIG TLV parsing support > wifi: ath12k: Add HAL_RX_PPDU_START_USER_INFO TLV parsing support > wifi: ath12k: Add HAL_PHYRX_OTHER_RECEIVE_INFO TLV parsing support > wifi: ath12k: Update the peer id in PPDU end user stats TLV > wifi: ath12k: Add peer extended Rx statistics debugfs support > > P Praneesh (1): > wifi: ath12k: fix the ampdu id fetch in the HAL_RX_MPDU_START TLV > > drivers/net/wireless/ath/ath12k/Makefile | 2 +- > drivers/net/wireless/ath/ath12k/core.h | 10 +- > drivers/net/wireless/ath/ath12k/debugfs.c | 97 ++ > drivers/net/wireless/ath/ath12k/debugfs.h | 20 + > drivers/net/wireless/ath/ath12k/debugfs_sta.c | 337 ++++++ > drivers/net/wireless/ath/ath12k/debugfs_sta.h | 24 + > drivers/net/wireless/ath/ath12k/dp_mon.c | 1033 ++++++++++++++++- > drivers/net/wireless/ath/ath12k/hal_rx.h | 433 ++++++- > drivers/net/wireless/ath/ath12k/mac.c | 18 +- > drivers/net/wireless/ath/ath12k/mac.h | 4 +- > drivers/net/wireless/ath/ath12k/rx_desc.h | 9 - > 11 files changed, 1924 insertions(+), 63 deletions(-) > create mode 100644 drivers/net/wireless/ath/ath12k/debugfs_sta.c > create mode 100644 drivers/net/wireless/ath/ath12k/debugfs_sta.h > > > base-commit: b5aeca2e66899430827b8afcad061201f3b7861b Unfortunately some new debugfs code was promoted to ath/main and this series no longer applies cleanly. Please rebase & repost.
On 2/4/2025 7:39 AM, Jeff Johnson wrote: > On 1/29/2025 2:58 AM, Karthikeyan Periyasamy wrote: >> Currently, peer extended Rx statistics are not supported. Peer extended Rx >> statistics are collected form the TLV data reported in the monitor status >> Rx path. Therefore, add support for TLV tag parser handling and debugfs >> to configure and dump the collected information. Additionally, this series >> does not impact the WCN7850. >> >> v6: >> wifi: ath12k: Add HAL_PHYRX_GENERIC_U_SIG TLV parsing support >> wifi: ath12k: Add HAL_PHYRX_GENERIC_EHT_SIG TLV parsing support >> wifi: ath12k: Add HAL_RX_PPDU_START_USER_INFO TLV parsing support >> - modified the return type as void >> v5: >> Removed the patch "wifi: ath12k: Add EHT rate statistics support" since it >> is already merged >> v4: >> wifi: ath12k: Add peer extended Rx statistics debugfs support >> - fixed the kernel test robot noticed build errors >> v3: >> wifi: ath12k: Add peer extended Rx statistics debugfs support >> - avoid ext_rx_stats filter overwrite in default filter setting >> v2: >> wifi: ath12k: Add HAL_PHYRX_GENERIC_U_SIG TLV parsing support >> wifi: ath12k: Add HAL_PHYRX_GENERIC_EHT_SIG TLV parsing support >> - fixed the length calculation in the EHT radiotap procedure >> >> Balamurugan Mahalingam (2): >> wifi: ath12k: Add EHT MCS support in Extended Rx statistics >> wifi: ath12k: Refactor the format of peer rate table information >> >> Karthikeyan Periyasamy (6): >> wifi: ath12k: Add HAL_PHYRX_GENERIC_U_SIG TLV parsing support >> wifi: ath12k: Add HAL_PHYRX_GENERIC_EHT_SIG TLV parsing support >> wifi: ath12k: Add HAL_RX_PPDU_START_USER_INFO TLV parsing support >> wifi: ath12k: Add HAL_PHYRX_OTHER_RECEIVE_INFO TLV parsing support >> wifi: ath12k: Update the peer id in PPDU end user stats TLV >> wifi: ath12k: Add peer extended Rx statistics debugfs support >> >> P Praneesh (1): >> wifi: ath12k: fix the ampdu id fetch in the HAL_RX_MPDU_START TLV >> >> drivers/net/wireless/ath/ath12k/Makefile | 2 +- >> drivers/net/wireless/ath/ath12k/core.h | 10 +- >> drivers/net/wireless/ath/ath12k/debugfs.c | 97 ++ >> drivers/net/wireless/ath/ath12k/debugfs.h | 20 + >> drivers/net/wireless/ath/ath12k/debugfs_sta.c | 337 ++++++ >> drivers/net/wireless/ath/ath12k/debugfs_sta.h | 24 + >> drivers/net/wireless/ath/ath12k/dp_mon.c | 1033 ++++++++++++++++- >> drivers/net/wireless/ath/ath12k/hal_rx.h | 433 ++++++- >> drivers/net/wireless/ath/ath12k/mac.c | 18 +- >> drivers/net/wireless/ath/ath12k/mac.h | 4 +- >> drivers/net/wireless/ath/ath12k/rx_desc.h | 9 - >> 11 files changed, 1924 insertions(+), 63 deletions(-) >> create mode 100644 drivers/net/wireless/ath/ath12k/debugfs_sta.c >> create mode 100644 drivers/net/wireless/ath/ath12k/debugfs_sta.h >> >> >> base-commit: b5aeca2e66899430827b8afcad061201f3b7861b > > Unfortunately some new debugfs code was promoted to ath/main and this series > no longer applies cleanly. Please rebase & repost. > sure