| Message ID | 20250410174010.31588-3-quic_ptalari@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Enable QUPs and Serial on SA8255p Qualcomm platforms | expand |
Hi On 4/11/2025 11:27 PM, Rob Herring wrote: > On Thu, Apr 10, 2025 at 11:10:03PM +0530, Praveen Talari wrote: >> From: Nikunj Kela <quic_nkela@quicinc.com> >> >> SA8255p platform abstracts resources such as clocks, interconnect and >> GPIO pins configuration in Firmware. SCMI power and perf protocols are >> used to send request for resource configurations. >> >> Add DT bindings for the QUP GENI UART controller on sa8255p platform. >> >> Co-developed-by: Praveen Talari <quic_ptalari@quicinc.com> >> Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com> > Your tags go last because you touched this last (I assume). The order > here would be correct if you were the original author, but Nikunj made > significant enough changes to change the author and also sent the > patches. The sender always has the last S-o-b (until the maintainer > adds their's when applying). Do you mean like below Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> Co-developed-by: Praveen Talari <quic_ptalari@quicinc.com> Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com> Are Co-developed-by and Signed-off-by both needed or can i keep s-o-b? > >> Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> >> --- >> .../serial/qcom,sa8255p-geni-uart.yaml | 59 +++++++++++++++++++ >> 1 file changed, 59 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml >> >> diff --git a/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml >> new file mode 100644 >> index 000000000000..0dbfbfa1d504 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml >> @@ -0,0 +1,59 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm Geni based QUP UART interface >> + >> +maintainers: >> + - Praveen Talari <quic_ptalari@quicinc.com> >> + >> +allOf: >> + - $ref: /schemas/serial/serial.yaml# >> + >> +properties: >> + compatible: >> + enum: >> + - qcom,sa8255p-geni-uart >> + - qcom,sa8255p-geni-debug-uart >> + >> + interrupts: >> + minItems: 1 >> + items: >> + - description: UART core irq >> + - description: Wakeup irq (RX GPIO) > If this is a wakeup source, then you should have interrupt-names with > 'wakeup' for the 2nd irq. We have taken reference of below existing yaml file https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml > >> + >> + power-domains: >> + minItems: 2 >> + maxItems: 2 >> + >> + power-domain-names: >> + items: >> + - const: power >> + - const: perf >> + >> + reg: >> + maxItems: 1 > 'reg' goes after compatible. We have taken reference of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml > >> + >> +required: >> + - compatible >> + - interrupts >> + - reg >> + - power-domains >> + - power-domain-names >> + >> +unevaluatedProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + >> + serial@990000 { >> + compatible = "qcom,sa8255p-geni-uart"; >> + reg = <0x990000 0x4000>; >> + interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; >> + power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>; >> + power-domain-names = "power", "perf"; >> + }; >> +... >> -- >> 2.17.1 >>
diff --git a/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml new file mode 100644 index 000000000000..0dbfbfa1d504 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Geni based QUP UART interface + +maintainers: + - Praveen Talari <quic_ptalari@quicinc.com> + +allOf: + - $ref: /schemas/serial/serial.yaml# + +properties: + compatible: + enum: + - qcom,sa8255p-geni-uart + - qcom,sa8255p-geni-debug-uart + + interrupts: + minItems: 1 + items: + - description: UART core irq + - description: Wakeup irq (RX GPIO) + + power-domains: + minItems: 2 + maxItems: 2 + + power-domain-names: + items: + - const: power + - const: perf + + reg: + maxItems: 1 + +required: + - compatible + - interrupts + - reg + - power-domains + - power-domain-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + serial@990000 { + compatible = "qcom,sa8255p-geni-uart"; + reg = <0x990000 0x4000>; + interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>; + power-domain-names = "power", "perf"; + }; +...