| Message ID | 20250412-qps615_v4_1-v5-8-5b6a06132fec@oss.qualcomm.com |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: Enable Power and configure the TC9563 PCIe switch | expand |
Hi Krishna, kernel test robot noticed the following build errors: [auto build test ERROR on f4d2ef48250ad057e4f00087967b5ff366da9f39] url: https://github.com/intel-lab-lkp/linux/commits/Krishna-Chaitanya-Chundru/dt-bindings-PCI-Add-binding-for-Toshiba-TC9563-PCIe-switch/20250414-123816 base: f4d2ef48250ad057e4f00087967b5ff366da9f39 patch link: https://lore.kernel.org/r/20250412-qps615_v4_1-v5-8-5b6a06132fec%40oss.qualcomm.com patch subject: [PATCH v5 8/9] PCI: pwrctrl: Add power control driver for tc9563 config: s390-allmodconfig (https://download.01.org/0day-ci/archive/20250415/202504151632.tCoey9d8-lkp@intel.com/config) compiler: clang version 18.1.8 (https://github.com/llvm/llvm-project 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250415/202504151632.tCoey9d8-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202504151632.tCoey9d8-lkp@intel.com/ All errors (new ones prefixed by >>): >> drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c:419:2: error: call to undeclared function 'gpiod_set_value'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 419 | gpiod_set_value(ctx->reset_gpio, 1); | ^ drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c:433:2: error: call to undeclared function 'gpiod_set_value'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 433 | gpiod_set_value(ctx->reset_gpio, 0); | ^ >> drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c:535:20: error: call to undeclared function 'devm_gpiod_get'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 535 | ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); | ^ >> drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c:535:49: error: use of undeclared identifier 'GPIOD_OUT_HIGH' 535 | ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); | ^ 4 errors generated. vim +/gpiod_set_value +419 drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c 416 417 static void tc9563_pwrctrl_power_off(struct tc9563_pwrctrl_ctx *ctx) 418 { > 419 gpiod_set_value(ctx->reset_gpio, 1); 420 421 regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); 422 } 423 424 static int tc9563_pwrctrl_bring_up(struct tc9563_pwrctrl_ctx *ctx) 425 { 426 struct tc9563_pwrctrl_cfg *cfg; 427 int ret, i; 428 429 ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies); 430 if (ret < 0) 431 return dev_err_probe(ctx->pwrctrl.dev, ret, "cannot enable regulators\n"); 432 433 gpiod_set_value(ctx->reset_gpio, 0); 434 435 /* wait for the internal osc frequency to stablise */ 436 usleep_range(10000, 10500); 437 438 ret = tc9563_pwrctrl_assert_deassert_reset(ctx, false); 439 if (ret) 440 goto power_off; 441 442 for (i = 0; i < TC9563_MAX; i++) { 443 cfg = &ctx->cfg[i]; 444 ret = tc9563_pwrctrl_disable_port(ctx, i); 445 if (ret) { 446 dev_err(ctx->pwrctrl.dev, "Disabling port failed\n"); 447 goto power_off; 448 } 449 450 ret = tc9563_pwrctrl_set_l0s_l1_entry_delay(ctx, i, false, cfg->l0s_delay); 451 if (ret) { 452 dev_err(ctx->pwrctrl.dev, "Setting L0s entry delay failed\n"); 453 goto power_off; 454 } 455 456 ret = tc9563_pwrctrl_set_l0s_l1_entry_delay(ctx, i, true, cfg->l1_delay); 457 if (ret) { 458 dev_err(ctx->pwrctrl.dev, "Setting L1 entry delay failed\n"); 459 goto power_off; 460 } 461 462 ret = tc9563_pwrctrl_set_tx_amplitude(ctx, i, cfg->tx_amp); 463 if (ret) { 464 dev_err(ctx->pwrctrl.dev, "Setting Tx amplitube failed\n"); 465 goto power_off; 466 } 467 468 ret = tc9563_pwrctrl_set_nfts(ctx, i, cfg->nfts); 469 if (ret) { 470 dev_err(ctx->pwrctrl.dev, "Setting nfts failed\n"); 471 goto power_off; 472 } 473 474 ret = tc9563_pwrctrl_disable_dfe(ctx, i); 475 if (ret) { 476 dev_err(ctx->pwrctrl.dev, "Disabling DFE failed\n"); 477 goto power_off; 478 } 479 } 480 481 ret = tc9563_pwrctrl_assert_deassert_reset(ctx, true); 482 if (!ret) 483 return 0; 484 485 power_off: 486 tc9563_pwrctrl_power_off(ctx); 487 return ret; 488 } 489 490 static int tc9563_pwrctrl_probe(struct platform_device *pdev) 491 { 492 struct pci_host_bridge *bridge = to_pci_host_bridge(pdev->dev.parent); 493 struct pci_dev *pci_dev = to_pci_dev(pdev->dev.parent); 494 struct pci_bus *bus = bridge->bus; 495 struct device *dev = &pdev->dev; 496 enum tc9563_pwrctrl_ports port; 497 struct tc9563_pwrctrl_ctx *ctx; 498 struct device_node *i2c_node; 499 int ret, addr; 500 501 ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); 502 if (!ctx) 503 return -ENOMEM; 504 505 ret = of_property_read_u32_index(pdev->dev.of_node, "i2c-parent", 1, &addr); 506 if (ret) 507 return dev_err_probe(dev, ret, "Failed to read i2c-parent property\n"); 508 509 i2c_node = of_parse_phandle(dev->of_node, "i2c-parent", 0); 510 ctx->adapter = of_find_i2c_adapter_by_node(i2c_node); 511 of_node_put(i2c_node); 512 if (!ctx->adapter) 513 return dev_err_probe(dev, -EPROBE_DEFER, "Failed to find I2C adapter\n"); 514 515 ctx->client = i2c_new_dummy_device(ctx->adapter, addr); 516 if (IS_ERR(ctx->client)) { 517 dev_err(dev, "Failed to create I2C client\n"); 518 i2c_put_adapter(ctx->adapter); 519 return PTR_ERR(ctx->client); 520 } 521 522 ctx->supplies[0].supply = "vddc"; 523 ctx->supplies[1].supply = "vdd18"; 524 ctx->supplies[2].supply = "vdd09"; 525 ctx->supplies[3].supply = "vddio1"; 526 ctx->supplies[4].supply = "vddio2"; 527 ctx->supplies[5].supply = "vddio18"; 528 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies), ctx->supplies); 529 if (ret) { 530 dev_err_probe(dev, ret, 531 "failed to get supply regulator\n"); 532 goto remove_i2c; 533 } 534 > 535 ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 536 if (IS_ERR(ctx->reset_gpio)) { 537 ret = dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), "failed to get reset GPIO\n"); 538 goto remove_i2c; 539 } 540 541 pci_pwrctrl_init(&ctx->pwrctrl, dev); 542 543 port = TC9563_USP; 544 ret = tc9563_pwrctrl_parse_device_dt(ctx, pdev->dev.of_node, port); 545 if (ret) { 546 dev_err(dev, "failed to parse device tree properties: %d\n", ret); 547 goto remove_i2c; 548 } 549 550 /* 551 * Downstream ports are always children of the upstream port. 552 * The first node represents DSP1, the second node represents DSP2, and so on. 553 */ 554 for_each_child_of_node_scoped(pdev->dev.of_node, child) { 555 ret = tc9563_pwrctrl_parse_device_dt(ctx, child, port++); 556 if (ret) 557 break; 558 /* Embedded ethernet device are under DSP3 */ 559 if (port == TC9563_DSP3) 560 for_each_child_of_node_scoped(child, child1) { 561 ret = tc9563_pwrctrl_parse_device_dt(ctx, child1, port++); 562 if (ret) 563 break; 564 } 565 } 566 if (ret) { 567 dev_err(dev, "failed to parse device tree properties: %d\n", ret); 568 goto remove_i2c; 569 } 570 571 if (!pcie_link_is_active(pci_dev) && bridge->ops->stop_link) 572 bridge->ops->stop_link(bus); 573 574 ret = tc9563_pwrctrl_bring_up(ctx); 575 if (ret) 576 goto remove_i2c; 577 578 if (!pcie_link_is_active(pci_dev) && bridge->ops->start_link) { 579 ret = bridge->ops->start_link(bus); 580 if (ret) 581 goto power_off; 582 } 583 584 ret = devm_pci_pwrctrl_device_set_ready(dev, &ctx->pwrctrl); 585 if (ret) 586 goto power_off; 587 588 platform_set_drvdata(pdev, ctx); 589 590 return 0; 591 592 power_off: 593 tc9563_pwrctrl_power_off(ctx); 594 remove_i2c: 595 i2c_unregister_device(ctx->client); 596 i2c_put_adapter(ctx->adapter); 597 return ret; 598 } 599
Hi Krishna, kernel test robot noticed the following build errors: [auto build test ERROR on f4d2ef48250ad057e4f00087967b5ff366da9f39] url: https://github.com/intel-lab-lkp/linux/commits/Krishna-Chaitanya-Chundru/dt-bindings-PCI-Add-binding-for-Toshiba-TC9563-PCIe-switch/20250414-123816 base: f4d2ef48250ad057e4f00087967b5ff366da9f39 patch link: https://lore.kernel.org/r/20250412-qps615_v4_1-v5-8-5b6a06132fec%40oss.qualcomm.com patch subject: [PATCH v5 8/9] PCI: pwrctrl: Add power control driver for tc9563 config: sparc-allmodconfig (https://download.01.org/0day-ci/archive/20250415/202504151624.8fF601aD-lkp@intel.com/config) compiler: sparc64-linux-gcc (GCC) 14.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250415/202504151624.8fF601aD-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202504151624.8fF601aD-lkp@intel.com/ All errors (new ones prefixed by >>): drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c: In function 'tc9563_pwrctrl_set_l0s_l1_entry_delay': >> drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c:257:34: error: implicit declaration of function 'u32_replace_bits' [-Wimplicit-function-declaration] 257 | rd_val = u32_replace_bits(rd_val, units, TC9563_ETH_L1_DELAY_MASK); | ^~~~~~~~~~~~~~~~ drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c: In function 'tc9563_pwrctrl_power_off': drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c:419:9: error: implicit declaration of function 'gpiod_set_value' [-Wimplicit-function-declaration] 419 | gpiod_set_value(ctx->reset_gpio, 1); | ^~~~~~~~~~~~~~~ drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c: In function 'tc9563_pwrctrl_probe': drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c:535:27: error: implicit declaration of function 'devm_gpiod_get'; did you mean 'em_pd_get'? [-Wimplicit-function-declaration] 535 | ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); | ^~~~~~~~~~~~~~ | em_pd_get drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c:535:56: error: 'GPIOD_OUT_HIGH' undeclared (first use in this function) 535 | ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); | ^~~~~~~~~~~~~~ drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c:535:56: note: each undeclared identifier is reported only once for each function it appears in vim +/u32_replace_bits +257 drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c 238 239 static int tc9563_pwrctrl_set_l0s_l1_entry_delay(struct tc9563_pwrctrl_ctx *ctx, 240 enum tc9563_pwrctrl_ports port, bool is_l1, u32 ns) 241 { 242 u32 rd_val, units; 243 int ret; 244 245 if (ns < 256) 246 return 0; 247 248 /* convert to units of 256ns */ 249 units = ns / 256; 250 251 if (port == TC9563_ETHERNET) { 252 ret = tc9563_pwrctrl_i2c_read(ctx->client, TC9563_EMBEDDED_ETH_DELAY, &rd_val); 253 if (ret) 254 return ret; 255 256 if (is_l1) > 257 rd_val = u32_replace_bits(rd_val, units, TC9563_ETH_L1_DELAY_MASK); 258 else 259 rd_val = u32_replace_bits(rd_val, units, TC9563_ETH_L0S_DELAY_MASK); 260 261 return tc9563_pwrctrl_i2c_write(ctx->client, TC9563_EMBEDDED_ETH_DELAY, rd_val); 262 } 263 264 ret = tc9563_pwrctrl_i2c_write(ctx->client, TC9563_PORT_SELECT, BIT(port)); 265 if (ret) 266 return ret; 267 268 return tc9563_pwrctrl_i2c_write(ctx->client, 269 is_l1 ? TC9563_PORT_L1_DELAY : TC9563_PORT_L0S_DELAY, units); 270 } 271
On Sat, Apr 12, 2025 at 07:19:57AM +0530, Krishna Chaitanya Chundru wrote: > TC9563 is a PCIe switch which has one upstream and three downstream > ports. To one of the downstream ports ethernet MAC is connected as endpoint > device. Other two downstream ports are supposed to connect to external > device. One Host can connect to TC9563 by upstream port. TC9563 switch > needs to be configured after powering on and before PCIe link was up. This is described as a generic driver for TC9563, but the ethernet MAC stuff built into doesn't sound generic. Maybe this could be clarified here and in the Kconfig help text. > +#define TC9563_GPIO_CONFIG 0x801208 > +#define TC9563_RESET_GPIO 0x801210 I guess these are i2c register addresses? > +#define TC9563_BUS_CONTROL 0x801014 Unused. > +#define TC9563_PORT_L0S_DELAY 0x82496c > +#define TC9563_PORT_L1_DELAY 0x824970 I guess these correspond to "L0s Exit Latency" and "L1 Exit Latency" in the PCIe spec? Can we name them to suggest that? Where do the values come from? > +#define TC9563_EMBEDDED_ETH_DELAY 0x8200d8 > +#define TC9563_ETH_L1_DELAY_MASK GENMASK(27, 18) > +#define TC9563_ETH_L1_DELAY_VALUE(x) FIELD_PREP(TC9563_ETH_L1_DELAY_MASK, x) > +#define TC9563_ETH_L0S_DELAY_MASK GENMASK(17, 13) > +#define TC9563_ETH_L0S_DELAY_VALUE(x) FIELD_PREP(TC9563_ETH_L0S_DELAY_MASK, x) > +#define TC9563_PWRCTL_MAX_SUPPLY 6 > + > +struct tc9563_pwrctrl_ctx { > + struct regulator_bulk_data supplies[TC9563_PWRCTL_MAX_SUPPLY]; > + struct tc9563_pwrctrl_cfg cfg[TC9563_MAX]; > + struct gpio_desc *reset_gpio; > + struct i2c_adapter *adapter; > + struct i2c_client *client; > + struct pci_pwrctrl pwrctrl; > +}; > +static int tc9563_pwrctrl_i2c_write(struct i2c_client *client, > + u32 reg_addr, u32 reg_val) > +{ > + struct i2c_msg msg; > + u8 msg_buf[7]; > + int ret; > + > + msg.addr = client->addr; > + msg.len = 7; > + msg.flags = 0; > + > + /* Big Endian for reg addr */ > + put_unaligned_be24(reg_addr, &msg_buf[0]); Of the 1000+ calls to i2c_transfer(), I only see about 25 uses of put_unaligned_be*() beforehand. Are most of the other 975 calls broken? Or maybe they are only used on platforms of known endianness so they don't need it? Just a question; I have no idea how i2c works. > + /* Little Endian for reg val */ > + put_unaligned_le32(reg_val, &msg_buf[3]); > + > + msg.buf = msg_buf; > + ret = i2c_transfer(client->adapter, &msg, 1); > + return ret == 1 ? 0 : ret; > +} > + ret = of_property_read_u8_array(node, "nfts", cfg->nfts, 2); > + if (ret && ret != -EINVAL) > + return ret; Asked elsewhere whether "nfts" is supposed to match the DT "n-fts" property. > +static int tc9563_pwrctrl_bring_up(struct tc9563_pwrctrl_ctx *ctx) > +{ > + struct tc9563_pwrctrl_cfg *cfg; > + int ret, i; > + > + ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies); > + if (ret < 0) > + return dev_err_probe(ctx->pwrctrl.dev, ret, "cannot enable regulators\n"); > + > + gpiod_set_value(ctx->reset_gpio, 0); > + > + /* wait for the internal osc frequency to stablise */ s/stablise/stabilize/ (or "stabilise" if you prefer) > + usleep_range(10000, 10500); Where do these values come from? Can we add a spec citation? > + ret = tc9563_pwrctrl_set_l0s_l1_entry_delay(ctx, i, false, cfg->l0s_delay); > + if (ret) { > + dev_err(ctx->pwrctrl.dev, "Setting L0s entry delay failed\n"); Since these are *entry* delays, maybe they're not related to the "Exit Latencies" from the PCIe spec. But if they *are* related, can we use the same terms here? > + ret = tc9563_pwrctrl_set_l0s_l1_entry_delay(ctx, i, true, cfg->l1_delay); > + if (ret) { > + dev_err(ctx->pwrctrl.dev, "Setting L1 entry delay failed\n"); > + ret = tc9563_pwrctrl_set_tx_amplitude(ctx, i, cfg->tx_amp); > + if (ret) { > + dev_err(ctx->pwrctrl.dev, "Setting Tx amplitube failed\n"); s/amplitube/amplitude/ > + goto power_off; > + } > + > + ret = tc9563_pwrctrl_set_nfts(ctx, i, cfg->nfts); > + if (ret) { > + dev_err(ctx->pwrctrl.dev, "Setting nfts failed\n"); s/nfts/N_FTS/ to match spec usage. > +static int tc9563_pwrctrl_probe(struct platform_device *pdev) > +{ > ... > + ctx->supplies[0].supply = "vddc"; > + ctx->supplies[1].supply = "vdd18"; > + ctx->supplies[2].supply = "vdd09"; > + ctx->supplies[3].supply = "vddio1"; > + ctx->supplies[4].supply = "vddio2"; > + ctx->supplies[5].supply = "vddio18"; Seems like this could be made into a const static array, maybe next to TC9563_PWRCTL_MAX_SUPPLY? > + for_each_child_of_node_scoped(pdev->dev.of_node, child) { > + ret = tc9563_pwrctrl_parse_device_dt(ctx, child, port++); > + if (ret) > + break; > + /* Embedded ethernet device are under DSP3 */ > + if (port == TC9563_DSP3) Is this ethernet thing integrated into the TC9563? Seems like the sort of topology thing that would normally be described via DT. > + for_each_child_of_node_scoped(child, child1) { > + ret = tc9563_pwrctrl_parse_device_dt(ctx, child1, port++); > + if (ret) > + break; > + } > + } Bjorn
On 4/19/2025 1:46 AM, Bjorn Helgaas wrote: > On Sat, Apr 12, 2025 at 07:19:57AM +0530, Krishna Chaitanya Chundru wrote: >> TC9563 is a PCIe switch which has one upstream and three downstream >> ports. To one of the downstream ports ethernet MAC is connected as endpoint >> device. Other two downstream ports are supposed to connect to external >> device. One Host can connect to TC9563 by upstream port. TC9563 switch >> needs to be configured after powering on and before PCIe link was up. > > This is described as a generic driver for TC9563, but the ethernet MAC > stuff built into doesn't sound generic. Maybe this could be clarified > here and in the Kconfig help text. > The switch has a DSP to which embedded ethernet was connected, I will update the text in next patch. >> +#define TC9563_GPIO_CONFIG 0x801208 >> +#define TC9563_RESET_GPIO 0x801210 > > I guess these are i2c register addresses? > yes >> +#define TC9563_BUS_CONTROL 0x801014 > > Unused. > I will remove >> +#define TC9563_PORT_L0S_DELAY 0x82496c >> +#define TC9563_PORT_L1_DELAY 0x824970 > > I guess these correspond to "L0s Exit Latency" and "L1 Exit Latency" > in the PCIe spec? Can we name them to suggest that? Where do the > values come from? > ack >> +#define TC9563_EMBEDDED_ETH_DELAY 0x8200d8 >> +#define TC9563_ETH_L1_DELAY_MASK GENMASK(27, 18) >> +#define TC9563_ETH_L1_DELAY_VALUE(x) FIELD_PREP(TC9563_ETH_L1_DELAY_MASK, x) >> +#define TC9563_ETH_L0S_DELAY_MASK GENMASK(17, 13) >> +#define TC9563_ETH_L0S_DELAY_VALUE(x) FIELD_PREP(TC9563_ETH_L0S_DELAY_MASK, x) > >> +#define TC9563_PWRCTL_MAX_SUPPLY 6 >> + >> +struct tc9563_pwrctrl_ctx { >> + struct regulator_bulk_data supplies[TC9563_PWRCTL_MAX_SUPPLY]; >> + struct tc9563_pwrctrl_cfg cfg[TC9563_MAX]; >> + struct gpio_desc *reset_gpio; >> + struct i2c_adapter *adapter; >> + struct i2c_client *client; >> + struct pci_pwrctrl pwrctrl; >> +}; > >> +static int tc9563_pwrctrl_i2c_write(struct i2c_client *client, >> + u32 reg_addr, u32 reg_val) >> +{ >> + struct i2c_msg msg; >> + u8 msg_buf[7]; >> + int ret; >> + >> + msg.addr = client->addr; >> + msg.len = 7; >> + msg.flags = 0; >> + >> + /* Big Endian for reg addr */ >> + put_unaligned_be24(reg_addr, &msg_buf[0]); > > Of the 1000+ calls to i2c_transfer(), I only see about 25 uses of > put_unaligned_be*() beforehand. Are most of the other 975 calls > broken? Or maybe they are only used on platforms of known endianness > so they don't need it? Just a question; I have no idea how i2c works. > The I2C in the switch expects big endian format for address and this requirement is specific to i2c on this switch only. Not every i2c devices may have this requirement. >> + /* Little Endian for reg val */ >> + put_unaligned_le32(reg_val, &msg_buf[3]); >> + >> + msg.buf = msg_buf; >> + ret = i2c_transfer(client->adapter, &msg, 1); >> + return ret == 1 ? 0 : ret; >> +} > >> + ret = of_property_read_u8_array(node, "nfts", cfg->nfts, 2); >> + if (ret && ret != -EINVAL) >> + return ret; > > Asked elsewhere whether "nfts" is supposed to match the DT "n-fts" > property. > ack it is a miss from my side, I will fix in next patch. Thanks for catching this. >> +static int tc9563_pwrctrl_bring_up(struct tc9563_pwrctrl_ctx *ctx) >> +{ >> + struct tc9563_pwrctrl_cfg *cfg; >> + int ret, i; >> + >> + ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies); >> + if (ret < 0) >> + return dev_err_probe(ctx->pwrctrl.dev, ret, "cannot enable regulators\n"); >> + >> + gpiod_set_value(ctx->reset_gpio, 0); >> + >> + /* wait for the internal osc frequency to stablise */ > > s/stablise/stabilize/ (or "stabilise" if you prefer) > >> + usleep_range(10000, 10500); > > Where do these values come from? Can we add a spec citation? > This is from The tc9653 databook. I will add spec citation in next patch. >> + ret = tc9563_pwrctrl_set_l0s_l1_entry_delay(ctx, i, false, cfg->l0s_delay); >> + if (ret) { >> + dev_err(ctx->pwrctrl.dev, "Setting L0s entry delay failed\n"); > > Since these are *entry* delays, maybe they're not related to the "Exit > Latencies" from the PCIe spec. But if they *are* related, can we use > the same terms here? > These are entry delays, not the exit latencies from the Spec. >> + ret = tc9563_pwrctrl_set_l0s_l1_entry_delay(ctx, i, true, cfg->l1_delay); >> + if (ret) { >> + dev_err(ctx->pwrctrl.dev, "Setting L1 entry delay failed\n"); > >> + ret = tc9563_pwrctrl_set_tx_amplitude(ctx, i, cfg->tx_amp); >> + if (ret) { >> + dev_err(ctx->pwrctrl.dev, "Setting Tx amplitube failed\n"); > > s/amplitube/amplitude/ > >> + goto power_off; >> + } >> + >> + ret = tc9563_pwrctrl_set_nfts(ctx, i, cfg->nfts); >> + if (ret) { >> + dev_err(ctx->pwrctrl.dev, "Setting nfts failed\n"); > > s/nfts/N_FTS/ to match spec usage. > >> +static int tc9563_pwrctrl_probe(struct platform_device *pdev) >> +{ > >> ... >> + ctx->supplies[0].supply = "vddc"; >> + ctx->supplies[1].supply = "vdd18"; >> + ctx->supplies[2].supply = "vdd09"; >> + ctx->supplies[3].supply = "vddio1"; >> + ctx->supplies[4].supply = "vddio2"; >> + ctx->supplies[5].supply = "vddio18"; > > Seems like this could be made into a const static array, maybe next to > TC9563_PWRCTL_MAX_SUPPLY? > ack >> + for_each_child_of_node_scoped(pdev->dev.of_node, child) { >> + ret = tc9563_pwrctrl_parse_device_dt(ctx, child, port++); >> + if (ret) >> + break; >> + /* Embedded ethernet device are under DSP3 */ >> + if (port == TC9563_DSP3) > > Is this ethernet thing integrated into the TC9563? Seems like the > sort of topology thing that would normally be described via DT. > The switch has inbuilt integrated ethernet and we described in the DT for the same. - Krishna Chaitanya. >> + for_each_child_of_node_scoped(child, child1) { >> + ret = tc9563_pwrctrl_parse_device_dt(ctx, child1, port++); >> + if (ret) >> + break; >> + } >> + } > > Bjorn
diff --git a/drivers/pci/pwrctrl/Kconfig b/drivers/pci/pwrctrl/Kconfig index 990cab67d41332a8508d4150825c621eb86322c5..d14ef2b0ffd84f9a8c4266fdd57a27f7f3611ca4 100644 --- a/drivers/pci/pwrctrl/Kconfig +++ b/drivers/pci/pwrctrl/Kconfig @@ -21,3 +21,13 @@ config PCI_PWRCTL_SLOT This is a generic driver that controls the power state of different PCI slots. The voltage regulators powering the rails of the PCI slots are expected to be defined in the devicetree node of the PCI bridge. + +config PCI_PWRCTRL_TC9563 + tristate "PCI Power Control driver for TC9563 PCIe switch" + select PCI_PWRCTL + help + Say Y here to enable the PCI Power Control driver of TC9563 PCIe + switch. + + This driver enables power and configures the TC9563 PCIe switch + through i2c. diff --git a/drivers/pci/pwrctrl/Makefile b/drivers/pci/pwrctrl/Makefile index ddfb12c5aadf684cf675585b1078ecb7c24649cc..5d0163c75878d5bf702bc6c892fa31bfea5a95e3 100644 --- a/drivers/pci/pwrctrl/Makefile +++ b/drivers/pci/pwrctrl/Makefile @@ -7,3 +7,5 @@ obj-$(CONFIG_PCI_PWRCTL_PWRSEQ) += pci-pwrctrl-pwrseq.o obj-$(CONFIG_PCI_PWRCTL_SLOT) += pci-pwrctl-slot.o pci-pwrctl-slot-y := slot.o + +obj-$(CONFIG_PCI_PWRCTRL_TC9563) += pci-pwrctrl-tc9563.o diff --git a/drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c b/drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c new file mode 100644 index 0000000000000000000000000000000000000000..547c764a6f405a676216309ef6ebcaffbbc3f1d6 --- /dev/null +++ b/drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c @@ -0,0 +1,628 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/i2c.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_platform.h> +#include <linux/pci.h> +#include <linux/pci-pwrctrl.h> +#include <linux/platform_device.h> +#include <linux/regulator/consumer.h> +#include <linux/string.h> +#include <linux/types.h> +#include <linux/unaligned.h> + +#include "../pci.h" + +#define TC9563_GPIO_CONFIG 0x801208 +#define TC9563_RESET_GPIO 0x801210 + +#define TC9563_BUS_CONTROL 0x801014 + +#define TC9563_PORT_L0S_DELAY 0x82496c +#define TC9563_PORT_L1_DELAY 0x824970 + +#define TC9563_EMBEDDED_ETH_DELAY 0x8200d8 +#define TC9563_ETH_L1_DELAY_MASK GENMASK(27, 18) +#define TC9563_ETH_L1_DELAY_VALUE(x) FIELD_PREP(TC9563_ETH_L1_DELAY_MASK, x) +#define TC9563_ETH_L0S_DELAY_MASK GENMASK(17, 13) +#define TC9563_ETH_L0S_DELAY_VALUE(x) FIELD_PREP(TC9563_ETH_L0S_DELAY_MASK, x) + +#define TC9563_NFTS_2_5_GT 0x824978 +#define TC9563_NFTS_5_GT 0x82497c + +#define TC9563_PORT_LANE_ACCESS_ENABLE 0x828000 + +#define TC9563_PHY_RATE_CHANGE_OVERRIDE 0x828040 +#define TC9563_PHY_RATE_CHANGE 0x828050 + +#define TC9563_TX_MARGIN 0x828234 + +#define TC9563_DFE_ENABLE 0x828a04 +#define TC9563_DFE_EQ0_MODE 0x828a08 +#define TC9563_DFE_EQ1_MODE 0x828a0c +#define TC9563_DFE_EQ2_MODE 0x828a14 +#define TC9563_DFE_PD_MASK 0x828254 + +#define TC9563_PORT_SELECT 0x82c02c +#define TC9563_PORT_ACCESS_ENABLE 0x82c030 + +#define TC9563_POWER_CONTROL 0x82b09c +#define TC9563_POWER_CONTROL_OVREN 0x82b2c8 + +#define TC9563_GPIO_MASK 0xfffffff3 + +#define TC9563_TX_MARGIN_MIN_VAL 400000 + +struct tc9563_pwrctrl_reg_setting { + unsigned int offset; + unsigned int val; +}; + +enum tc9563_pwrctrl_ports { + TC9563_USP, + TC9563_DSP1, + TC9563_DSP2, + TC9563_DSP3, + TC9563_ETHERNET, + TC9563_MAX +}; + +struct tc9563_pwrctrl_cfg { + u32 l0s_delay; + u32 l1_delay; + u32 tx_amp; + u8 nfts[2]; /* GEN1 & GEN2 */ + bool disable_dfe; + bool disable_port; +}; + +#define TC9563_PWRCTL_MAX_SUPPLY 6 + +struct tc9563_pwrctrl_ctx { + struct regulator_bulk_data supplies[TC9563_PWRCTL_MAX_SUPPLY]; + struct tc9563_pwrctrl_cfg cfg[TC9563_MAX]; + struct gpio_desc *reset_gpio; + struct i2c_adapter *adapter; + struct i2c_client *client; + struct pci_pwrctrl pwrctrl; +}; + +/* + * downstream port power off sequence, hardcoding the address + * as we don't know register names for these register offsets. + */ +static const struct tc9563_pwrctrl_reg_setting common_pwroff_seq[] = { + {0x82900c, 0x1}, + {0x829010, 0x1}, + {0x829018, 0x0}, + {0x829020, 0x1}, + {0x82902c, 0x1}, + {0x829030, 0x1}, + {0x82903c, 0x1}, + {0x829058, 0x0}, + {0x82905c, 0x1}, + {0x829060, 0x1}, + {0x8290cc, 0x1}, + {0x8290d0, 0x1}, + {0x8290d8, 0x1}, + {0x8290e0, 0x1}, + {0x8290e8, 0x1}, + {0x8290ec, 0x1}, + {0x8290f4, 0x1}, + {0x82910c, 0x1}, + {0x829110, 0x1}, + {0x829114, 0x1}, +}; + +static const struct tc9563_pwrctrl_reg_setting dsp1_pwroff_seq[] = { + {TC9563_PORT_ACCESS_ENABLE, 0x2}, + {TC9563_PORT_LANE_ACCESS_ENABLE, 0x3}, + {TC9563_POWER_CONTROL, 0x014f4804}, + {TC9563_POWER_CONTROL_OVREN, 0x1}, + {TC9563_PORT_ACCESS_ENABLE, 0x4}, +}; + +static const struct tc9563_pwrctrl_reg_setting dsp2_pwroff_seq[] = { + {TC9563_PORT_ACCESS_ENABLE, 0x8}, + {TC9563_PORT_LANE_ACCESS_ENABLE, 0x1}, + {TC9563_POWER_CONTROL, 0x014f4804}, + {TC9563_POWER_CONTROL_OVREN, 0x1}, + {TC9563_PORT_ACCESS_ENABLE, 0x8}, +}; + +/* + * Since all transfers are initiated by the probe, no locks are necessary, + * as there are no concurrent calls. + */ +static int tc9563_pwrctrl_i2c_write(struct i2c_client *client, + u32 reg_addr, u32 reg_val) +{ + struct i2c_msg msg; + u8 msg_buf[7]; + int ret; + + msg.addr = client->addr; + msg.len = 7; + msg.flags = 0; + + /* Big Endian for reg addr */ + put_unaligned_be24(reg_addr, &msg_buf[0]); + + /* Little Endian for reg val */ + put_unaligned_le32(reg_val, &msg_buf[3]); + + msg.buf = msg_buf; + ret = i2c_transfer(client->adapter, &msg, 1); + return ret == 1 ? 0 : ret; +} + +static int tc9563_pwrctrl_i2c_read(struct i2c_client *client, + u32 reg_addr, u32 *reg_val) +{ + struct i2c_msg msg[2]; + u8 wr_data[3]; + u32 rd_data; + int ret; + + msg[0].addr = client->addr; + msg[0].len = 3; + msg[0].flags = 0; + + /* Big Endian for reg addr */ + put_unaligned_be24(reg_addr, &wr_data[0]); + + msg[0].buf = wr_data; + + msg[1].addr = client->addr; + msg[1].len = 4; + msg[1].flags = I2C_M_RD; + + msg[1].buf = (u8 *)&rd_data; + + ret = i2c_transfer(client->adapter, &msg[0], 2); + if (ret == 2) { + *reg_val = get_unaligned_le32(&rd_data); + return 0; + } + + /* If only one message successfully completed, return -EIO */ + return ret == 1 ? -EIO : ret; +} + +static int tc9563_pwrctrl_i2c_bulk_write(struct i2c_client *client, + const struct tc9563_pwrctrl_reg_setting *seq, int len) +{ + int ret, i; + + for (i = 0; i < len; i++) { + ret = tc9563_pwrctrl_i2c_write(client, seq[i].offset, seq[i].val); + if (ret) + return ret; + } + + return 0; +} + +static int tc9563_pwrctrl_disable_port(struct tc9563_pwrctrl_ctx *ctx, + enum tc9563_pwrctrl_ports port) +{ + struct tc9563_pwrctrl_cfg *cfg = &ctx->cfg[port]; + const struct tc9563_pwrctrl_reg_setting *seq; + int ret, len; + + if (!cfg->disable_port) + return 0; + + if (port == TC9563_DSP1) { + seq = dsp1_pwroff_seq; + len = ARRAY_SIZE(dsp1_pwroff_seq); + } else { + seq = dsp2_pwroff_seq; + len = ARRAY_SIZE(dsp2_pwroff_seq); + } + + ret = tc9563_pwrctrl_i2c_bulk_write(ctx->client, seq, len); + if (ret) + return ret; + + return tc9563_pwrctrl_i2c_bulk_write(ctx->client, + common_pwroff_seq, ARRAY_SIZE(common_pwroff_seq)); +} + +static int tc9563_pwrctrl_set_l0s_l1_entry_delay(struct tc9563_pwrctrl_ctx *ctx, + enum tc9563_pwrctrl_ports port, bool is_l1, u32 ns) +{ + u32 rd_val, units; + int ret; + + if (ns < 256) + return 0; + + /* convert to units of 256ns */ + units = ns / 256; + + if (port == TC9563_ETHERNET) { + ret = tc9563_pwrctrl_i2c_read(ctx->client, TC9563_EMBEDDED_ETH_DELAY, &rd_val); + if (ret) + return ret; + + if (is_l1) + rd_val = u32_replace_bits(rd_val, units, TC9563_ETH_L1_DELAY_MASK); + else + rd_val = u32_replace_bits(rd_val, units, TC9563_ETH_L0S_DELAY_MASK); + + return tc9563_pwrctrl_i2c_write(ctx->client, TC9563_EMBEDDED_ETH_DELAY, rd_val); + } + + ret = tc9563_pwrctrl_i2c_write(ctx->client, TC9563_PORT_SELECT, BIT(port)); + if (ret) + return ret; + + return tc9563_pwrctrl_i2c_write(ctx->client, + is_l1 ? TC9563_PORT_L1_DELAY : TC9563_PORT_L0S_DELAY, units); +} + +static int tc9563_pwrctrl_set_tx_amplitude(struct tc9563_pwrctrl_ctx *ctx, + enum tc9563_pwrctrl_ports port, u32 amp) +{ + int port_access; + + if (amp < TC9563_TX_MARGIN_MIN_VAL) + return 0; + + /* txmargin = (Amp(uV) - 400000) / 3125 */ + amp = (amp - TC9563_TX_MARGIN_MIN_VAL) / 3125; + + switch (port) { + case TC9563_USP: + port_access = 0x1; + break; + case TC9563_DSP1: + port_access = 0x2; + break; + case TC9563_DSP2: + port_access = 0x8; + break; + default: + return -EINVAL; + }; + + struct tc9563_pwrctrl_reg_setting tx_amp_seq[] = { + {TC9563_PORT_ACCESS_ENABLE, port_access}, + {TC9563_PORT_LANE_ACCESS_ENABLE, 0x3}, + {TC9563_TX_MARGIN, amp}, + }; + + return tc9563_pwrctrl_i2c_bulk_write(ctx->client, tx_amp_seq, ARRAY_SIZE(tx_amp_seq)); +} + +static int tc9563_pwrctrl_disable_dfe(struct tc9563_pwrctrl_ctx *ctx, + enum tc9563_pwrctrl_ports port) +{ + struct tc9563_pwrctrl_cfg *cfg = &ctx->cfg[port]; + int port_access, lane_access = 0x3; + u32 phy_rate = 0x21; + + if (!cfg->disable_dfe) + return 0; + + switch (port) { + case TC9563_USP: + phy_rate = 0x1; + port_access = 0x1; + break; + case TC9563_DSP1: + port_access = 0x2; + break; + case TC9563_DSP2: + port_access = 0x8; + lane_access = 0x1; + break; + default: + return -EINVAL; + }; + + struct tc9563_pwrctrl_reg_setting disable_dfe_seq[] = { + {TC9563_PORT_ACCESS_ENABLE, port_access}, + {TC9563_PORT_LANE_ACCESS_ENABLE, lane_access}, + {TC9563_DFE_ENABLE, 0x0}, + {TC9563_DFE_EQ0_MODE, 0x411}, + {TC9563_DFE_EQ1_MODE, 0x11}, + {TC9563_DFE_EQ2_MODE, 0x11}, + {TC9563_DFE_PD_MASK, 0x7}, + {TC9563_PHY_RATE_CHANGE_OVERRIDE, 0x10}, + {TC9563_PHY_RATE_CHANGE, phy_rate}, + {TC9563_PHY_RATE_CHANGE, 0x0}, + {TC9563_PHY_RATE_CHANGE_OVERRIDE, 0x0}, + }; + + return tc9563_pwrctrl_i2c_bulk_write(ctx->client, + disable_dfe_seq, ARRAY_SIZE(disable_dfe_seq)); +} + +static int tc9563_pwrctrl_set_nfts(struct tc9563_pwrctrl_ctx *ctx, + enum tc9563_pwrctrl_ports port, u8 *nfts) +{ + struct tc9563_pwrctrl_reg_setting nfts_seq[] = { + {TC9563_NFTS_2_5_GT, nfts[0]}, + {TC9563_NFTS_5_GT, nfts[1]}, + }; + int ret; + + if (!nfts[0]) + return 0; + + ret = tc9563_pwrctrl_i2c_write(ctx->client, TC9563_PORT_SELECT, BIT(port)); + if (ret) + return ret; + + return tc9563_pwrctrl_i2c_bulk_write(ctx->client, nfts_seq, ARRAY_SIZE(nfts_seq)); +} + +static int tc9563_pwrctrl_assert_deassert_reset(struct tc9563_pwrctrl_ctx *ctx, bool deassert) +{ + int ret, val; + + ret = tc9563_pwrctrl_i2c_write(ctx->client, TC9563_GPIO_CONFIG, TC9563_GPIO_MASK); + if (ret) + return ret; + + val = deassert ? 0xc : 0; + + return tc9563_pwrctrl_i2c_write(ctx->client, TC9563_RESET_GPIO, val); +} + +static int tc9563_pwrctrl_parse_device_dt(struct tc9563_pwrctrl_ctx *ctx, struct device_node *node, + enum tc9563_pwrctrl_ports port) +{ + struct tc9563_pwrctrl_cfg *cfg; + int ret; + + cfg = &ctx->cfg[port]; + + /* Disable port if the status of the port is disabled. */ + if (!of_device_is_available(node)) { + cfg->disable_port = true; + return 0; + }; + + ret = of_property_read_u32(node, "aspm-l0s-entry-delay-ns", &cfg->l0s_delay); + if (ret && ret != -EINVAL) + return ret; + + ret = of_property_read_u32(node, "aspm-l1-entry-delay-ns", &cfg->l1_delay); + if (ret && ret != -EINVAL) + return ret; + + ret = of_property_read_u32(node, "qcom,tx-amplitude-microvolt", &cfg->tx_amp); + if (ret && ret != -EINVAL) + return ret; + + ret = of_property_read_u8_array(node, "nfts", cfg->nfts, 2); + if (ret && ret != -EINVAL) + return ret; + + cfg->disable_dfe = of_property_read_bool(node, "qcom,no-dfe-support"); + + return 0; +} + +static void tc9563_pwrctrl_power_off(struct tc9563_pwrctrl_ctx *ctx) +{ + gpiod_set_value(ctx->reset_gpio, 1); + + regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); +} + +static int tc9563_pwrctrl_bring_up(struct tc9563_pwrctrl_ctx *ctx) +{ + struct tc9563_pwrctrl_cfg *cfg; + int ret, i; + + ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies); + if (ret < 0) + return dev_err_probe(ctx->pwrctrl.dev, ret, "cannot enable regulators\n"); + + gpiod_set_value(ctx->reset_gpio, 0); + + /* wait for the internal osc frequency to stablise */ + usleep_range(10000, 10500); + + ret = tc9563_pwrctrl_assert_deassert_reset(ctx, false); + if (ret) + goto power_off; + + for (i = 0; i < TC9563_MAX; i++) { + cfg = &ctx->cfg[i]; + ret = tc9563_pwrctrl_disable_port(ctx, i); + if (ret) { + dev_err(ctx->pwrctrl.dev, "Disabling port failed\n"); + goto power_off; + } + + ret = tc9563_pwrctrl_set_l0s_l1_entry_delay(ctx, i, false, cfg->l0s_delay); + if (ret) { + dev_err(ctx->pwrctrl.dev, "Setting L0s entry delay failed\n"); + goto power_off; + } + + ret = tc9563_pwrctrl_set_l0s_l1_entry_delay(ctx, i, true, cfg->l1_delay); + if (ret) { + dev_err(ctx->pwrctrl.dev, "Setting L1 entry delay failed\n"); + goto power_off; + } + + ret = tc9563_pwrctrl_set_tx_amplitude(ctx, i, cfg->tx_amp); + if (ret) { + dev_err(ctx->pwrctrl.dev, "Setting Tx amplitube failed\n"); + goto power_off; + } + + ret = tc9563_pwrctrl_set_nfts(ctx, i, cfg->nfts); + if (ret) { + dev_err(ctx->pwrctrl.dev, "Setting nfts failed\n"); + goto power_off; + } + + ret = tc9563_pwrctrl_disable_dfe(ctx, i); + if (ret) { + dev_err(ctx->pwrctrl.dev, "Disabling DFE failed\n"); + goto power_off; + } + } + + ret = tc9563_pwrctrl_assert_deassert_reset(ctx, true); + if (!ret) + return 0; + +power_off: + tc9563_pwrctrl_power_off(ctx); + return ret; +} + +static int tc9563_pwrctrl_probe(struct platform_device *pdev) +{ + struct pci_host_bridge *bridge = to_pci_host_bridge(pdev->dev.parent); + struct pci_dev *pci_dev = to_pci_dev(pdev->dev.parent); + struct pci_bus *bus = bridge->bus; + struct device *dev = &pdev->dev; + enum tc9563_pwrctrl_ports port; + struct tc9563_pwrctrl_ctx *ctx; + struct device_node *i2c_node; + int ret, addr; + + ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + + ret = of_property_read_u32_index(pdev->dev.of_node, "i2c-parent", 1, &addr); + if (ret) + return dev_err_probe(dev, ret, "Failed to read i2c-parent property\n"); + + i2c_node = of_parse_phandle(dev->of_node, "i2c-parent", 0); + ctx->adapter = of_find_i2c_adapter_by_node(i2c_node); + of_node_put(i2c_node); + if (!ctx->adapter) + return dev_err_probe(dev, -EPROBE_DEFER, "Failed to find I2C adapter\n"); + + ctx->client = i2c_new_dummy_device(ctx->adapter, addr); + if (IS_ERR(ctx->client)) { + dev_err(dev, "Failed to create I2C client\n"); + i2c_put_adapter(ctx->adapter); + return PTR_ERR(ctx->client); + } + + ctx->supplies[0].supply = "vddc"; + ctx->supplies[1].supply = "vdd18"; + ctx->supplies[2].supply = "vdd09"; + ctx->supplies[3].supply = "vddio1"; + ctx->supplies[4].supply = "vddio2"; + ctx->supplies[5].supply = "vddio18"; + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies), ctx->supplies); + if (ret) { + dev_err_probe(dev, ret, + "failed to get supply regulator\n"); + goto remove_i2c; + } + + ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(ctx->reset_gpio)) { + ret = dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), "failed to get reset GPIO\n"); + goto remove_i2c; + } + + pci_pwrctrl_init(&ctx->pwrctrl, dev); + + port = TC9563_USP; + ret = tc9563_pwrctrl_parse_device_dt(ctx, pdev->dev.of_node, port); + if (ret) { + dev_err(dev, "failed to parse device tree properties: %d\n", ret); + goto remove_i2c; + } + + /* + * Downstream ports are always children of the upstream port. + * The first node represents DSP1, the second node represents DSP2, and so on. + */ + for_each_child_of_node_scoped(pdev->dev.of_node, child) { + ret = tc9563_pwrctrl_parse_device_dt(ctx, child, port++); + if (ret) + break; + /* Embedded ethernet device are under DSP3 */ + if (port == TC9563_DSP3) + for_each_child_of_node_scoped(child, child1) { + ret = tc9563_pwrctrl_parse_device_dt(ctx, child1, port++); + if (ret) + break; + } + } + if (ret) { + dev_err(dev, "failed to parse device tree properties: %d\n", ret); + goto remove_i2c; + } + + if (!pcie_link_is_active(pci_dev) && bridge->ops->stop_link) + bridge->ops->stop_link(bus); + + ret = tc9563_pwrctrl_bring_up(ctx); + if (ret) + goto remove_i2c; + + if (!pcie_link_is_active(pci_dev) && bridge->ops->start_link) { + ret = bridge->ops->start_link(bus); + if (ret) + goto power_off; + } + + ret = devm_pci_pwrctrl_device_set_ready(dev, &ctx->pwrctrl); + if (ret) + goto power_off; + + platform_set_drvdata(pdev, ctx); + + return 0; + +power_off: + tc9563_pwrctrl_power_off(ctx); +remove_i2c: + i2c_unregister_device(ctx->client); + i2c_put_adapter(ctx->adapter); + return ret; +} + +static void tc9563_pwrctrl_remove(struct platform_device *pdev) +{ + struct tc9563_pwrctrl_ctx *ctx = platform_get_drvdata(pdev); + + tc9563_pwrctrl_power_off(ctx); + i2c_unregister_device(ctx->client); + i2c_put_adapter(ctx->adapter); +} + +static const struct of_device_id tc9563_pwrctrl_of_match[] = { + { .compatible = "pci1179,0623"}, + { } +}; +MODULE_DEVICE_TABLE(of, tc9563_pwrctrl_of_match); + +static struct platform_driver tc9563_pwrctrl_driver = { + .driver = { + .name = "pwrctrl-tc9563", + .of_match_table = tc9563_pwrctrl_of_match, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + }, + .probe = tc9563_pwrctrl_probe, + .remove = tc9563_pwrctrl_remove, +}; +module_platform_driver(tc9563_pwrctrl_driver); + +MODULE_AUTHOR("Krishna chaitanya chundru <quic_krichai@quicinc.com>"); +MODULE_DESCRIPTION("TC956x power control driver"); +MODULE_LICENSE("GPL");