| Message ID | 20250423-add_qcs615_remoteproc_support-v1-0-a94fe8799f14@quicinc.com |
|---|---|
| Headers | show |
| Series | arm64: dts: qcom: qcs615: enable remoteprocs - ADSP and CDSP | expand |
On 4/24/25 9:56 AM, Lijuan Gao wrote: > > > 在 4/23/2025 5:34 PM, Konrad Dybcio 写道: >> On 4/23/25 11:17 AM, Lijuan Gao wrote: >>> Add nodes for remoteprocs: ADSP and CDSP for QCS615 SoC to enable proper >>> remoteproc functionality. >>> >>> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> >>> --- [...] >>> + remoteproc_adsp: remoteproc-adsp@62400000 { >>> + compatible = "qcom,qcs615-adsp-pas", "qcom,sm8150-adsp-pas"; >>> + reg = <0x0 0x62400000 0x0 0x100>; >> >> The size is 0x100000 (1 MiB) > > Sorry, my mistake. I checked the latest datasheet, and the size should be 0x4040. I will update the register size for both ADSP and CDSP Yes you're right Konrad
On Wed, Apr 23, 2025 at 05:17:37PM GMT, Lijuan Gao wrote: > > reg: > maxItems: 1 > @@ -59,16 +68,17 @@ allOf: > - if: > properties: > compatible: > - enum: > - - qcom,sc8180x-adsp-pas > - - qcom,sc8180x-cdsp-pas > - - qcom,sc8180x-slpi-pas This needs fixes, but it is not related to this patch. I'll send a fix but might conflict in first diff chunk. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
在 4/23/2025 5:29 PM, Konrad Dybcio 写道: > On 4/23/25 11:17 AM, Lijuan Gao wrote: >> From: Kyle Deng <quic_chunkaid@quicinc.com> >> >> The Shared Memory Point to Point (SMP2P) protocol facilitates >> communication of a single 32-bit value between two processors. >> Add these two nodes for remoteproc enablement on QCS615 SoC. >> >> Signed-off-by: Kyle Deng <quic_chunkaid@quicinc.com> >> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/qcs615.dtsi | 79 ++++++++++++++++++++++++++++++++++++ >> 1 file changed, 79 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi >> index edfb796d8dd3..ab3c6ba5842b 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi >> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi >> @@ -332,6 +332,80 @@ mc_virt: interconnect-2 { >> qcom,bcm-voters = <&apps_bcm_voter>; >> }; >> >> + qcom,smp2p-adsp { > > Remove the qcom prefix Understood, it will be updated in the next patch. > >> + compatible = "qcom,smp2p"; >> + qcom,smem = <443>, <429>; >> + interrupts = <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>; >> + mboxes = <&apss_shared 26>; >> + qcom,ipc = <&apcs 0 26>; >> + qcom,local-pid = <0>; >> + qcom,remote-pid = <2>; >> + >> + adsp_smp2p_out: master-kernel { >> + qcom,entry-name = "master-kernel"; >> + #qcom,smem-state-cells = <1>; >> + }; >> + >> + adsp_smp2p_in: slave-kernel { >> + qcom,entry-name = "slave-kernel"; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + sleepstate_smp2p_out: sleepstate-out { >> + qcom,entry-name = "sleepstate"; >> + #qcom,smem-state-cells = <1>; >> + }; >> + >> + sleepstate_smp2p_in: qcom,sleepstate-in { >> + qcom,entry-name = "sleepstate_see"; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + smp2p_rdbg2_out: qcom,smp2p-rdbg2-out { >> + qcom,entry-name = "rdbg"; >> + #qcom,smem-state-cells = <1>; >> + }; >> + >> + smp2p_rdbg2_in: qcom,smp2p-rdbg2-in { >> + qcom,entry-name = "rdbg"; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + }; >> + >> + qcom,smp2p-cdsp { >> + compatible = "qcom,smp2p"; >> + qcom,smem = <94>, <432>; >> + interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>; >> + mboxes = <&apss_shared 6>; >> + qcom,ipc = <&apcs 0 6>; >> + qcom,local-pid = <0>; >> + qcom,remote-pid = <5>; >> + >> + cdsp_smp2p_out: master-kernel { >> + qcom,entry-name = "master-kernel"; >> + #qcom,smem-state-cells = <1>; >> + }; >> + >> + cdsp_smp2p_in: slave-kernel { >> + qcom,entry-name = "slave-kernel"; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + smp2p_rdbg5_out: qcom,smp2p-rdbg5-out { >> + qcom,entry-name = "rdbg"; >> + #qcom,smem-state-cells = <1>; >> + }; >> + >> + smp2p_rdbg5_in: qcom,smp2p-rdbg5-in { >> + qcom,entry-name = "rdbg"; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + }; >> + >> qup_opp_table: opp-table-qup { >> compatible = "operating-points-v2"; >> opp-shared; >> @@ -3337,6 +3411,11 @@ apss_shared: mailbox@17c00000 { >> #mbox-cells = <1>; >> }; >> >> + apcs: syscon@17c0000c { >> + compatible = "syscon"; > > There is already a description for this block above what you added > > qcom,ipc under smp2p is mutually exclusive with `mboxes`, so adding > the above isn't necessary at all > > Konrad Understood, I will remove the qcom,ipc in next patch.
Enable the remote processor PAS loader for QCS615 ADSP and CDSP processors. This allows different platforms/architectures to control (power on, load firmware, power off) those remote processors while abstracting the hardware differences. Additionally, and add a PIL region in IMEM so that post mortem debug tools can collect ramdumps. Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> --- Kyle Deng (1): arm64: dts: qcom: qcs615: Add mproc node for SEMP2P Lijuan Gao (5): dt-bindings: remoteproc: qcom,sm8150-pas: Document QCS615 remoteproc dt-bindings: soc: qcom: add qcom,qcs615-imem compatible arm64: dts: qcom: qcs615: Add IMEM and PIL info region arm64: dts: qcom: qcs615: add ADSP and CDSP nodes arm64: dts: qcom: qcs615-ride: enable remoteprocs .../bindings/remoteproc/qcom,sm8150-pas.yaml | 59 ++++--- .../devicetree/bindings/sram/qcom,imem.yaml | 1 + arch/arm64/boot/dts/qcom/qcs615-ride.dts | 10 ++ arch/arm64/boot/dts/qcom/qcs615.dtsi | 179 +++++++++++++++++++++ 4 files changed, 225 insertions(+), 24 deletions(-) --- base-commit: f660850bc246fef15ba78c81f686860324396628 change-id: 20250416-add_qcs615_remoteproc_support-61ddab556c4e Best regards,