[0/2] arm64: dts: rockchip: Add spi nodes for RK3528

There are 2 SPI controllers on the RK3528 SoC, describe it.
Tested using st7789v chip with spi-cpha and spi-cpol properties.

[   10.831306] fb_st7789v spi0.0: fbtft_property_value: buswidth = 8
[   11.042915] graphics fb0: fb_st7789v frame buffer, 240x320, 150 KiB
 video memory, 4 KiB buffer memory, fps=20, spi0.0 at 15 MHz

Chukun Pan (2):
  spi: dt-bindings: Add rk3528-spi compatible
  arm64: dts: rockchip: Add spi nodes for RK3528

 .../devicetree/bindings/spi/spi-rockchip.yaml |  1 +
 arch/arm64/boot/dts/rockchip/rk3528.dtsi      | 28 +++++++++++++++++++
 2 files changed, 29 insertions(+)

On 2025-05-20 12:01, Chukun Pan wrote:
> There are 2 SPI controllers on the RK3528 SoC, describe it.
> 
> Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
> ---
>  arch/arm64/boot/dts/rockchip/rk3528.dtsi | 28 ++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> index b2724c969a76..4d60c09219f9 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> @@ -371,6 +371,34 @@ ioc_grf: syscon@ff540000 {
>  			reg = <0x0 0xff540000 0x0 0x40000>;
>  		};
>  
> +		spi0: spi@ff9c0000 {
> +			compatible = "rockchip,rk3528-spi",
> +				     "rockchip,rk3066-spi";
> +			reg = <0x0 0xff9c0000 0x0 0x1000>;
> +			clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
> +			clock-names = "spiclk", "apb_pclk";
> +			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> +			dmas = <&dmac 25>, <&dmac 24>;
> +			dma-names = "tx", "rx";

This is missing power-domains after "rockchip: Add power controller
support for RK3528" [1], spi0 depend on pclk_rkvenc_root:

	power-domains = <&power RK3528_PD_RKVENC>;

> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		spi1: spi@ff9d0000 {
> +			compatible = "rockchip,rk3528-spi",
> +				     "rockchip,rk3066-spi";
> +			reg = <0x0 0xff9d0000 0x0 0x1000>;
> +			clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
> +			clock-names = "spiclk", "apb_pclk";
> +			interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
> +			dmas = <&dmac 31>, <&dmac 30>;
> +			dma-names = "tx", "rx";

Same here, spi1 depend on pclk_vpu_root:

	power-domains = <&power RK3528_PD_VPU>;

[1] https://lore.kernel.org/r/20250518220707.669515-1-jonas@kwiboo.se

Regards,
Jonas

> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		uart0: serial@ff9f0000 {
>  			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";
>  			reg = <0x0 0xff9f0000 0x0 0x100>;

On Tue, 20 May 2025 18:01:00 +0800, Chukun Pan wrote:
> There are 2 SPI controllers on the RK3528 SoC, describe it.
> Tested using st7789v chip with spi-cpha and spi-cpol properties.
> 
> [   10.831306] fb_st7789v spi0.0: fbtft_property_value: buswidth = 8
> [   11.042915] graphics fb0: fb_st7789v frame buffer, 240x320, 150 KiB
>  video memory, 4 KiB buffer memory, fps=20, spi0.0 at 15 MHz
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/2] spi: dt-bindings: Add rk3528-spi compatible
      commit: 70e5f38e734572ca5a56cff48cf01a0f31917099

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

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and review of the tree, please engage with people reporting problems and
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Thanks,
Mark