@@ -261,11 +261,18 @@ SetSocIdStatus (
if (!PcdGetBool (PcdEnableSmmus)) {
DisableSmmu (Fdt, "iommu-map", "/smb/smmu@e0a00000", "/smb/pcie@f0000000");
DisableSmmu (Fdt, "iommus", "/smb/smmu@e0200000", "/smb/sata@e0300000");
+ }
+
+ if (!PcdGetBool (PcdEnableSmmus) || !IsRevB1 || FixedPcdGet8 (PcdSata1PortCount) == 0) {
DisableSmmu (Fdt, "iommus", "/smb/smmu@e0c00000", "/smb/sata@e0d00000");
+ }
+
#if DO_XGBE
+ if (!PcdGetBool (PcdEnableSmmus))
+#endif
+ {
DisableSmmu (Fdt, "iommus", "/smb/smmu@e0600000", "/smb/xgmac@e0700000");
DisableSmmu (Fdt, "iommus", "/smb/smmu@e0800000", "/smb/xgmac@e0900000");
-#endif
}
}
The logic regarding how the various SMMUs are exposed in the device tree is inverted, in the sense that they are present in the static DTB image, and are removed if no SMMU support is requested. However, the logic is flawed in the sense that it did not remove SMMUs for hardware that is not there to begin with, i.e., the XGBE network ports on Cello/Softiron 1000 or the second SATA controller on B1 silicon. So fix that. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)