[PULL,05/32] target/arm: Delay check for magic kernel page

Message ID	20170906160612.22769-6-richard.henderson@linaro.org
State	Accepted
Commit	3805c2eba8999049bbbea29fdcdea4d47d943c88
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Date: Wed, 6 Sep 2017 09:05:45 -0700 Message-Id: <20170906160612.22769-6-richard.henderson@linaro.org> In-Reply-To: <20170906160612.22769-1-richard.henderson@linaro.org> References: <20170906160612.22769-1-richard.henderson@linaro.org> Subject: [Qemu-devel] [PULL 05/32] target/arm: Delay check for magic kernel page Precedence: list Cc: peter.maydell@linaro.org, Richard Henderson <rth@twiddle.net> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	tcg generic translate loop \| expand [PULL,00/32] tcg generic translate loop [PULL,01/32] tcg: Add generic DISAS_NORETURN [PULL,02/32] target/i386: Use generic DISAS_* enumerators [PULL,03/32] target/arm: Use DISAS_NORETURN [PULL,04/32] target: [tcg] Use a generic enum for DISAS_ values [PULL,05/32] target/arm: Delay check for magic kernel page [PULL,06/32] tcg: Add generic translation framework [PULL,07/32] target/i386: [tcg] Port to DisasContextBase [PULL,08/32] target/i386: [tcg] Port to init_disas_context [PULL,09/32] target/i386: [tcg] Port to insn_start [PULL,10/32] target/i386: [tcg] Port to breakpoint_check [PULL,11/32] target/i386: [tcg] Port to translate_insn [PULL,12/32] target/i386: [tcg] Port to tb_stop [PULL,13/32] target/i386: [tcg] Port to disas_log [PULL,14/32] target/i386: [tcg] Port to generic translation framework [PULL,15/32] target/arm: [tcg] Port to DisasContextBase [PULL,16/32] target/arm: [tcg] Port to init_disas_context [PULL,17/32] target/arm: [tcg, a64] Port to init_disas_context [PULL,18/32] target/arm: [tcg] Port to tb_start [PULL,19/32] target/arm: [tcg] Port to insn_start [PULL,20/32] target/arm: [tcg, a64] Port to insn_start [PULL,21/32] target/arm: [tcg, a64] Port to breakpoint_check [PULL,22/32] target/arm: [tcg] Port to translate_insn [PULL,23/32] target/arm: [tcg, a64] Port to translate_insn [PULL,24/32] target/arm: [tcg] Port to tb_stop [PULL,25/32] target/arm: [tcg,a64] Port to tb_stop [PULL,26/32] target/arm: [tcg] Port to disas_log [PULL,27/32] target/arm: [tcg,a64] Port to disas_log [PULL,28/32] target/arm: [tcg] Port to generic translation framework [PULL,29/32] target/arm: [a64] Move page and ss checks to init_disas_context [PULL,30/32] target/arm: Move ss check to init_disas_context [PULL,31/32] target/arm: Split out thumb_tr_translate_insn [PULL,32/32] target/arm: Perform per-insn cross-page check only for Thumb

Message ID

20170906160612.22769-6-richard.henderson@linaro.org

State

Accepted

Commit

3805c2eba8999049bbbea29fdcdea4d47d943c88

Headers

Received-SPF: pass (google.com: domain of
	qemu-devel-bounces+patch=linaro.org@nongnu.org designates
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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Date: Wed,  6 Sep 2017 09:05:45 -0700
Message-Id: <20170906160612.22769-6-richard.henderson@linaro.org>
In-Reply-To: <20170906160612.22769-1-richard.henderson@linaro.org>
References: <20170906160612.22769-1-richard.henderson@linaro.org>
Subject: [Qemu-devel] [PULL 05/32] target/arm: Delay check for magic kernel
	page
Precedence: list
Cc: peter.maydell@linaro.org, Richard Henderson <rth@twiddle.net>
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Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>

Series

tcg generic translate loop | expand

Commit Message

Richard Henderson Sept. 6, 2017, 4:05 p.m. UTC

From: Richard Henderson <rth@twiddle.net>


There's nothing magic about the exception that we generate in order
to execute the magic kernel page.  We can and should allow gdb to
set a breakpoint at this location.

Reviewed-by: Emilio G. Cota <cota@braap.org>

Signed-off-by: Richard Henderson <rth@twiddle.net>

---
 target/arm/translate.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

-- 
2.13.5

diff --git a/target/arm/translate.c b/target/arm/translate.c
index 0c39c2b996..746193eebc 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -11968,17 +11968,6 @@  void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
                            0);
         num_insns++;
 
-#ifdef CONFIG_USER_ONLY
-        /* Intercept jump to the magic kernel page.  */
-        if (dc->pc >= 0xffff0000) {
-            /* We always get here via a jump, so know we are not in a
-               conditional execution block.  */
-            gen_exception_internal(EXCP_KERNEL_TRAP);
-            dc->is_jmp = DISAS_NORETURN;
-            break;
-        }
-#endif
-
         if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
             CPUBreakpoint *bp;
             QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
@@ -12010,6 +11999,17 @@  void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
             gen_io_start();
         }
 
+#ifdef CONFIG_USER_ONLY
+        /* Intercept jump to the magic kernel page.  */
+        if (dc->pc >= 0xffff0000) {
+            /* We always get here via a jump, so know we are not in a
+               conditional execution block.  */
+            gen_exception_internal(EXCP_KERNEL_TRAP);
+            dc->is_jmp = DISAS_NORETURN;
+            break;
+        }
+#endif
+
         if (dc->ss_active && !dc->pstate_ss) {
             /* Singlestep state is Active-pending.
              * If we're in this state at the start of a TB then either

[PULL,05/32] target/arm: Delay check for magic kernel page

Commit Message

Patch