[v2,9/9] ARM: dts: aspeed: Clean up UART nodes

Message ID	20171004064917.2498-10-joel@jms.id.au
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; From: Joel Stanley <joel@jms.id.au> To: Joel Stanley <joel@jms.id.au>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com> Cc: Russell King <linux@armlinux.org.uk>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Jeffery <andrew@aj.id.au>, Rick Altherr <raltherr@google.com>, Brendan Higgins <brendanhiggins@google.com>, =?utf-8?q?C=C3=A9dric_Le_?= =?utf-8?q?Goater?= <clg@kaod.org>, linux-aspeed@lists.ozlabs.org Subject: [PATCH v2 9/9] ARM: dts: aspeed: Clean up UART nodes Date: Wed, 4 Oct 2017 17:19:17 +1030 Message-Id: <20171004064917.2498-10-joel@jms.id.au> In-Reply-To: <20171004064917.2498-1-joel@jms.id.au> References: <20171004064917.2498-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk
Series	[v2,1/9] ARM: dts: aspeed: Move pinctrl subnodes to improve readability \| expand [v2,1/9] ARM: dts: aspeed: Move pinctrl subnodes to improve readability [v2,2/9] ARM: dts: aspeed: Reorder ADC node [v2,3/9] ARM: dts: aspeed: Add I2C buses [v2,4/9] ARM: dts: aspeed-romulus: Add I2C devices [v2,5/9] ARM: dts: aspeed-palmetto: Add I2C devices [v2,7/9] ARM: dts: aspeed: Add aliases for UARTs [v2,9/9] ARM: dts: aspeed: Clean up UART nodes

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20171004064917.2498-10-joel@jms.id.au

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New

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Received-SPF: pass (google.com: best guess record for domain of
	linux-kernel-owner@vger.kernel.org designates 209.132.180.67
	as permitted sender) client-ip=209.132.180.67; 
From: Joel Stanley <joel@jms.id.au>
To: Joel Stanley <joel@jms.id.au>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, 
	Andrew Jeffery <andrew@aj.id.au>, Rick Altherr <raltherr@google.com>, 
	Brendan Higgins <brendanhiggins@google.com>, =?utf-8?q?C=C3=A9dric_Le_?=
	=?utf-8?q?Goater?= <clg@kaod.org>,         linux-aspeed@lists.ozlabs.org
Subject: [PATCH v2 9/9] ARM: dts: aspeed: Clean up UART nodes
Date: Wed,  4 Oct 2017 17:19:17 +1030
Message-Id: <20171004064917.2498-10-joel@jms.id.au>
In-Reply-To: <20171004064917.2498-1-joel@jms.id.au>
References: <20171004064917.2498-1-joel@jms.id.au>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Series

[v2,1/9] ARM: dts: aspeed: Move pinctrl subnodes to improve readability | expand

Commit Message

Joel Stanley Oct. 4, 2017, 6:49 a.m. UTC

- Shorten size of reg property so it covers only the implemented
 registers

 - Add VUART compatible, and change node name to serial@

 - Remove outdated current-speed property. Different bootloaders use
 different speeds, so this is no longer helpful

Signed-off-by: Joel Stanley <joel@jms.id.au>

---
v2:
 - move node reordering to seperate patch
 - fix vuart node name
 - actually remove current-speed from g4
---
 arch/arm/boot/dts/aspeed-g4.dtsi | 18 +++++++++---------
 arch/arm/boot/dts/aspeed-g5.dtsi | 18 +++++++++---------
 2 files changed, 18 insertions(+), 18 deletions(-)

-- 
2.14.1

diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 4125e07f22f9..e455bd236798 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -27,6 +27,7 @@ 
 		serial2 = &uart3;
 		serial3 = &uart4;
 		serial4 = &uart5;
+		serial5 = &vuart;
 	};
 
 	cpus {
@@ -185,7 +186,7 @@ 
 
 			uart1: serial@1e783000 {
 				compatible = "ns16550a";
-				reg = <0x1e783000 0x1000>;
+				reg = <0x1e783000 0x20>;
 				reg-shift = <2>;
 				interrupts = <9>;
 				clocks = <&clk_uart>;
@@ -195,11 +196,10 @@ 
 
 			uart5: serial@1e784000 {
 				compatible = "ns16550a";
-				reg = <0x1e784000 0x1000>;
+				reg = <0x1e784000 0x20>;
 				reg-shift = <2>;
 				interrupts = <10>;
 				clocks = <&clk_uart>;
-				current-speed = <38400>;
 				no-loopback-test;
 				status = "disabled";
 			};
@@ -218,9 +218,9 @@ 
 				status = "disabled";
 			};
 
-			uart6: serial@1e787000 {
-				compatible = "ns16550a";
-				reg = <0x1e787000 0x1000>;
+			vuart: serial@1e787000 {
+				compatible = "aspeed,ast2400-vuart";
+				reg = <0x1e787000 0x40>;
 				reg-shift = <2>;
 				interrupts = <10>;
 				clocks = <&clk_uart>;
@@ -230,7 +230,7 @@ 
 
 			uart2: serial@1e78d000 {
 				compatible = "ns16550a";
-				reg = <0x1e78d000 0x1000>;
+				reg = <0x1e78d000 0x20>;
 				reg-shift = <2>;
 				interrupts = <32>;
 				clocks = <&clk_uart>;
@@ -240,7 +240,7 @@ 
 
 			uart3: serial@1e78e000 {
 				compatible = "ns16550a";
-				reg = <0x1e78e000 0x1000>;
+				reg = <0x1e78e000 0x20>;
 				reg-shift = <2>;
 				interrupts = <33>;
 				clocks = <&clk_uart>;
@@ -250,7 +250,7 @@ 
 
 			uart4: serial@1e78f000 {
 				compatible = "ns16550a";
-				reg = <0x1e78f000 0x1000>;
+				reg = <0x1e78f000 0x20>;
 				reg-shift = <2>;
 				interrupts = <34>;
 				clocks = <&clk_uart>;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 61cc2d25143a..cef51dcc1002 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -27,6 +27,7 @@ 
 		serial2 = &uart3;
 		serial3 = &uart4;
 		serial4 = &uart5;
+		serial5 = &vuart;
 	};
 
 	cpus {
@@ -229,7 +230,7 @@ 
 
 			uart1: serial@1e783000 {
 				compatible = "ns16550a";
-				reg = <0x1e783000 0x1000>;
+				reg = <0x1e783000 0x20>;
 				reg-shift = <2>;
 				interrupts = <9>;
 				clocks = <&clk_uart>;
@@ -239,11 +240,10 @@ 
 
 			uart5: serial@1e784000 {
 				compatible = "ns16550a";
-				reg = <0x1e784000 0x1000>;
+				reg = <0x1e784000 0x20>;
 				reg-shift = <2>;
 				interrupts = <10>;
 				clocks = <&clk_uart>;
-				current-speed = <38400>;
 				no-loopback-test;
 				status = "disabled";
 			};
@@ -297,9 +297,9 @@ 
 				};
 			};
 
-			uart6: serial@1e787000 {
-				compatible = "ns16550a";
-				reg = <0x1e787000 0x1000>;
+			vuart: vuart@1e787000 {
+				compatible = "aspeed,ast2500-vuart";
+				reg = <0x1e787000 0x40>;
 				reg-shift = <2>;
 				interrupts = <10>;
 				clocks = <&clk_uart>;
@@ -309,7 +309,7 @@ 
 
 			uart2: serial@1e78d000 {
 				compatible = "ns16550a";
-				reg = <0x1e78d000 0x1000>;
+				reg = <0x1e78d000 0x20>;
 				reg-shift = <2>;
 				interrupts = <32>;
 				clocks = <&clk_uart>;
@@ -319,7 +319,7 @@ 
 
 			uart3: serial@1e78e000 {
 				compatible = "ns16550a";
-				reg = <0x1e78e000 0x1000>;
+				reg = <0x1e78e000 0x20>;
 				reg-shift = <2>;
 				interrupts = <33>;
 				clocks = <&clk_uart>;
@@ -329,7 +329,7 @@ 
 
 			uart4: serial@1e78f000 {
 				compatible = "ns16550a";
-				reg = <0x1e78f000 0x1000>;
+				reg = <0x1e78f000 0x20>;
 				reg-shift = <2>;
 				interrupts = <34>;
 				clocks = <&clk_uart>;

[v2,9/9] ARM: dts: aspeed: Clean up UART nodes

Commit Message

Patch